Searched hist:"4789 cf66af0560900b088e03968bc2fc83d1f330" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | neoverse_v1.h | 4789cf66af0560900b088e03968bc2fc83d1f330 Mon Aug 02 18:22:32 UTC 2021 laurenw-arm <lauren.wehrmeister@arm.com> errata: workaround for Neoverse V1 errata 1774420
Neoverse V1 erratum 1774420 is a Cat B erratum present in r0p0 and
r1p0 of the V1 processor core. It is fixed in r1p1.
SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I66e27b2518f73faeedd8615a1443a74b6a30f123
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| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | neoverse_v1.S | 4789cf66af0560900b088e03968bc2fc83d1f330 Mon Aug 02 18:22:32 UTC 2021 laurenw-arm <lauren.wehrmeister@arm.com> errata: workaround for Neoverse V1 errata 1774420
Neoverse V1 erratum 1774420 is a Cat B erratum present in r0p0 and
r1p0 of the V1 processor core. It is fixed in r1p1.
SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I66e27b2518f73faeedd8615a1443a74b6a30f123
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| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 4789cf66af0560900b088e03968bc2fc83d1f330 Mon Aug 02 18:22:32 UTC 2021 laurenw-arm <lauren.wehrmeister@arm.com> errata: workaround for Neoverse V1 errata 1774420
Neoverse V1 erratum 1774420 is a Cat B erratum present in r0p0 and
r1p0 of the V1 processor core. It is fixed in r1p1.
SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I66e27b2518f73faeedd8615a1443a74b6a30f123
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 4789cf66af0560900b088e03968bc2fc83d1f330 Mon Aug 02 18:22:32 UTC 2021 laurenw-arm <lauren.wehrmeister@arm.com> errata: workaround for Neoverse V1 errata 1774420
Neoverse V1 erratum 1774420 is a Cat B erratum present in r0p0 and
r1p0 of the V1 processor core. It is fixed in r1p1.
SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I66e27b2518f73faeedd8615a1443a74b6a30f123
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