Home
last modified time | relevance | path

Searched hist:"2 d39b39704c1e4f2a189543ac4ff05ae58e5f5c8" (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/arm/board/morello/
H A Dmorello_plat.c2d39b39704c1e4f2a189543ac4ff05ae58e5f5c8 Thu Aug 26 05:19:02 UTC 2021 Manoj Kumar <manoj.kumar3@arm.com> feat(morello): zero out the DDR memory space

For Morello SoC, we use ECC capability for the RDIMMs
which require the entire DDR memory space to be zeroed
out before it can be accessed.

Change-Id: Icbe9916f9a2d3c4ce839d8bf7f867efa18f33e23
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
H A Dmorello_def.h2d39b39704c1e4f2a189543ac4ff05ae58e5f5c8 Thu Aug 26 05:19:02 UTC 2021 Manoj Kumar <manoj.kumar3@arm.com> feat(morello): zero out the DDR memory space

For Morello SoC, we use ECC capability for the RDIMMs
which require the entire DDR memory space to be zeroed
out before it can be accessed.

Change-Id: Icbe9916f9a2d3c4ce839d8bf7f867efa18f33e23
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
H A Dmorello_bl31_setup.c2d39b39704c1e4f2a189543ac4ff05ae58e5f5c8 Thu Aug 26 05:19:02 UTC 2021 Manoj Kumar <manoj.kumar3@arm.com> feat(morello): zero out the DDR memory space

For Morello SoC, we use ECC capability for the RDIMMs
which require the entire DDR memory space to be zeroed
out before it can be accessed.

Change-Id: Icbe9916f9a2d3c4ce839d8bf7f867efa18f33e23
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>