Searched +full:jz4780 +full:- +full:nand (Results 1 – 12 of 12) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Ingenic SoCs NAND controller devicetree bindings10 - Paul Cercueil <paul@crapouillou.net>13 - $ref: nand-controller.yaml#18 - ingenic,jz4740-nand19 - ingenic,jz4725b-nand20 - ingenic,jz4780-nand[all …]
1 # SPDX-License-Identifier: GPL-2.0-only3 tristate "JZ4780 NAND controller"7 Enables support for NAND Flash connected to the NEMC on JZ4780 SoC19 Enable this driver to support the Reed-Solomon error-correction23 will be called jz4740-ecc.29 Enable this driver to support the BCH error-correction hardware33 will be called jz4725b-bch.36 tristate "Hardware BCH support for JZ4780 SoC"39 Enable this driver to support the BCH error-correction hardware40 present on the JZ4780 SoC from Ingenic.[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Ingenic JZ47xx NAND driver24 #include <linux/jz4780-nemc.h>28 #define DRV_NAME "ingenic-nand"75 struct nand_ecc_ctrl *ecc = &chip->ecc; in qi_lb60_ooblayout_ecc()77 if (section || !ecc->total) in qi_lb60_ooblayout_ecc()78 return -ERANGE; in qi_lb60_ooblayout_ecc()80 oobregion->length = ecc->total; in qi_lb60_ooblayout_ecc()81 oobregion->offset = 12; in qi_lb60_ooblayout_ecc()90 struct nand_ecc_ctrl *ecc = &chip->ecc; in qi_lb60_ooblayout_free()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * JZ4780 NAND/external memory controller (NEMC)6 * Author: Alex Smith <alex@alex-smith.me.uk>21 #include <linux/jz4780-nemc.h>23 #define NEMC_SMCRn(n) (0x14 + (((n) - 1) * 4))43 #define NEMC_NFCSR_NFEn(n) BIT(((n) - 1) << 1)44 #define NEMC_NFCSR_NFCEn(n) BIT((((n) - 1) << 1) + 1)45 #define NEMC_NFCSR_TNFEn(n) BIT(16 + (n) - 1)62 * jz4780_nemc_num_banks() - count the number of banks referenced by a device76 while ((prop = of_get_address(dev->of_node, i++, NULL, NULL))) { in jz4780_nemc_num_banks()[all …]
1 # SPDX-License-Identifier: GPL-2.0-only34 bool "Atmel (Multi-port DDR-)SDRAM Controller"39 This driver is for Atmel SDRAM Controller or Atmel Multi-port40 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.42 LP-DDR memories.53 Used to configure the EBI (external bus interface) when the device-70 bool "Baikal-T1 CM2 L2-RAM Cache Control Block"74 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU75 resides Coherency Manager v2 with embedded 1MB L2-cache. It's77 tags and way-select latencies of RAM access. This driver provides a[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Paul Cercueil <paul@crapouillou.net>13 - $ref: "dma-controller.yaml#"18 - ingenic,jz4740-dma19 - ingenic,jz4725b-dma20 - ingenic,jz4770-dma21 - ingenic,jz4780-dma22 - ingenic,x1000-dma[all …]
1 // SPDX-License-Identifier: GPL-2.02 /dts-v1/;4 #include "jz4780.dtsi"5 #include <dt-bindings/clock/ingenic,tcu.h>6 #include <dt-bindings/gpio/gpio.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/irq.h>9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>12 compatible = "img,ci20", "ingenic,jz4780";22 stdout-path = &uart4;[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings10 - Paul Cercueil <paul@crapouillou.net>14 pattern: "^memory-controller@[0-9a-f]+$"18 - enum:19 - ingenic,jz4740-nemc20 - ingenic,jz4780-nemc[all …]
1 /* SPDX-License-Identifier: GPL-2.0-or-later */3 * JZ4780 NAND/external memory controller (NEMC)6 * Author: Alex Smith <alex@alex-smith.me.uk>23 * enum jz4780_nemc_bank_type - device types which can be connected to a bank25 * @JZ4780_NEMC_BANK_NAND: NAND
1 // SPDX-License-Identifier: GPL-2.0-only20 #include <linux/pinctrl/pinconf-generic.h>169 INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit),170 INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit),171 INGENIC_PIN_GROUP("uart0-data", jz4740_uart0_data),172 INGENIC_PIN_GROUP("uart0-hwflow", jz4740_uart0_hwflow),173 INGENIC_PIN_GROUP("uart1-data", jz4740_uart1_data),174 INGENIC_PIN_GROUP("lcd-8bit", jz4740_lcd_8bit),175 INGENIC_PIN_GROUP("lcd-16bit", jz4740_lcd_16bit),176 INGENIC_PIN_GROUP("lcd-18bit", jz4740_lcd_18bit),[all …]
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9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]