xref: /OK3568_Linux_fs/kernel/drivers/memory/Kconfig (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun#
3*4882a593Smuzhiyun# Memory devices
4*4882a593Smuzhiyun#
5*4882a593Smuzhiyun
6*4882a593Smuzhiyunmenuconfig MEMORY
7*4882a593Smuzhiyun	bool "Memory Controller drivers"
8*4882a593Smuzhiyun	help
9*4882a593Smuzhiyun	  This option allows to enable specific memory controller drivers,
10*4882a593Smuzhiyun	  useful mostly on embedded systems.  These could be controllers
11*4882a593Smuzhiyun	  for DRAM (SDR, DDR), ROM, SRAM and others.  The drivers features
12*4882a593Smuzhiyun	  vary from memory tuning and frequency scaling to enabling
13*4882a593Smuzhiyun	  access to attached peripherals through memory bus.
14*4882a593Smuzhiyun
15*4882a593Smuzhiyunif MEMORY
16*4882a593Smuzhiyun
17*4882a593Smuzhiyunconfig DDR
18*4882a593Smuzhiyun	bool
19*4882a593Smuzhiyun	help
20*4882a593Smuzhiyun	  Data from JEDEC specs for DDR SDRAM memories,
21*4882a593Smuzhiyun	  particularly the AC timing parameters and addressing
22*4882a593Smuzhiyun	  information. This data is useful for drivers handling
23*4882a593Smuzhiyun	  DDR SDRAM controllers.
24*4882a593Smuzhiyun
25*4882a593Smuzhiyunconfig ARM_PL172_MPMC
26*4882a593Smuzhiyun	tristate "ARM PL172 MPMC driver"
27*4882a593Smuzhiyun	depends on ARM_AMBA && OF
28*4882a593Smuzhiyun	help
29*4882a593Smuzhiyun	  This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
30*4882a593Smuzhiyun	  If you have an embedded system with an AMBA bus and a PL172
31*4882a593Smuzhiyun	  controller, say Y or M here.
32*4882a593Smuzhiyun
33*4882a593Smuzhiyunconfig ATMEL_SDRAMC
34*4882a593Smuzhiyun	bool "Atmel (Multi-port DDR-)SDRAM Controller"
35*4882a593Smuzhiyun	default y if ARCH_AT91
36*4882a593Smuzhiyun	depends on ARCH_AT91 || COMPILE_TEST
37*4882a593Smuzhiyun	depends on OF
38*4882a593Smuzhiyun	help
39*4882a593Smuzhiyun	  This driver is for Atmel SDRAM Controller or Atmel Multi-port
40*4882a593Smuzhiyun	  DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
41*4882a593Smuzhiyun	  Starting with the at91sam9g45, this controller supports SDR, DDR and
42*4882a593Smuzhiyun	  LP-DDR memories.
43*4882a593Smuzhiyun
44*4882a593Smuzhiyunconfig ATMEL_EBI
45*4882a593Smuzhiyun	bool "Atmel EBI driver"
46*4882a593Smuzhiyun	default y if ARCH_AT91
47*4882a593Smuzhiyun	depends on ARCH_AT91 || COMPILE_TEST
48*4882a593Smuzhiyun	depends on OF
49*4882a593Smuzhiyun	select MFD_SYSCON
50*4882a593Smuzhiyun	select MFD_ATMEL_SMC
51*4882a593Smuzhiyun	help
52*4882a593Smuzhiyun	  Driver for Atmel EBI controller.
53*4882a593Smuzhiyun	  Used to configure the EBI (external bus interface) when the device-
54*4882a593Smuzhiyun	  tree is used. This bus supports NANDs, external ethernet controller,
55*4882a593Smuzhiyun	  SRAMs, ATA devices, etc.
56*4882a593Smuzhiyun
57*4882a593Smuzhiyunconfig BRCMSTB_DPFE
58*4882a593Smuzhiyun	bool "Broadcom STB DPFE driver" if COMPILE_TEST
59*4882a593Smuzhiyun	default y if ARCH_BRCMSTB
60*4882a593Smuzhiyun	depends on ARCH_BRCMSTB || COMPILE_TEST
61*4882a593Smuzhiyun	help
62*4882a593Smuzhiyun	  This driver provides access to the DPFE interface of Broadcom
63*4882a593Smuzhiyun	  STB SoCs. The firmware running on the DCPU inside the DDR PHY can
64*4882a593Smuzhiyun	  provide current information about the system's RAM, for instance
65*4882a593Smuzhiyun	  the DRAM refresh rate. This can be used as an indirect indicator
66*4882a593Smuzhiyun	  for the DRAM's temperature. Slower refresh rate means cooler RAM,
67*4882a593Smuzhiyun	  higher refresh rate means hotter RAM.
68*4882a593Smuzhiyun
69*4882a593Smuzhiyunconfig BT1_L2_CTL
70*4882a593Smuzhiyun	bool "Baikal-T1 CM2 L2-RAM Cache Control Block"
71*4882a593Smuzhiyun	depends on MIPS_BAIKAL_T1 || COMPILE_TEST
72*4882a593Smuzhiyun	select MFD_SYSCON
73*4882a593Smuzhiyun	help
74*4882a593Smuzhiyun	  Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU
75*4882a593Smuzhiyun	  resides Coherency Manager v2 with embedded 1MB L2-cache. It's
76*4882a593Smuzhiyun	  possible to tune the L2 cache performance up by setting the data,
77*4882a593Smuzhiyun	  tags and way-select latencies of RAM access. This driver provides a
78*4882a593Smuzhiyun	  dt properties-based and sysfs interface for it.
79*4882a593Smuzhiyun
80*4882a593Smuzhiyunconfig TI_AEMIF
81*4882a593Smuzhiyun	tristate "Texas Instruments AEMIF driver"
82*4882a593Smuzhiyun	depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST
83*4882a593Smuzhiyun	depends on OF
84*4882a593Smuzhiyun	help
85*4882a593Smuzhiyun	  This driver is for the AEMIF module available in Texas Instruments
86*4882a593Smuzhiyun	  SoCs. AEMIF stands for Asynchronous External Memory Interface and
87*4882a593Smuzhiyun	  is intended to provide a glue-less interface to a variety of
88*4882a593Smuzhiyun	  asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
89*4882a593Smuzhiyun	  of 256M bytes of any of these memories can be accessed at a given
90*4882a593Smuzhiyun	  time via four chip selects with 64M byte access per chip select.
91*4882a593Smuzhiyun
92*4882a593Smuzhiyunconfig TI_EMIF
93*4882a593Smuzhiyun	tristate "Texas Instruments EMIF driver"
94*4882a593Smuzhiyun	depends on ARCH_OMAP2PLUS || COMPILE_TEST
95*4882a593Smuzhiyun	select DDR
96*4882a593Smuzhiyun	help
97*4882a593Smuzhiyun	  This driver is for the EMIF module available in Texas Instruments
98*4882a593Smuzhiyun	  SoCs. EMIF is an SDRAM controller that, based on its revision,
99*4882a593Smuzhiyun	  supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
100*4882a593Smuzhiyun	  This driver takes care of only LPDDR2 memories presently. The
101*4882a593Smuzhiyun	  functions of the driver includes re-configuring AC timing
102*4882a593Smuzhiyun	  parameters and other settings during frequency, voltage and
103*4882a593Smuzhiyun	  temperature changes
104*4882a593Smuzhiyun
105*4882a593Smuzhiyunconfig OMAP_GPMC
106*4882a593Smuzhiyun	bool "Texas Instruments OMAP SoC GPMC driver" if COMPILE_TEST
107*4882a593Smuzhiyun	depends on OF_ADDRESS
108*4882a593Smuzhiyun	select GPIOLIB
109*4882a593Smuzhiyun	help
110*4882a593Smuzhiyun	  This driver is for the General Purpose Memory Controller (GPMC)
111*4882a593Smuzhiyun	  present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
112*4882a593Smuzhiyun	  interfacing to a variety of asynchronous as well as synchronous
113*4882a593Smuzhiyun	  memory drives like NOR, NAND, OneNAND, SRAM.
114*4882a593Smuzhiyun
115*4882a593Smuzhiyunconfig OMAP_GPMC_DEBUG
116*4882a593Smuzhiyun	bool "Enable GPMC debug output and skip reset of GPMC during init"
117*4882a593Smuzhiyun	depends on OMAP_GPMC
118*4882a593Smuzhiyun	help
119*4882a593Smuzhiyun	  Enables verbose debugging mostly to decode the bootloader provided
120*4882a593Smuzhiyun	  timings. To preserve the bootloader provided timings, the reset
121*4882a593Smuzhiyun	  of GPMC is skipped during init. Enable this during development to
122*4882a593Smuzhiyun	  configure devices connected to the GPMC bus.
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun	  NOTE: In addition to matching the register setup with the bootloader
125*4882a593Smuzhiyun	  you also need to match the GPMC FCLK frequency used by the
126*4882a593Smuzhiyun	  bootloader or else the GPMC timings won't be identical with the
127*4882a593Smuzhiyun	  bootloader timings.
128*4882a593Smuzhiyun
129*4882a593Smuzhiyunconfig TI_EMIF_SRAM
130*4882a593Smuzhiyun	tristate "Texas Instruments EMIF SRAM driver"
131*4882a593Smuzhiyun	depends on SOC_AM33XX || SOC_AM43XX || (ARM && CPU_V7 && COMPILE_TEST)
132*4882a593Smuzhiyun	depends on SRAM
133*4882a593Smuzhiyun	help
134*4882a593Smuzhiyun	  This driver is for the EMIF module available on Texas Instruments
135*4882a593Smuzhiyun	  AM33XX and AM43XX SoCs and is required for PM. Certain parts of
136*4882a593Smuzhiyun	  the EMIF PM code must run from on-chip SRAM late in the suspend
137*4882a593Smuzhiyun	  sequence so this driver provides several relocatable PM functions
138*4882a593Smuzhiyun	  for the SoC PM code to use.
139*4882a593Smuzhiyun
140*4882a593Smuzhiyunconfig MVEBU_DEVBUS
141*4882a593Smuzhiyun	bool "Marvell EBU Device Bus Controller"
142*4882a593Smuzhiyun	default y if PLAT_ORION
143*4882a593Smuzhiyun	depends on PLAT_ORION || COMPILE_TEST
144*4882a593Smuzhiyun	depends on OF
145*4882a593Smuzhiyun	help
146*4882a593Smuzhiyun	  This driver is for the Device Bus controller available in some
147*4882a593Smuzhiyun	  Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
148*4882a593Smuzhiyun	  Armada 370 and Armada XP. This controller allows to handle flash
149*4882a593Smuzhiyun	  devices such as NOR, NAND, SRAM, and FPGA.
150*4882a593Smuzhiyun
151*4882a593Smuzhiyunconfig FSL_CORENET_CF
152*4882a593Smuzhiyun	tristate "Freescale CoreNet Error Reporting"
153*4882a593Smuzhiyun	depends on FSL_SOC_BOOKE || COMPILE_TEST
154*4882a593Smuzhiyun	help
155*4882a593Smuzhiyun	  Say Y for reporting of errors from the Freescale CoreNet
156*4882a593Smuzhiyun	  Coherency Fabric.  Errors reported include accesses to
157*4882a593Smuzhiyun	  physical addresses that mapped by no local access window
158*4882a593Smuzhiyun	  (LAW) or an invalid LAW, as well as bad cache state that
159*4882a593Smuzhiyun	  represents a coherency violation.
160*4882a593Smuzhiyun
161*4882a593Smuzhiyunconfig FSL_IFC
162*4882a593Smuzhiyun	bool "Freescale IFC driver" if COMPILE_TEST
163*4882a593Smuzhiyun	depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST
164*4882a593Smuzhiyun	depends on HAS_IOMEM
165*4882a593Smuzhiyun
166*4882a593Smuzhiyunconfig JZ4780_NEMC
167*4882a593Smuzhiyun	bool "Ingenic JZ4780 SoC NEMC driver"
168*4882a593Smuzhiyun	depends on MIPS || COMPILE_TEST
169*4882a593Smuzhiyun	depends on HAS_IOMEM && OF
170*4882a593Smuzhiyun	help
171*4882a593Smuzhiyun	  This driver is for the NAND/External Memory Controller (NEMC) in
172*4882a593Smuzhiyun	  the Ingenic JZ4780. This controller is used to handle external
173*4882a593Smuzhiyun	  memory devices such as NAND and SRAM.
174*4882a593Smuzhiyun
175*4882a593Smuzhiyunconfig MTK_SMI
176*4882a593Smuzhiyun	tristate "MediaTek SoC Memory Controller driver" if COMPILE_TEST
177*4882a593Smuzhiyun	depends on ARCH_MEDIATEK || COMPILE_TEST
178*4882a593Smuzhiyun	help
179*4882a593Smuzhiyun	  This driver is for the Memory Controller module in MediaTek SoCs,
180*4882a593Smuzhiyun	  mainly help enable/disable iommu and control the power domain and
181*4882a593Smuzhiyun	  clocks for each local arbiter.
182*4882a593Smuzhiyun
183*4882a593Smuzhiyunconfig DA8XX_DDRCTL
184*4882a593Smuzhiyun	bool "Texas Instruments da8xx DDR2/mDDR driver"
185*4882a593Smuzhiyun	depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST
186*4882a593Smuzhiyun	help
187*4882a593Smuzhiyun	  This driver is for the DDR2/mDDR Memory Controller present on
188*4882a593Smuzhiyun	  Texas Instruments da8xx SoCs. It's used to tweak various memory
189*4882a593Smuzhiyun	  controller configuration options.
190*4882a593Smuzhiyun
191*4882a593Smuzhiyunconfig PL353_SMC
192*4882a593Smuzhiyun	tristate "ARM PL35X Static Memory Controller(SMC) driver"
193*4882a593Smuzhiyun	default y if ARM
194*4882a593Smuzhiyun	depends on ARM
195*4882a593Smuzhiyun	depends on ARM_AMBA || COMPILE_TEST
196*4882a593Smuzhiyun	help
197*4882a593Smuzhiyun	  This driver is for the ARM PL351/PL353 Static Memory
198*4882a593Smuzhiyun	  Controller(SMC) module.
199*4882a593Smuzhiyun
200*4882a593Smuzhiyunconfig RENESAS_RPCIF
201*4882a593Smuzhiyun	tristate "Renesas RPC-IF driver"
202*4882a593Smuzhiyun	depends on ARCH_RENESAS || COMPILE_TEST
203*4882a593Smuzhiyun	select REGMAP_MMIO
204*4882a593Smuzhiyun	help
205*4882a593Smuzhiyun	  This supports Renesas R-Car Gen3 RPC-IF which provides either SPI
206*4882a593Smuzhiyun	  host or HyperFlash. You'll have to select individual components
207*4882a593Smuzhiyun	  under the corresponding menu.
208*4882a593Smuzhiyun
209*4882a593Smuzhiyunconfig STM32_FMC2_EBI
210*4882a593Smuzhiyun	tristate "Support for FMC2 External Bus Interface on STM32MP SoCs"
211*4882a593Smuzhiyun	depends on MACH_STM32MP157 || COMPILE_TEST
212*4882a593Smuzhiyun	select MFD_SYSCON
213*4882a593Smuzhiyun	help
214*4882a593Smuzhiyun	  Select this option to enable the STM32 FMC2 External Bus Interface
215*4882a593Smuzhiyun	  controller. This driver configures the transactions with external
216*4882a593Smuzhiyun	  devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on
217*4882a593Smuzhiyun	  SOCs containing the FMC2 External Bus Interface.
218*4882a593Smuzhiyun
219*4882a593Smuzhiyunsource "drivers/memory/samsung/Kconfig"
220*4882a593Smuzhiyunsource "drivers/memory/tegra/Kconfig"
221*4882a593Smuzhiyun
222*4882a593Smuzhiyunendif
223