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/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
27 Support Cadence DPI to DSI bridge. This is an internal
28 bridge and is meant to be directly embedded in a SoC.
44 Driver for display connectors with support for DDC and hot-plug
48 on ARM-based platforms. Saying Y here when this driver is not needed
60 Driver for ITE IT6161 DSI to HDMI bridge
72 Driver for Lontium LT9611 DSI to HDMI bridge
73 chip driver that converts dual DSI and I2S to
104 Driver for Maxim MAX96755F GMSL2 Serializer with MIPI-DSI Input.
107 tristate "MegaChips stdp4028-ge-b850v3-fw and stdp2690-ge-b850v3-fw"
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H A Dparade-ps8640.c1 // SPDX-License-Identifier: GPL-2.0-only
38 * page[4]: for MIPI Phy
79 struct i2c_client *client = ps_bridge->page[PAGE3_DSI_CNTL1]; in ps8640_bridge_vdo_control()
87 DRM_ERROR("failed to %sable VDO: %d\n", in ps8640_bridge_vdo_control()
97 struct i2c_client *client = ps_bridge->page[PAGE2_TOP_CNTL]; in ps8640_bridge_poweron()
101 if (ps_bridge->powered) in ps8640_bridge_poweron()
104 ret = regulator_bulk_enable(ARRAY_SIZE(ps_bridge->supplies), in ps8640_bridge_poweron()
105 ps_bridge->supplies); in ps8640_bridge_poweron()
111 gpiod_set_value(ps_bridge->gpio_powerdown, 0); in ps8640_bridge_poweron()
112 gpiod_set_value(ps_bridge->gpio_reset, 1); in ps8640_bridge_poweron()
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H A Dti-sn65dsi86.c1 // SPDX-License-Identifier: GPL-2.0
96 /* fudge factor required to account for 8b/10b encoding */
110 * struct ti_sn_bridge - Platform data for ti-sn65dsi86 driver.
111 * @dev: Pointer to our device.
118 * @dsi: Our MIPI DSI source.
121 * @enable_gpio: The GPIO we toggle to enable the bridge.
124 * @ln_assign: Value to program to the LN_ASSIGN register.
125 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
128 * @gchip_output: A cache of whether we've set GPIOs to output. This
129 * serves double-duty of keeping track of the direction and
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/
H A Dps8640.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPI DSI to eDP Video Format Converter Device Tree Bindings
10 - Nicolas Boichat <drinkcat@chromium.org>
11 - Enric Balletbo i Serra <enric.balletbo@collabora.com>
14 The PS8640 is a low power MIPI-to-eDP video format converter supporting
15 mobile devices with embedded panel resolutions up to 2048 x 1536. The
16 device accepts a single channel of MIPI DSI v1.1, with up to four lanes
17 plus clock, at a transmission rate up to 1.5Gbit/sec per lane. The
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H A Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SN65DSI86 DSI to eDP bridge chip
10 - Sandeep Panda <spanda@codeaurora.org>
13 The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
34 Set if the HPD line on the bridge isn't hooked up to anything or is
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/OK3568_Linux_fs/u-boot/drivers/video/rockchip/
H A DKconfig8 # Author: Eric Gao <eric.gao@rock-chips.com>
15 Rockchip SoCs provide video output capabilities for High-Definition
16 Multimedia Interface (HDMI), Low-voltage Differential Signalling
17 (LVDS), embedded DisplayPort (eDP) and Display Serial Interface (DSI).
19 This driver supports the on-chip video output device, and targets the
27 The maximum horizontal resolution to support for the framebuffer.
29 framebuffer during device-model binding/probing.
36 The maximum vertical resolution to support for the framebuffer.
38 framebuffer during device-model binding/probing.
43 bool "EDP Port"
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/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "Rockchip CSI2 D-PHY Driver"
13 Enable this to support the Rockchip CSI2 DPHY.
20 Enable this to support the Rockchip Display Port PHY.
23 tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
28 Enable this to support the Rockchip MIPI Synopsys DPHY RX0
29 associated to the Rockchip ISP module present in RK3399 SoCs.
31 To compile this driver as a module, choose M here: the module
32 will be called phy-rockchip-dphy-rx0.
39 Enable this to support the Rockchip EMMC PHY.
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/
H A Dintel_bios.c4 * Permission is hereby granted, free of charge, to any person obtaining a
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
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H A Dintel_vbt_defs.h2 * Copyright © 2006-2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
29 * This information is private to VBT parsing in intel_bios.c.
34 #error "intel_vbt_defs.h is private to intel_bios.c"
43 * struct vbt_header - VBT Header structure
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,dsi.txt5 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
9 - compatible: "mediatek,<chip>-dsi"
10 - the supported chips are mt2701, mt7623, mt8173 and mt8183.
11 - reg: Physical base address and length of the controller's registers
12 - interrupts: The interrupt signal from the function block.
13 - clocks: device clocks
14 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
15 - clock-names: must contain "engine", "digital", and "hs"
16 - phys: phandle link to the MIPI D-PHY controller.
17 - phy-names: must contain "dphy"
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/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A DKconfig7 Rockchip SoCs provide video output capabilities for High-Definition
8 Multimedia Interface (HDMI), Low-voltage Differential Signalling
9 (LVDS), embedded DisplayPort (eDP) and Display Serial Interface (DSI).
11 This driver supports the on-chip video output device, and targets the
37 Driver for Maxim MAX96755F GMSL2 Serializer with MIPI-DSI Input.
40 bool "Rohm BU18RL82-based panels"
43 Say Y if you want to enable support for panels based on the
47 bool "Maxim MAX96752F-based panels"
50 Say Y if you want to enable support for panels based on the
62 Driver for ROHM clockless serdes with MIPI or LVDS Input.
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H A Ddrm_dsc.c1 // SPDX-License-Identifier: MIT
17 * Compression (DSC) used to compress the pixel bits before sending it on
18 * DP/eDP/MIPI DSI interface. DSC is required to be enabled so that the existing
22 * These functions contain some common logic and helpers to deal with VESA
23 * Display Stream Compression standard required for DSC on Display Port/eDP or
24 * MIPI display interfaces.
28 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
34 * picture parameter infoframes from the source to the sink.
42 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
43 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
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/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3399/
H A DKconfig11 with full function and phisical connectors support like type-C ports,
12 usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
15 bool "Theobroma Systems RK3399-Q7 (Puma)"
17 The RK3399-Q7 (Puma) is a system-on-module (designed and
19 in a Qseven-compatible form-factor (running of a single 5V
20 supply and exposing its external interfaces on a MXM-230
23 Key features of the RK3399-Q7 include:
24 * on-module USB 3.0 hub (2x USB 3.0 host + 1x USB 2.0 host)
25 * USB 3.0 dual-role
26 * on-module Micrel KSZ9031 GbE PHY
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/OK3568_Linux_fs/u-boot/drivers/video/
H A DKconfig13 to display a command-line console or splash screen. Enabling this
23 to display a command-line console or splash screen. Enabling this
37 If you have a LCD backlight adjustable by PWM, say Y to enable
39 This driver can be use with "simple-panel" and
41 (leds/backlight/pwm-backlight.txt)
47 If you have a LCD backlight adjustable by GPIO, say Y to enable
49 This driver can be used with "simple-panel" and
51 (leds/backlight/gpio-backlight.txt)
54 bool "Support 8-bit-per-pixel displays"
58 Support drawing text and bitmaps onto a 8-bit-per-pixel display.
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/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3288/
H A DKconfig4 bool "Google/Rockchip Veyron-Jerry Chromebook"
7 Jerry is a RK3288-based clamshell device with 2 USB 3.0 ports,
8 HDMI, an 11.9 inch EDP display, micro-SD card, touchpad and
9 WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
13 bool "Google/Rockchip Veyron-Mickey Chromebit"
16 Mickey is a small RK3288-based device with one USB 3.0 port, HDMI
17 and WiFi. It has a separate power port and is designed to connect
18 to the HDMI input of a monitor or TV. It has no internal battery.
19 Typically a USB hub or wireless keyboard/touchpad is used to get
23 bool "Google/Rockchip Veyron-Minnie Chromebook"
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/
H A Ddrm_dsc.c1 // SPDX-License-Identifier: MIT
22 * Compression (DSC) used to compress the pixel bits before sending it on
23 * DP/eDP/MIPI DSI interface. DSC is required to be enabled so that the existing
27 * These functions contain some common logic and helpers to deal with VESA
28 * Display Stream Compression standard required for DSC on Display Port/eDP or
29 * MIPI display interfaces.
33 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
39 * picture parameter infoframes from the source to the sink.
47 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
48 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
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/OK3568_Linux_fs/u-boot/board/rockchip/evb_rk3328/
H A DREADME4 RK3328 key features we might use in U-Boot:
5 * CPU: ARMv8 64bit quad-core Cortex-A53
7 * DRAM: 4GB-16MB dual-channel
11 * Display: RGB/HDMI/DP/MIPI/EDP
18 In order to support Arm Trust Firmware(ATF), we need to use the
22 * load and verify U-Boot image
24 Here is the step-by-step to boot to U-Boot on rk3328.
31 > git clone https://github.com/ARM-software/arm-trusted-firmware.git
32 > git clone https://github.com/rockchip-linux/rkbin
33 > git clone https://github.com/rockchip-linux/rkflashtool
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.txt4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
13 - "aotag"
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3588.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy-snps-pcie3.h>
8 #include "rk3588-vccio3-pinctrl.dtsi"
30 rkcif_mipi_lvds4: rkcif-mipi-lvds4 {
31 compatible = "rockchip,rkcif-mipi-lvds";
37 rkcif_mipi_lvds4_sditf: rkcif-mipi-lvds4-sditf {
38 compatible = "rockchip,rkcif-sditf";
43 rkcif_mipi_lvds4_sditf_vir1: rkcif-mipi-lvds4-sditf-vir1 {
44 compatible = "rockchip,rkcif-sditf";
49 rkcif_mipi_lvds4_sditf_vir2: rkcif-mipi-lvds4-sditf-vir2 {
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
3 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb
4 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb
5 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb
6 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11.dtb
7 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11-avb.dtb
8 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v11-linux.dtb
9 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr4-v10.dtb
10 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr4-v10-linux.dtb
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/OK3568_Linux_fs/kernel/Documentation/userspace-api/media/mediactl/
H A Dmedia-types.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _media-controller-types:
5 Types and flags used to represent the media graph elements
10 .. _media-entity-functions:
11 .. _MEDIA-ENT-F-UNKNOWN:
12 .. _MEDIA-ENT-F-V4L2-SUBDEV-UNKNOWN:
13 .. _MEDIA-ENT-F-IO-V4L:
14 .. _MEDIA-ENT-F-IO-VBI:
15 .. _MEDIA-ENT-F-IO-SWRADIO:
16 .. _MEDIA-ENT-F-IO-DTV:
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/OK3568_Linux_fs/u-boot/board/theobroma-systems/puma_rk3399/
H A DREADME4 The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip
5 RK3399 in a Qseven-compatible form-factor.
7 RK3399-Q7 features:
8 * CPU: ARMv8 64bit Big-Little architecture,
9 * Big: dual-core Cortex-A72
10 * Little: quad-core Cortex-A53
12 * DRAM: 4GB-128MB dual-channel
19 * Display: HDMI/eDP/MIPI
22 * Companion Controller: onboard additional Cortex-M0 microcontroller
27 Here is the step-by-step to boot to U-Boot on rk3399.
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/OK3568_Linux_fs/u-boot/board/rockchip/evb_rk3399/
H A DREADME4 RK3399 key features we might use in U-Boot:
5 * CPU: ARMv8 64bit Big-Little architecture,
6 * Big: dual-core Cortex-A72
7 * Little: quad-core Cortex-A53
9 * DRAM: 4GB-128MB dual-channel
12 * USB: USB3.0 typc-C port *2 with dwc3 controller
14 * Display: RGB/HDMI/DP/MIPI/EDP
21 In order to support Arm Trust Firmware(ATF), we can use either SPL or
22 miniloader from rockchip to do:
25 * load and verify U-Boot image
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/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/gpu/
H A Dnvidia,tegra20-host1x.txt4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 - interrupts: The interrupt outputs from the controller.
7 - #address-cells: The number of cells used to represent physical base addresses
9 - #size-cells: The number of cells used to represent the size of an address
11 - ranges: The mapping of the host1x address space to the CPU address space.
12 - clocks: Must contain one entry, for the module clock.
13 See ../clocks/clock-bindings.txt for details.
14 - resets: Must contain an entry for each entry in reset-names.
16 - reset-names: Must include the following entries:
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-host1x.txt4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
[all …]

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