xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/ps8640.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/display/bridge/ps8640.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: MIPI DSI to eDP Video Format Converter Device Tree Bindings
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Nicolas Boichat <drinkcat@chromium.org>
11*4882a593Smuzhiyun  - Enric Balletbo i Serra <enric.balletbo@collabora.com>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyundescription: |
14*4882a593Smuzhiyun  The PS8640 is a low power MIPI-to-eDP video format converter supporting
15*4882a593Smuzhiyun  mobile devices with embedded panel resolutions up to 2048 x 1536. The
16*4882a593Smuzhiyun  device accepts a single channel of MIPI DSI v1.1, with up to four lanes
17*4882a593Smuzhiyun  plus clock, at a transmission rate up to 1.5Gbit/sec per lane. The
18*4882a593Smuzhiyun  device outputs eDP v1.4, one or two lanes, at a link rate of up to
19*4882a593Smuzhiyun  3.24Gbit/sec per lane.
20*4882a593Smuzhiyun
21*4882a593Smuzhiyunproperties:
22*4882a593Smuzhiyun  compatible:
23*4882a593Smuzhiyun    const: parade,ps8640
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun  reg:
26*4882a593Smuzhiyun    maxItems: 1
27*4882a593Smuzhiyun    description: Base I2C address of the device.
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun  powerdown-gpios:
30*4882a593Smuzhiyun    maxItems: 1
31*4882a593Smuzhiyun    description: GPIO connected to active low powerdown.
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun  reset-gpios:
34*4882a593Smuzhiyun    maxItems: 1
35*4882a593Smuzhiyun    description: GPIO connected to active low reset.
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun  vdd12-supply:
38*4882a593Smuzhiyun    maxItems: 1
39*4882a593Smuzhiyun    description: Regulator for 1.2V digital core power.
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun  vdd33-supply:
42*4882a593Smuzhiyun    maxItems: 1
43*4882a593Smuzhiyun    description: Regulator for 3.3V digital core power.
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun  ports:
46*4882a593Smuzhiyun    type: object
47*4882a593Smuzhiyun    description:
48*4882a593Smuzhiyun      A node containing DSI input & output port nodes with endpoint
49*4882a593Smuzhiyun      definitions as documented in
50*4882a593Smuzhiyun      Documentation/devicetree/bindings/media/video-interfaces.txt
51*4882a593Smuzhiyun      Documentation/devicetree/bindings/graph.txt
52*4882a593Smuzhiyun    properties:
53*4882a593Smuzhiyun      '#address-cells':
54*4882a593Smuzhiyun        const: 1
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun      '#size-cells':
57*4882a593Smuzhiyun        const: 0
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun      port@0:
60*4882a593Smuzhiyun        type: object
61*4882a593Smuzhiyun        description: |
62*4882a593Smuzhiyun          Video port for DSI input
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun      port@1:
65*4882a593Smuzhiyun        type: object
66*4882a593Smuzhiyun        description: |
67*4882a593Smuzhiyun          Video port for eDP output (panel or connector).
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun    required:
70*4882a593Smuzhiyun      - port@0
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun    additionalProperties: false
73*4882a593Smuzhiyun
74*4882a593Smuzhiyunrequired:
75*4882a593Smuzhiyun  - compatible
76*4882a593Smuzhiyun  - reg
77*4882a593Smuzhiyun  - powerdown-gpios
78*4882a593Smuzhiyun  - reset-gpios
79*4882a593Smuzhiyun  - vdd12-supply
80*4882a593Smuzhiyun  - vdd33-supply
81*4882a593Smuzhiyun  - ports
82*4882a593Smuzhiyun
83*4882a593SmuzhiyunadditionalProperties: false
84*4882a593Smuzhiyun
85*4882a593Smuzhiyunexamples:
86*4882a593Smuzhiyun  - |
87*4882a593Smuzhiyun    #include <dt-bindings/gpio/gpio.h>
88*4882a593Smuzhiyun    i2c0 {
89*4882a593Smuzhiyun        #address-cells = <1>;
90*4882a593Smuzhiyun        #size-cells = <0>;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun        ps8640: edp-bridge@18 {
93*4882a593Smuzhiyun            compatible = "parade,ps8640";
94*4882a593Smuzhiyun            reg = <0x18>;
95*4882a593Smuzhiyun            powerdown-gpios = <&pio 116 GPIO_ACTIVE_LOW>;
96*4882a593Smuzhiyun            reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
97*4882a593Smuzhiyun            vdd12-supply = <&ps8640_fixed_1v2>;
98*4882a593Smuzhiyun            vdd33-supply = <&mt6397_vgp2_reg>;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun            ports {
101*4882a593Smuzhiyun                #address-cells = <1>;
102*4882a593Smuzhiyun                #size-cells = <0>;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun                port@0 {
105*4882a593Smuzhiyun                    reg = <0>;
106*4882a593Smuzhiyun                    ps8640_in: endpoint {
107*4882a593Smuzhiyun                        remote-endpoint = <&dsi0_out>;
108*4882a593Smuzhiyun                    };
109*4882a593Smuzhiyun                };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun                port@1 {
112*4882a593Smuzhiyun                    reg = <1>;
113*4882a593Smuzhiyun                    ps8640_out: endpoint {
114*4882a593Smuzhiyun                        remote-endpoint = <&panel_in>;
115*4882a593Smuzhiyun                   };
116*4882a593Smuzhiyun                };
117*4882a593Smuzhiyun            };
118*4882a593Smuzhiyun        };
119*4882a593Smuzhiyun    };
120*4882a593Smuzhiyun
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