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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dimx8mp-pinfunc.h13 #define MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x014 0x274 0x000 0x0 0x0
14 #define MX8MP_IOMUXC_GPIO1_IO00__CCM_ENET_PHY_REF_CLK_ROOT 0x014 0x274 0x000 0x1 0x0
15 #define MX8MP_IOMUXC_GPIO1_IO00__ISP_FL_TRIG_0 0x014 0x274 0x5D4 0x3 0x0
16 #define MX8MP_IOMUXC_GPIO1_IO00__CCM_EXT_CLK1 0x014 0x274 0x000 0x6 0x0
17 #define MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x018 0x278 0x000 0x0 0x0
18 #define MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x018 0x278 0x000 0x1 0x0
19 #define MX8MP_IOMUXC_GPIO1_IO01__ISP_SHUTTER_TRIG_0 0x018 0x278 0x5DC 0x3 0x0
20 #define MX8MP_IOMUXC_GPIO1_IO01__CCM_EXT_CLK2 0x018 0x278 0x000 0x6 0x0
21 #define MX8MP_IOMUXC_GPIO1_IO02__GPIO1_IO02 0x01C 0x27C 0x000 0x0 0x0
22 #define MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x01C 0x27C 0x000 0x1 0x0
[all …]
H A Dimx8mq-pinfunc.h15 #define MX8MQ_IOMUXC_PMIC_STBY_REQ_CCMSRCGPCMIX_PMIC_STBY_REQ 0x014 0x27C 0x000 0x0 0…
16 #define MX8MQ_IOMUXC_PMIC_ON_REQ_SNVSMIX_PMIC_ON_REQ 0x018 0x280 0x000 0x0 0…
17 #define MX8MQ_IOMUXC_ONOFF_SNVSMIX_ONOFF 0x01C 0x284 0x000 0x0 0…
18 #define MX8MQ_IOMUXC_POR_B_SNVSMIX_POR_B 0x020 0x288 0x000 0x0 0…
19 #define MX8MQ_IOMUXC_RTC_RESET_B_SNVSMIX_RTC_RESET_B 0x024 0x28C 0x000 0x0 0…
20 #define MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0…
21 #define MX8MQ_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x4C0 0x1 0…
22 #define MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0…
23 #define MX8MQ_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0…
24 #define MX8MQ_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0…
[all …]
H A Dimx8mm-pinfunc.h14 #define MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0…
15 #define MX8MM_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x4C0 0x1 0…
16 #define MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0…
17 #define MX8MM_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0…
18 #define MX8MM_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0…
19 #define MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x02C 0x294 0x000 0x0 0…
20 #define MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x02C 0x294 0x000 0x1 0…
21 #define MX8MM_IOMUXC_GPIO1_IO01_ANAMIX_REF_CLK_24M 0x02C 0x294 0x4BC 0x5 0…
22 #define MX8MM_IOMUXC_GPIO1_IO01_CCMSRCGPCMIX_EXT_CLK2 0x02C 0x294 0x000 0x6 0…
23 #define MX8MM_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0…
[all …]
H A Dimx8mn-pinfunc.h14 …ne MX8MN_IOMUXC_BOOT_MODE2_CCMSRCGPCMIX_BOOT_MODE2 0x020 0x25C 0x000 0x0 0x0
15 …ne MX8MN_IOMUXC_BOOT_MODE2_I2C1_SCL 0x020 0x25C 0x55C 0x1 0x3
16 …ne MX8MN_IOMUXC_BOOT_MODE3_CCMSRCGPCMIX_BOOT_MODE3 0x024 0x260 0x000 0x0 0x0
17 …ne MX8MN_IOMUXC_BOOT_MODE3_I2C1_SDA 0x024 0x260 0x56C 0x1 0x3
18 …ne MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0x0
19 …ne MX8MN_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x000 0x1 0x0
20 …ne MX8MN_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0x0
21 …ne MX8MN_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0x0
22 …ne MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x02C 0x294 0x000 0x0 0x0
23 …ne MX8MN_IOMUXC_GPIO1_IO01_PWM1_OUT 0x02C 0x294 0x000 0x1 0x0
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/phydm/halrf/rtl8821c/
H A Dhalrf_iqk_8821c.c35 #define txgap_ref_index 0x0
36 #define txgap_k_number 0x7
71 /*this function is only used after the version of nctl8.0*/ in _iqk_check_nctl_done_8821c()
74 u32 delay_count = 0x0; in _iqk_check_nctl_done_8821c()
77 if ((IQK_CMD & 0x00000f00) >> 8 == 0xc) { in _iqk_check_nctl_done_8821c()
78 if (odm_get_rf_reg(dm, path, RF_0x08, RFREGOFFSETMASK) == 0x1a3b5) in _iqk_check_nctl_done_8821c()
83 if (odm_get_rf_reg(dm, path, RF_0x08, RFREGOFFSETMASK) == 0x12345) in _iqk_check_nctl_done_8821c()
96 … "[IQK](1)IQK_CMD =0x%x, Fail, 0x1b08=0x%x, RF08=0x%x, 1b00=0x%x,fail=0x%x, notready=0x%x!!!\n", in _iqk_check_nctl_done_8821c()
97 IQK_CMD, odm_read_4byte(dm, 0x1b08), in _iqk_check_nctl_done_8821c()
100 odm_read_4byte(dm, 0x1b00), fail, in _iqk_check_nctl_done_8821c()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/phydm/halrf/rtl8821c/
H A Dhalrf_iqk_8821c.c34 #define txgap_ref_index 0x0
35 #define txgap_k_number 0x7
70 /*this function is only used after the version of nctl8.0*/ in _iqk_check_nctl_done_8821c()
73 u32 delay_count = 0x0; in _iqk_check_nctl_done_8821c()
76 if ((IQK_CMD & 0x00000f00) >> 8 == 0xc) { in _iqk_check_nctl_done_8821c()
77 if (odm_get_rf_reg(dm, path, RF_0x08, RFREGOFFSETMASK) == 0x1a3b5) in _iqk_check_nctl_done_8821c()
82 if (odm_get_rf_reg(dm, path, RF_0x08, RFREGOFFSETMASK) == 0x12345) in _iqk_check_nctl_done_8821c()
95 … "[IQK](1)IQK_CMD =0x%x, Fail, 0x1b08=0x%x, RF08=0x%x, 1b00=0x%x,fail=0x%x, notready=0x%x!!!\n", in _iqk_check_nctl_done_8821c()
96 IQK_CMD, odm_read_4byte(dm, 0x1b08), in _iqk_check_nctl_done_8821c()
99 odm_read_4byte(dm, 0x1b00), fail, in _iqk_check_nctl_done_8821c()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx8mq-pinctrl.yaml72 reg = <0x30330000 0x10000>;
76 <0x234 0x49C 0x4F4 0x0 0x0 0x49>,
77 <0x238 0x4A0 0x4F4 0x0 0x0 0x49>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx53-pinfunc.h13 #define MX53_PAD_GPIO_19__KPP_COL_5 0x020 0x348 0x840 0x0 0x0
14 #define MX53_PAD_GPIO_19__GPIO4_5 0x020 0x348 0x000 0x1 0x0
15 #define MX53_PAD_GPIO_19__CCM_CLKO 0x020 0x348 0x000 0x2 0x0
16 #define MX53_PAD_GPIO_19__SPDIF_OUT1 0x020 0x348 0x000 0x3 0x0
17 #define MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 0x020 0x348 0x000 0x4 0x0
18 #define MX53_PAD_GPIO_19__ECSPI1_RDY 0x020 0x348 0x000 0x5 0x0
19 #define MX53_PAD_GPIO_19__FEC_TDATA_3 0x020 0x348 0x000 0x6 0x0
20 #define MX53_PAD_GPIO_19__SRC_INT_BOOT 0x020 0x348 0x000 0x7 0x0
21 #define MX53_PAD_KEY_COL0__KPP_COL_0 0x024 0x34c 0x000 0x0 0x0
22 #define MX53_PAD_KEY_COL0__GPIO4_6 0x024 0x34c 0x000 0x1 0x0
[all …]
H A Dimx6sl-pinfunc.h13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
H A Dimx6q-pinfunc.h13 #define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x04c 0x360 0x000 0x0 0x0
14 #define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0
15 #define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0
16 #define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x04c 0x360 0x7c8 0x3 0x0
17 #define MX6QDL_PAD_SD2_DAT1__KEY_COL7 0x04c 0x360 0x8f0 0x4 0x0
18 #define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0
19 #define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x050 0x364 0x000 0x0 0x0
20 #define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0
21 #define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0
22 #define MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x050 0x364 0x7b8 0x3 0x0
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx53-pinfunc.h17 #define MX53_PAD_GPIO_19__KPP_COL_5 0x020 0x348 0x840 0x0 0x0
18 #define MX53_PAD_GPIO_19__GPIO4_5 0x020 0x348 0x000 0x1 0x0
19 #define MX53_PAD_GPIO_19__CCM_CLKO 0x020 0x348 0x000 0x2 0x0
20 #define MX53_PAD_GPIO_19__SPDIF_OUT1 0x020 0x348 0x000 0x3 0x0
21 #define MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 0x020 0x348 0x000 0x4 0x0
22 #define MX53_PAD_GPIO_19__ECSPI1_RDY 0x020 0x348 0x000 0x5 0x0
23 #define MX53_PAD_GPIO_19__FEC_TDATA_3 0x020 0x348 0x000 0x6 0x0
24 #define MX53_PAD_GPIO_19__SRC_INT_BOOT 0x020 0x348 0x000 0x7 0x0
25 #define MX53_PAD_KEY_COL0__KPP_COL_0 0x024 0x34c 0x000 0x0 0x0
26 #define MX53_PAD_KEY_COL0__GPIO4_6 0x024 0x34c 0x000 0x1 0x0
[all …]
H A Dimx6sl-pinfunc.h17 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
18 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
19 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
20 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
21 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
22 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
23 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
24 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
25 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
26 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
H A Dimx6q-pinfunc.h17 #define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x04c 0x360 0x000 0x0 0x0
18 #define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0
19 #define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0
20 #define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x04c 0x360 0x7c8 0x3 0x0
21 #define MX6QDL_PAD_SD2_DAT1__KEY_COL7 0x04c 0x360 0x8f0 0x4 0x0
22 #define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0
23 #define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x050 0x364 0x000 0x0 0x0
24 #define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0
25 #define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0
26 #define MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x050 0x364 0x7b8 0x3 0x0
[all …]
/OK3568_Linux_fs/kernel/drivers/misc/habanalabs/include/goya/asic_reg/
H A Dpci_nrtr_regs.h22 #define mmPCI_NRTR_HBW_MAX_CRED 0x100
24 #define mmPCI_NRTR_LBW_MAX_CRED 0x120
26 #define mmPCI_NRTR_DBG_E_ARB 0x300
28 #define mmPCI_NRTR_DBG_W_ARB 0x304
30 #define mmPCI_NRTR_DBG_N_ARB 0x308
32 #define mmPCI_NRTR_DBG_S_ARB 0x30C
34 #define mmPCI_NRTR_DBG_L_ARB 0x310
36 #define mmPCI_NRTR_DBG_E_ARB_MAX 0x320
38 #define mmPCI_NRTR_DBG_W_ARB_MAX 0x324
40 #define mmPCI_NRTR_DBG_N_ARB_MAX 0x328
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/tegra/
H A Dclk-tegra-audio.c17 #define AUDIO_SYNC_CLK_I2S0 0x4a0
18 #define AUDIO_SYNC_CLK_I2S1 0x4a4
19 #define AUDIO_SYNC_CLK_I2S2 0x4a8
20 #define AUDIO_SYNC_CLK_I2S3 0x4ac
21 #define AUDIO_SYNC_CLK_I2S4 0x4b0
22 #define AUDIO_SYNC_CLK_SPDIF 0x4b4
23 #define AUDIO_SYNC_CLK_DMIC1 0x560
24 #define AUDIO_SYNC_CLK_DMIC2 0x564
25 #define AUDIO_SYNC_CLK_DMIC3 0x6b8
27 #define AUDIO_SYNC_DOUBLER 0x49c
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/halrf/rtl8822c/
H A Dhalrf_8822c.c42 u8 path = 0x0; in halrf_rf_lna_setting_8822c()
44 for (path = 0x0; path < 2; path++) in halrf_rf_lna_setting_8822c()
48 0x1); in halrf_rf_lna_setting_8822c()
50 RFREGOFFSETMASK, 0x00003); in halrf_rf_lna_setting_8822c()
52 RFREGOFFSETMASK, 0x00064); in halrf_rf_lna_setting_8822c()
54 RFREGOFFSETMASK, 0x0afce); in halrf_rf_lna_setting_8822c()
56 0x0); in halrf_rf_lna_setting_8822c()
60 0x1); in halrf_rf_lna_setting_8822c()
62 RFREGOFFSETMASK, 0x00003); in halrf_rf_lna_setting_8822c()
64 RFREGOFFSETMASK, 0x00064); in halrf_rf_lna_setting_8822c()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx5/
H A Diomux-mx53.h31 MX53_PAD_GPIO_19__KPP_COL_5 = IOMUX_PAD(0x348, 0x020, 0, 0x840, 0, NO_PAD_CTRL),
32 MX53_PAD_GPIO_19__GPIO4_5 = IOMUX_PAD(0x348, 0x020, 1, __NA_, 0, NO_PAD_CTRL),
33 MX53_PAD_GPIO_19__CCM_CLKO = IOMUX_PAD(0x348, 0x020, 2, __NA_, 0, NO_PAD_CTRL),
34 MX53_PAD_GPIO_19__SPDIF_OUT1 = IOMUX_PAD(0x348, 0x020, 3, __NA_, 0, NO_PAD_CTRL),
35 MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 = IOMUX_PAD(0x348, 0x020, 4, __NA_, 0, NO_PAD_CTRL),
36 MX53_PAD_GPIO_19__ECSPI1_RDY = IOMUX_PAD(0x348, 0x020, 5, __NA_, 0, NO_PAD_CTRL),
37 MX53_PAD_GPIO_19__FEC_TDATA_3 = IOMUX_PAD(0x348, 0x020, 6, __NA_, 0, NO_PAD_CTRL),
38 MX53_PAD_GPIO_19__SRC_INT_BOOT = IOMUX_PAD(0x348, 0x020, 7, __NA_, 0, NO_PAD_CTRL),
39 MX53_PAD_KEY_COL0__KPP_COL_0 = IOMUX_PAD(0x34C, 0x024, 0, __NA_, 0, NO_PAD_CTRL),
40 MX53_PAD_KEY_COL0__GPIO4_6 = IOMUX_PAD(0x34C, 0x024, 1, __NA_, 0, NO_PAD_CTRL),
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun9i.h13 u32 pll1_c0_cfg; /* 0x00 c0cpu# pll configuration */
14 u32 pll2_c1_cfg; /* 0x04 c1cpu# pll configuration */
15 u32 pll3_audio_cfg; /* 0x08 audio pll configuration */
16 u32 pll4_periph0_cfg; /* 0x0c peripheral0 pll configuration */
17 u32 pll5_ve_cfg; /* 0x10 videoengine pll configuration */
18 u32 pll6_ddr_cfg; /* 0x14 ddr pll configuration */
19 u32 pll7_video0_cfg; /* 0x18 video0 pll configuration */
20 u32 pll8_video1_cfg; /* 0x1c video1 pll configuration */
21 u32 pll9_gpu_cfg; /* 0x20 gpu pll configuration */
22 u32 pll10_de_cfg; /* 0x24 displayengine pll configuration */
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/vt8500/
H A Dpinctrl-wm8650.c18 * The dedicated external GPIO's should always be listed in bank 0
19 * so they are exported in the 0..31 range which is what users
25 WMT_PINCTRL_BANK(0x40, 0x80, 0xC0, 0x00, 0x480, 0x4C0), /* 0 */
26 WMT_PINCTRL_BANK(0x44, 0x84, 0xC4, 0x04, 0x484, 0x4C4), /* 1 */
27 WMT_PINCTRL_BANK(0x48, 0x88, 0xC8, 0x08, 0x488, 0x4C8), /* 2 */
28 WMT_PINCTRL_BANK(0x4C, 0x8C, 0xCC, 0x0C, 0x48C, 0x4CC), /* 3 */
29 WMT_PINCTRL_BANK(0x50, 0x90, 0xD0, 0x10, 0x490, 0x4D0), /* 4 */
30 WMT_PINCTRL_BANK(0x54, 0x94, 0xD4, 0x14, 0x494, 0x4D4), /* 5 */
31 WMT_PINCTRL_BANK(0x58, 0x98, 0xD8, 0x18, 0x498, 0x4D8), /* 6 */
32 WMT_PINCTRL_BANK(0x5C, 0x9C, 0xDC, 0x1C, 0x49C, 0x4DC), /* 7 */
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/mt7621-pci-phy/
H A Dpci-mt7621-phy.c19 #define RG_PE1_PIPE_REG 0x02c
23 #define RG_P0_TO_P1_WIDTH 0x100
24 #define RG_PE1_H_LCDDS_REG 0x49c
25 #define RG_PE1_H_LCDDS_PCW GENMASK(30, 0)
26 #define RG_PE1_H_LCDDS_PCW_VAL(x) ((0x7fffffff & (x)) << 0)
28 #define RG_PE1_FRC_H_XTAL_REG 0x400
31 #define RG_PE1_H_XTAL_TYPE_VAL(x) ((0x3 & (x)) << 9)
33 #define RG_PE1_FRC_PHY_REG 0x000
37 #define RG_PE1_H_PLL_REG 0x490
39 #define RG_PE1_H_PLL_BC_VAL(x) ((0x3 & (x)) << 22)
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/hal/phydm/
H A Dphydm_rainfo.h50 #define FIRST_MACID 0
59 RADBG_PCR_TH_OFFSET = 0,
70 RADBG_DEBUG_MONITOR1 = 0xc,
71 RADBG_DEBUG_MONITOR2 = 0xd,
72 RADBG_DEBUG_MONITOR3 = 0xe,
73 RADBG_DEBUG_MONITOR4 = 0xf,
74 RADBG_DEBUG_MONITOR5 = 0x10,
79 PHYDM_WIRELESS_MODE_UNKNOWN = 0x00,
80 PHYDM_WIRELESS_MODE_A = 0x01,
81 PHYDM_WIRELESS_MODE_B = 0x02,
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/hal/phydm/
H A Dphydm_rainfo.h50 #define FIRST_MACID 0
59 RADBG_PCR_TH_OFFSET = 0,
70 RADBG_DEBUG_MONITOR1 = 0xc,
71 RADBG_DEBUG_MONITOR2 = 0xd,
72 RADBG_DEBUG_MONITOR3 = 0xe,
73 RADBG_DEBUG_MONITOR4 = 0xf,
74 RADBG_DEBUG_MONITOR5 = 0x10,
79 PHYDM_WIRELESS_MODE_UNKNOWN = 0x00,
80 PHYDM_WIRELESS_MODE_A = 0x01,
81 PHYDM_WIRELESS_MODE_B = 0x02,
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/phydm/
H A Dphydm_rainfo.h50 #define FIRST_MACID 0
59 RADBG_PCR_TH_OFFSET = 0,
70 RADBG_DEBUG_MONITOR1 = 0xc,
71 RADBG_DEBUG_MONITOR2 = 0xd,
72 RADBG_DEBUG_MONITOR3 = 0xe,
73 RADBG_DEBUG_MONITOR4 = 0xf,
74 RADBG_DEBUG_MONITOR5 = 0x10,
79 PHYDM_WIRELESS_MODE_UNKNOWN = 0x00,
80 PHYDM_WIRELESS_MODE_A = 0x01,
81 PHYDM_WIRELESS_MODE_B = 0x02,
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/phydm/
H A Dphydm_rainfo.h50 #define FIRST_MACID 0
59 RADBG_PCR_TH_OFFSET = 0,
70 RADBG_DEBUG_MONITOR1 = 0xc,
71 RADBG_DEBUG_MONITOR2 = 0xd,
72 RADBG_DEBUG_MONITOR3 = 0xe,
73 RADBG_DEBUG_MONITOR4 = 0xf,
74 RADBG_DEBUG_MONITOR5 = 0x10,
79 PHYDM_WIRELESS_MODE_UNKNOWN = 0x00,
80 PHYDM_WIRELESS_MODE_A = 0x01,
81 PHYDM_WIRELESS_MODE_B = 0x02,
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/hal/phydm/
H A Dphydm_rainfo.h51 #define FIRST_MACID 0
60 RADBG_PCR_TH_OFFSET = 0,
71 RADBG_DEBUG_MONITOR1 = 0xc,
72 RADBG_DEBUG_MONITOR2 = 0xd,
73 RADBG_DEBUG_MONITOR3 = 0xe,
74 RADBG_DEBUG_MONITOR4 = 0xf,
75 RADBG_DEBUG_MONITOR5 = 0x10,
80 PHYDM_WIRELESS_MODE_UNKNOWN = 0x00,
81 PHYDM_WIRELESS_MODE_A = 0x01,
82 PHYDM_WIRELESS_MODE_B = 0x02,
[all …]

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