xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/vt8500/pinctrl-wm8650.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Pinctrl data for Wondermedia WM8650 SoC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include "pinctrl-wmt.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun  * Describe the register offsets within the GPIO memory space
18*4882a593Smuzhiyun  * The dedicated external GPIO's should always be listed in bank 0
19*4882a593Smuzhiyun  * so they are exported in the 0..31 range which is what users
20*4882a593Smuzhiyun  * expect.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * Do not reorder these banks as it will change the pin numbering
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun static const struct wmt_pinctrl_bank_registers wm8650_banks[] = {
25*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x40, 0x80, 0xC0, 0x00, 0x480, 0x4C0),		/* 0 */
26*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x44, 0x84, 0xC4, 0x04, 0x484, 0x4C4),		/* 1 */
27*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x48, 0x88, 0xC8, 0x08, 0x488, 0x4C8),		/* 2 */
28*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x4C, 0x8C, 0xCC, 0x0C, 0x48C, 0x4CC),		/* 3 */
29*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x50, 0x90, 0xD0, 0x10, 0x490, 0x4D0),		/* 4 */
30*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x54, 0x94, 0xD4, 0x14, 0x494, 0x4D4),		/* 5 */
31*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x58, 0x98, 0xD8, 0x18, 0x498, 0x4D8),		/* 6 */
32*4882a593Smuzhiyun 	WMT_PINCTRL_BANK(0x5C, 0x9C, 0xDC, 0x1C, 0x49C, 0x4DC),		/* 7 */
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun /* Please keep sorted by bank/bit */
36*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO0	WMT_PIN(0, 0)
37*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO1	WMT_PIN(0, 1)
38*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO2	WMT_PIN(0, 2)
39*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO3	WMT_PIN(0, 3)
40*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO4	WMT_PIN(0, 4)
41*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO5	WMT_PIN(0, 5)
42*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO6	WMT_PIN(0, 6)
43*4882a593Smuzhiyun #define WMT_PIN_EXTGPIO7	WMT_PIN(0, 7)
44*4882a593Smuzhiyun #define WMT_PIN_WAKEUP0		WMT_PIN(0, 16)
45*4882a593Smuzhiyun #define WMT_PIN_WAKEUP1		WMT_PIN(0, 17)
46*4882a593Smuzhiyun #define WMT_PIN_SUSGPIO0	WMT_PIN(0, 21)
47*4882a593Smuzhiyun #define WMT_PIN_SD0CD		WMT_PIN(0, 28)
48*4882a593Smuzhiyun #define WMT_PIN_SD1CD		WMT_PIN(0, 29)
49*4882a593Smuzhiyun #define WMT_PIN_VDOUT0		WMT_PIN(1, 0)
50*4882a593Smuzhiyun #define WMT_PIN_VDOUT1		WMT_PIN(1, 1)
51*4882a593Smuzhiyun #define WMT_PIN_VDOUT2		WMT_PIN(1, 2)
52*4882a593Smuzhiyun #define WMT_PIN_VDOUT3		WMT_PIN(1, 3)
53*4882a593Smuzhiyun #define WMT_PIN_VDOUT4		WMT_PIN(1, 4)
54*4882a593Smuzhiyun #define WMT_PIN_VDOUT5		WMT_PIN(1, 5)
55*4882a593Smuzhiyun #define WMT_PIN_VDOUT6		WMT_PIN(1, 6)
56*4882a593Smuzhiyun #define WMT_PIN_VDOUT7		WMT_PIN(1, 7)
57*4882a593Smuzhiyun #define WMT_PIN_VDOUT8		WMT_PIN(1, 8)
58*4882a593Smuzhiyun #define WMT_PIN_VDOUT9		WMT_PIN(1, 9)
59*4882a593Smuzhiyun #define WMT_PIN_VDOUT10		WMT_PIN(1, 10)
60*4882a593Smuzhiyun #define WMT_PIN_VDOUT11		WMT_PIN(1, 11)
61*4882a593Smuzhiyun #define WMT_PIN_VDOUT12		WMT_PIN(1, 12)
62*4882a593Smuzhiyun #define WMT_PIN_VDOUT13		WMT_PIN(1, 13)
63*4882a593Smuzhiyun #define WMT_PIN_VDOUT14		WMT_PIN(1, 14)
64*4882a593Smuzhiyun #define WMT_PIN_VDOUT15		WMT_PIN(1, 15)
65*4882a593Smuzhiyun #define WMT_PIN_VDOUT16		WMT_PIN(1, 16)
66*4882a593Smuzhiyun #define WMT_PIN_VDOUT17		WMT_PIN(1, 17)
67*4882a593Smuzhiyun #define WMT_PIN_VDOUT18		WMT_PIN(1, 18)
68*4882a593Smuzhiyun #define WMT_PIN_VDOUT19		WMT_PIN(1, 19)
69*4882a593Smuzhiyun #define WMT_PIN_VDOUT20		WMT_PIN(1, 20)
70*4882a593Smuzhiyun #define WMT_PIN_VDOUT21		WMT_PIN(1, 21)
71*4882a593Smuzhiyun #define WMT_PIN_VDOUT22		WMT_PIN(1, 22)
72*4882a593Smuzhiyun #define WMT_PIN_VDOUT23		WMT_PIN(1, 23)
73*4882a593Smuzhiyun #define WMT_PIN_VDIN0		WMT_PIN(2, 0)
74*4882a593Smuzhiyun #define WMT_PIN_VDIN1		WMT_PIN(2, 1)
75*4882a593Smuzhiyun #define WMT_PIN_VDIN2		WMT_PIN(2, 2)
76*4882a593Smuzhiyun #define WMT_PIN_VDIN3		WMT_PIN(2, 3)
77*4882a593Smuzhiyun #define WMT_PIN_VDIN4		WMT_PIN(2, 4)
78*4882a593Smuzhiyun #define WMT_PIN_VDIN5		WMT_PIN(2, 5)
79*4882a593Smuzhiyun #define WMT_PIN_VDIN6		WMT_PIN(2, 6)
80*4882a593Smuzhiyun #define WMT_PIN_VDIN7		WMT_PIN(2, 7)
81*4882a593Smuzhiyun #define WMT_PIN_I2C1SCL		WMT_PIN(2, 12)
82*4882a593Smuzhiyun #define WMT_PIN_I2C1SDA		WMT_PIN(2, 13)
83*4882a593Smuzhiyun #define WMT_PIN_SPI0MOSI	WMT_PIN(2, 24)
84*4882a593Smuzhiyun #define WMT_PIN_SPI0MISO	WMT_PIN(2, 25)
85*4882a593Smuzhiyun #define WMT_PIN_SPI0SS0		WMT_PIN(2, 26)
86*4882a593Smuzhiyun #define WMT_PIN_SPI0CLK		WMT_PIN(2, 27)
87*4882a593Smuzhiyun #define WMT_PIN_SD0DATA0	WMT_PIN(3, 8)
88*4882a593Smuzhiyun #define WMT_PIN_SD0DATA1	WMT_PIN(3, 9)
89*4882a593Smuzhiyun #define WMT_PIN_SD0DATA2	WMT_PIN(3, 10)
90*4882a593Smuzhiyun #define WMT_PIN_SD0DATA3	WMT_PIN(3, 11)
91*4882a593Smuzhiyun #define WMT_PIN_SD0CLK		WMT_PIN(3, 12)
92*4882a593Smuzhiyun #define WMT_PIN_SD0WP		WMT_PIN(3, 13)
93*4882a593Smuzhiyun #define WMT_PIN_SD0CMD		WMT_PIN(3, 14)
94*4882a593Smuzhiyun #define WMT_PIN_SD1DATA0	WMT_PIN(3, 24)
95*4882a593Smuzhiyun #define WMT_PIN_SD1DATA1	WMT_PIN(3, 25)
96*4882a593Smuzhiyun #define WMT_PIN_SD1DATA2	WMT_PIN(3, 26)
97*4882a593Smuzhiyun #define WMT_PIN_SD1DATA3	WMT_PIN(3, 27)
98*4882a593Smuzhiyun #define WMT_PIN_SD1DATA4	WMT_PIN(3, 28)
99*4882a593Smuzhiyun #define WMT_PIN_SD1DATA5	WMT_PIN(3, 29)
100*4882a593Smuzhiyun #define WMT_PIN_SD1DATA6	WMT_PIN(3, 30)
101*4882a593Smuzhiyun #define WMT_PIN_SD1DATA7	WMT_PIN(3, 31)
102*4882a593Smuzhiyun #define WMT_PIN_I2C0SCL		WMT_PIN(5, 8)
103*4882a593Smuzhiyun #define WMT_PIN_I2C0SDA		WMT_PIN(5, 9)
104*4882a593Smuzhiyun #define WMT_PIN_UART0RTS	WMT_PIN(5, 16)
105*4882a593Smuzhiyun #define WMT_PIN_UART0TXD	WMT_PIN(5, 17)
106*4882a593Smuzhiyun #define WMT_PIN_UART0CTS	WMT_PIN(5, 18)
107*4882a593Smuzhiyun #define WMT_PIN_UART0RXD	WMT_PIN(5, 19)
108*4882a593Smuzhiyun #define WMT_PIN_UART1RTS	WMT_PIN(5, 20)
109*4882a593Smuzhiyun #define WMT_PIN_UART1TXD	WMT_PIN(5, 21)
110*4882a593Smuzhiyun #define WMT_PIN_UART1CTS	WMT_PIN(5, 22)
111*4882a593Smuzhiyun #define WMT_PIN_UART1RXD	WMT_PIN(5, 23)
112*4882a593Smuzhiyun #define WMT_PIN_UART2RTS	WMT_PIN(5, 24)
113*4882a593Smuzhiyun #define WMT_PIN_UART2TXD	WMT_PIN(5, 25)
114*4882a593Smuzhiyun #define WMT_PIN_UART2CTS	WMT_PIN(5, 26)
115*4882a593Smuzhiyun #define WMT_PIN_UART2RXD	WMT_PIN(5, 27)
116*4882a593Smuzhiyun #define WMT_PIN_UART3RTS	WMT_PIN(5, 28)
117*4882a593Smuzhiyun #define WMT_PIN_UART3TXD	WMT_PIN(5, 29)
118*4882a593Smuzhiyun #define WMT_PIN_UART3CTS	WMT_PIN(5, 30)
119*4882a593Smuzhiyun #define WMT_PIN_UART3RXD	WMT_PIN(5, 31)
120*4882a593Smuzhiyun #define WMT_PIN_KPADROW0	WMT_PIN(6, 16)
121*4882a593Smuzhiyun #define WMT_PIN_KPADROW1	WMT_PIN(6, 17)
122*4882a593Smuzhiyun #define WMT_PIN_KPADCOL0	WMT_PIN(6, 18)
123*4882a593Smuzhiyun #define WMT_PIN_KPADCOL1	WMT_PIN(6, 19)
124*4882a593Smuzhiyun #define WMT_PIN_SD1CLK		WMT_PIN(7, 0)
125*4882a593Smuzhiyun #define WMT_PIN_SD1CMD		WMT_PIN(7, 1)
126*4882a593Smuzhiyun #define WMT_PIN_SD1WP		WMT_PIN(7, 13)
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun static const struct pinctrl_pin_desc wm8650_pins[] = {
129*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
130*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
131*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
132*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
133*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
134*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
135*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
136*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
137*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP0, "wakeup0"),
138*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_WAKEUP1, "wakeup1"),
139*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SUSGPIO0, "susgpio0"),
140*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0CD, "sd0_cd"),
141*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1CD, "sd1_cd"),
142*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
143*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
144*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
145*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
146*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
147*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
148*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT6, "vdout6"),
149*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT7, "vdout7"),
150*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT8, "vdout8"),
151*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT9, "vdout9"),
152*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT10, "vdout10"),
153*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT11, "vdout11"),
154*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT12, "vdout12"),
155*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT13, "vdout13"),
156*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT14, "vdout14"),
157*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT15, "vdout15"),
158*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT16, "vdout16"),
159*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT17, "vdout17"),
160*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT18, "vdout18"),
161*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT19, "vdout19"),
162*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT20, "vdout20"),
163*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT21, "vdout21"),
164*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT22, "vdout22"),
165*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDOUT23, "vdout23"),
166*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
167*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
168*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
169*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
170*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
171*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
172*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
173*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
174*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C1SCL, "i2c1_scl"),
175*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C1SDA, "i2c1_sda"),
176*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0MOSI, "spi0_mosi"),
177*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0MISO, "spi0_miso"),
178*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0SS0, "spi0_ss0"),
179*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SPI0CLK, "spi0_clk"),
180*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0DATA0, "sd0_data0"),
181*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0DATA1, "sd0_data1"),
182*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0DATA2, "sd0_data2"),
183*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0DATA3, "sd0_data3"),
184*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0CLK, "sd0_clk"),
185*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0WP, "sd0_wp"),
186*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD0CMD, "sd0_cmd"),
187*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA0, "sd1_data0"),
188*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA1, "sd1_data1"),
189*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA2, "sd1_data2"),
190*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA3, "sd1_data3"),
191*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA4, "sd1_data4"),
192*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA5, "sd1_data5"),
193*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA6, "sd1_data6"),
194*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1DATA7, "sd1_data7"),
195*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C0SCL, "i2c0_scl"),
196*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_I2C0SDA, "i2c0_sda"),
197*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0RTS, "uart0_rts"),
198*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0TXD, "uart0_txd"),
199*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0CTS, "uart0_cts"),
200*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART0RXD, "uart0_rxd"),
201*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1RTS, "uart1_rts"),
202*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1TXD, "uart1_txd"),
203*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1CTS, "uart1_cts"),
204*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART1RXD, "uart1_rxd"),
205*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2RTS, "uart2_rts"),
206*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2TXD, "uart2_txd"),
207*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2CTS, "uart2_cts"),
208*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART2RXD, "uart2_rxd"),
209*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART3RTS, "uart3_rts"),
210*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART3TXD, "uart3_txd"),
211*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART3CTS, "uart3_cts"),
212*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_UART3RXD, "uart3_rxd"),
213*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_KPADROW0, "kpadrow0"),
214*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_KPADROW1, "kpadrow1"),
215*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_KPADCOL0, "kpadcol0"),
216*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_KPADCOL1, "kpadcol1"),
217*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1CLK, "sd1_clk"),
218*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1CMD, "sd1_cmd"),
219*4882a593Smuzhiyun 	PINCTRL_PIN(WMT_PIN_SD1WP, "sd1_wp"),
220*4882a593Smuzhiyun };
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun /* Order of these names must match the above list */
223*4882a593Smuzhiyun static const char * const wm8650_groups[] = {
224*4882a593Smuzhiyun 	"extgpio0",
225*4882a593Smuzhiyun 	"extgpio1",
226*4882a593Smuzhiyun 	"extgpio2",
227*4882a593Smuzhiyun 	"extgpio3",
228*4882a593Smuzhiyun 	"extgpio4",
229*4882a593Smuzhiyun 	"extgpio5",
230*4882a593Smuzhiyun 	"extgpio6",
231*4882a593Smuzhiyun 	"extgpio7",
232*4882a593Smuzhiyun 	"wakeup0",
233*4882a593Smuzhiyun 	"wakeup1",
234*4882a593Smuzhiyun 	"susgpio0",
235*4882a593Smuzhiyun 	"sd0_cd",
236*4882a593Smuzhiyun 	"sd1_cd",
237*4882a593Smuzhiyun 	"vdout0",
238*4882a593Smuzhiyun 	"vdout1",
239*4882a593Smuzhiyun 	"vdout2",
240*4882a593Smuzhiyun 	"vdout3",
241*4882a593Smuzhiyun 	"vdout4",
242*4882a593Smuzhiyun 	"vdout5",
243*4882a593Smuzhiyun 	"vdout6",
244*4882a593Smuzhiyun 	"vdout7",
245*4882a593Smuzhiyun 	"vdout8",
246*4882a593Smuzhiyun 	"vdout9",
247*4882a593Smuzhiyun 	"vdout10",
248*4882a593Smuzhiyun 	"vdout11",
249*4882a593Smuzhiyun 	"vdout12",
250*4882a593Smuzhiyun 	"vdout13",
251*4882a593Smuzhiyun 	"vdout14",
252*4882a593Smuzhiyun 	"vdout15",
253*4882a593Smuzhiyun 	"vdout16",
254*4882a593Smuzhiyun 	"vdout17",
255*4882a593Smuzhiyun 	"vdout18",
256*4882a593Smuzhiyun 	"vdout19",
257*4882a593Smuzhiyun 	"vdout20",
258*4882a593Smuzhiyun 	"vdout21",
259*4882a593Smuzhiyun 	"vdout22",
260*4882a593Smuzhiyun 	"vdout23",
261*4882a593Smuzhiyun 	"vdin0",
262*4882a593Smuzhiyun 	"vdin1",
263*4882a593Smuzhiyun 	"vdin2",
264*4882a593Smuzhiyun 	"vdin3",
265*4882a593Smuzhiyun 	"vdin4",
266*4882a593Smuzhiyun 	"vdin5",
267*4882a593Smuzhiyun 	"vdin6",
268*4882a593Smuzhiyun 	"vdin7",
269*4882a593Smuzhiyun 	"i2c1_scl",
270*4882a593Smuzhiyun 	"i2c1_sda",
271*4882a593Smuzhiyun 	"spi0_mosi",
272*4882a593Smuzhiyun 	"spi0_miso",
273*4882a593Smuzhiyun 	"spi0_ss0",
274*4882a593Smuzhiyun 	"spi0_clk",
275*4882a593Smuzhiyun 	"sd0_data0",
276*4882a593Smuzhiyun 	"sd0_data1",
277*4882a593Smuzhiyun 	"sd0_data2",
278*4882a593Smuzhiyun 	"sd0_data3",
279*4882a593Smuzhiyun 	"sd0_clk",
280*4882a593Smuzhiyun 	"sd0_wp",
281*4882a593Smuzhiyun 	"sd0_cmd",
282*4882a593Smuzhiyun 	"sd1_data0",
283*4882a593Smuzhiyun 	"sd1_data1",
284*4882a593Smuzhiyun 	"sd1_data2",
285*4882a593Smuzhiyun 	"sd1_data3",
286*4882a593Smuzhiyun 	"sd1_data4",
287*4882a593Smuzhiyun 	"sd1_data5",
288*4882a593Smuzhiyun 	"sd1_data6",
289*4882a593Smuzhiyun 	"sd1_data7",
290*4882a593Smuzhiyun 	"i2c0_scl",
291*4882a593Smuzhiyun 	"i2c0_sda",
292*4882a593Smuzhiyun 	"uart0_rts",
293*4882a593Smuzhiyun 	"uart0_txd",
294*4882a593Smuzhiyun 	"uart0_cts",
295*4882a593Smuzhiyun 	"uart0_rxd",
296*4882a593Smuzhiyun 	"uart1_rts",
297*4882a593Smuzhiyun 	"uart1_txd",
298*4882a593Smuzhiyun 	"uart1_cts",
299*4882a593Smuzhiyun 	"uart1_rxd",
300*4882a593Smuzhiyun 	"uart2_rts",
301*4882a593Smuzhiyun 	"uart2_txd",
302*4882a593Smuzhiyun 	"uart2_cts",
303*4882a593Smuzhiyun 	"uart2_rxd",
304*4882a593Smuzhiyun 	"uart3_rts",
305*4882a593Smuzhiyun 	"uart3_txd",
306*4882a593Smuzhiyun 	"uart3_cts",
307*4882a593Smuzhiyun 	"uart3_rxd",
308*4882a593Smuzhiyun 	"kpadrow0",
309*4882a593Smuzhiyun 	"kpadrow1",
310*4882a593Smuzhiyun 	"kpadcol0",
311*4882a593Smuzhiyun 	"kpadcol1",
312*4882a593Smuzhiyun 	"sd1_clk",
313*4882a593Smuzhiyun 	"sd1_cmd",
314*4882a593Smuzhiyun 	"sd1_wp",
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun 
wm8650_pinctrl_probe(struct platform_device * pdev)317*4882a593Smuzhiyun static int wm8650_pinctrl_probe(struct platform_device *pdev)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun 	struct wmt_pinctrl_data *data;
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
322*4882a593Smuzhiyun 	if (!data)
323*4882a593Smuzhiyun 		return -ENOMEM;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	data->banks = wm8650_banks;
326*4882a593Smuzhiyun 	data->nbanks = ARRAY_SIZE(wm8650_banks);
327*4882a593Smuzhiyun 	data->pins = wm8650_pins;
328*4882a593Smuzhiyun 	data->npins = ARRAY_SIZE(wm8650_pins);
329*4882a593Smuzhiyun 	data->groups = wm8650_groups;
330*4882a593Smuzhiyun 	data->ngroups = ARRAY_SIZE(wm8650_groups);
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	return wmt_pinctrl_probe(pdev, data);
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun static const struct of_device_id wmt_pinctrl_of_match[] = {
336*4882a593Smuzhiyun 	{ .compatible = "wm,wm8650-pinctrl" },
337*4882a593Smuzhiyun 	{ /* sentinel */ },
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun static struct platform_driver wmt_pinctrl_driver = {
341*4882a593Smuzhiyun 	.probe	= wm8650_pinctrl_probe,
342*4882a593Smuzhiyun 	.driver = {
343*4882a593Smuzhiyun 		.name	= "pinctrl-wm8650",
344*4882a593Smuzhiyun 		.of_match_table	= wmt_pinctrl_of_match,
345*4882a593Smuzhiyun 		.suppress_bind_attrs = true,
346*4882a593Smuzhiyun 	},
347*4882a593Smuzhiyun };
348*4882a593Smuzhiyun builtin_platform_driver(wmt_pinctrl_driver);
349