Searched +full:0 +full:x01c50000 (Results 1 – 6 of 6) sorted by relevance
20 reg = <0x01c50000 0x10000>,21 <0x01c20164 0x4>;22 interrupts = <0 85 1>;
58 reg = <0x01c50000 0x10000>;59 interrupts = <0 85 1>;
12 #define SUNXI_SRAM_A1_BASE 0x0000000015 #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */16 #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */17 #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */18 #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */19 #define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */21 #define SUNXI_DE2_BASE 0x0100000024 #define SUNXI_CPUCFG_BASE 0x0170000027 #define SUNXI_SRAMC_BASE 0x01c0000028 #define SUNXI_DRAMC_BASE 0x01c01000[all …]
63 #clock-cells = <0>;71 #clock-cells = <0>;81 #size-cells = <0>;83 cpu0: cpu@0 {86 reg = <0>;117 polling-delay-passive = <0>;118 polling-delay = <0>;119 thermal-sensors = <&ths 0>;124 polling-delay-passive = <0>;125 polling-delay = <0>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;183 size = <0x6000000>;184 alloc-ranges = <0x40000000 0x10000000>;210 #clock-cells = <0>;217 #clock-cells = <0>;233 #clock-cells = <0>;240 #clock-cells = <0>;247 #clock-cells = <0>;[all …]
66 framebuffer@0 {100 #size-cells = <0>;102 cpu0: cpu@0 {105 reg = <0>;119 cooling-min-level = <0>;163 reg = <0x40000000 0x80000000>;186 #clock-cells = <0>;188 reg = <0x01c20050 0x4>;194 #clock-cells = <0>;202 osc32k: clk@0 {[all …]