| /utopia/UTPA2-700.0.x/modules/pq/drv/pq/ |
| H A D | drvPQ_Bin.c | 213 MS_U8 MDrv_PQBin_GetByteData(void *pInstance,void *pAddrVirt, MS_U32 *u32Offset) in MDrv_PQBin_GetByteData() argument
216 *u32Offset = *u32Offset + 1; in MDrv_PQBin_GetByteData()
221 MS_U16 MDrv_PQBin_Get2ByteData(void *pInstance,void *pAddrVirt, MS_U32 *u32Offset) in MDrv_PQBin_Get2ByteData() argument
226 *u32Offset = *u32Offset + 2; in MDrv_PQBin_Get2ByteData()
233 MS_U32 MDrv_PQBin_Get4ByteData(void *pInstance,void *pAddrVirt, MS_U32 *u32Offset) in MDrv_PQBin_Get4ByteData() argument
240 *u32Offset = *u32Offset + 4; in MDrv_PQBin_Get4ByteData()
256 MS_U32 u32Offset; in MDrv_PQBin_DumpGeneralRegTable() local
267 …u32Offset = ( PQ_BIN_BANK_SIZE + PQ_BIN_ADDR_SIZE + PQ_BIN_MASK_SIZE + (MS_U32)pTabInfo->u16GroupN… in MDrv_PQBin_DumpGeneralRegTable()
268 … u8Bank = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset); in MDrv_PQBin_DumpGeneralRegTable()
269 … u8Addr = MDrv_PQBin_GetByteData(pInstance,(void *)((void *)(u32Addr+u32Offset)), &u32Offset); in MDrv_PQBin_DumpGeneralRegTable()
[all …]
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| /utopia/UTPA2-700.0.x/modules/hwi2c/drv/hwi2c/ |
| H A D | drvHWI2C.c | 240 MS_U32 u32Offset = 0x00; in _MDrv_HWI2C_ReadBytes() local
269 if(!_MDrv_HWI2C_GetPortRegOffset(u8Port,&u32Offset)) in _MDrv_HWI2C_ReadBytes()
279 return HAL_HWI2C_DMA_ReadBytes(u32Offset, u16SlaveCfg, uAddrCnt, pRegAddr, uSize, pData); in _MDrv_HWI2C_ReadBytes()
291 HAL_HWI2C_Start(u32Offset); in _MDrv_HWI2C_ReadBytes()
295 if (!_MDrv_HWI2C_Send_Byte(u32Offset,HWI2C_SET_RW_BIT(FALSE, u8SlaveID))) in _MDrv_HWI2C_ReadBytes()
300 if (!_MDrv_HWI2C_Send_Byte(u32Offset,*pRegAddr)) in _MDrv_HWI2C_ReadBytes()
307 HAL_HWI2C_Stop(u32Offset); in _MDrv_HWI2C_ReadBytes()
317 HAL_HWI2C_Start(u32Offset); in _MDrv_HWI2C_ReadBytes()
321 if (!_MDrv_HWI2C_Send_Byte(u32Offset,HWI2C_SET_RW_BIT(TRUE, u8SlaveID))) in _MDrv_HWI2C_ReadBytes()
332 HAL_HWI2C_NoAck(u32Offset); in _MDrv_HWI2C_ReadBytes()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/vpu_v3/ |
| H A D | halVPU_EX.c | 2305 MS_U32 u32Offset = 0; in HAL_VPU_EX_CPUSetting() local
2308 u32Offset = (u32StAddr >= HAL_MIU1_BASE) ? (u32StAddr-HAL_MIU1_BASE) : u32StAddr ; in HAL_VPU_EX_CPUSetting()
2324 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2325 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2327 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2328 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2333 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2334 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2336 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2337 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/vpu_v3/ |
| H A D | halVPU_EX.c | 2445 MS_U32 u32Offset = 0; in HAL_VPU_EX_CPUSetting() local
2448 u32Offset = (u32StAddr >= HAL_MIU1_BASE) ? (u32StAddr-HAL_MIU1_BASE) : u32StAddr ; in HAL_VPU_EX_CPUSetting()
2465 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2466 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2468 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2469 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2474 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2475 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2477 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2478 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/vpu/ |
| H A D | halVPU.c | 310 MS_U32 u32Offset = 0; in HAL_VPU_CPUSetting() local
313 u32Offset = (u32StAddr >= HAL_MIU1_BASE) ? (u32StAddr-HAL_MIU1_BASE) : u32StAddr ; in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
337 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
338 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
341 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
342 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
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| /utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/vpu/ |
| H A D | halVPU.c | 310 MS_U32 u32Offset = 0; in HAL_VPU_CPUSetting() local
313 u32Offset = (u32StAddr >= HAL_MIU1_BASE) ? (u32StAddr-HAL_MIU1_BASE) : u32StAddr ; in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
337 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
338 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
341 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
342 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
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| /utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/vpu/ |
| H A D | halVPU.c | 310 MS_U32 u32Offset = 0; in HAL_VPU_CPUSetting() local
313 u32Offset = (u32StAddr >= HAL_MIU1_BASE) ? (u32StAddr-HAL_MIU1_BASE) : u32StAddr ; in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
337 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
338 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
341 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
342 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
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| /utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/vpu/ |
| H A D | halVPU.c | 310 MS_U32 u32Offset = 0; in HAL_VPU_CPUSetting() local
313 u32Offset = (u32StAddr >= HAL_MIU1_BASE) ? (u32StAddr-HAL_MIU1_BASE) : u32StAddr ; in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
337 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
338 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
341 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
342 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
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| /utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/vpu/ |
| H A D | halVPU.c | 310 MS_U32 u32Offset = 0; in HAL_VPU_CPUSetting() local
313 u32Offset = (u32StAddr >= HAL_MIU1_BASE) ? (u32StAddr-HAL_MIU1_BASE) : u32StAddr ; in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
337 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
338 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
341 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
342 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
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| /utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/vpu/ |
| H A D | halVPU.c | 310 MS_U32 u32Offset = 0; in HAL_VPU_CPUSetting() local
313 u32Offset = (u32StAddr >= HAL_MIU1_BASE) ? (u32StAddr-HAL_MIU1_BASE) : u32StAddr ; in HAL_VPU_CPUSetting()
327 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)((u32Offset | VPU_MIU1BASE_ADDR) & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
328 … _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)(((u32Offset | VPU_MIU1BASE_ADDR)>>16) & 0xffff)); in HAL_VPU_CPUSetting()
331 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
332 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_CPUSetting()
337 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
338 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
341 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_CPUSetting()
342 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset>>16) & 0xffff)); in HAL_VPU_CPUSetting()
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| /utopia/UTPA2-700.0.x/modules/gpd/api/gpd/ |
| H A D | apiGPD.c | 626 MS_U32 u32Offset = 0; in _MApi_GPD_Init()
627 _phy_to_miu_offset(pGPDContext->MIUAllocation, u32Offset, SrcBuf); in _MApi_GPD_Init()
628 UNUSED(u32Offset); in _MApi_GPD_Init()
720 MS_U32 u32Offset = 0; in _MApi_GPD_InputSource() local
723 _phy_to_miu_offset(u8MiuSel, u32Offset, InputBuf); in _MApi_GPD_InputSource()
724 UNUSED(u32Offset); in _MApi_GPD_InputSource()
826 MS_U32 u32Offset = 0; in _MApi_GPD_OutputDecode() local
829 _phy_to_miu_offset(u8MiuSel, u32Offset, DecodeBuf); in _MApi_GPD_OutputDecode()
830 UNUSED(u32Offset); in _MApi_GPD_OutputDecode()
962 MS_U32 u32Offset = 0; in _MApi_GPD_OutputDecodeMGIF() local
[all …]
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| /utopia/UTPA2-700.0.x/modules/msos/msos/linux_kernel_V2/ |
| H A D | drvMPool.c | 194 static void _MPool_Check_aligned(MS_U32 u32Offset, MS_U32 u32MapSize);
464 static void _MPool_Check_aligned(MS_U32 u32Offset, MS_U32 u32MapSize) in _MPool_Check_aligned() argument
466 if(u32Offset&0xFFF) in _MPool_Check_aligned()
523 MS_BOOL MsOS_MPool_Mapping(MS_U8 u8MiuSel, MS_SIZE u32Offset, MS_SIZE u32MapSize, MS_BOOL bNonCache) in MsOS_MPool_Mapping() argument
531 _MPool_Check_aligned(u32Offset, u32MapSize); in MsOS_MPool_Mapping()
537 _miu_offset_to_phy(u8MiuSel, u32Offset, Phyaddr); in MsOS_MPool_Mapping()
623 MS_BOOL MsOS_MPool_Mapping_Dynamic(MS_U8 u8MiuSel, MS_SIZE u32Offset, MS_SIZE u32MapSize, MS_BOOL b… in MsOS_MPool_Mapping_Dynamic() argument
629 _MPool_Check_aligned(u32Offset, u32MapSize); in MsOS_MPool_Mapping_Dynamic()
635 _miu_offset_to_phy(u8MiuSel, u32Offset, Phyaddr); in MsOS_MPool_Mapping_Dynamic()
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| /utopia/UTPA2-700.0.x/modules/usb/drv/usb_ecos/newhost/ |
| H A D | drvPCIMEM.c | 185 U32 u32Offset; in ms_mem_pool_alloc() local
205 u32Offset = (BITS_PER_LONG * iMap) + iBlock; in ms_mem_pool_alloc()
206 u32Offset *= pMem_pool->size; in ms_mem_pool_alloc()
220 u32Offset = 0; in ms_mem_pool_alloc()
222 ms_retval = (void*) (u32Offset + (size_t) ( ms_page->vaddr )); in ms_mem_pool_alloc()
223 *pDma_addr = u32Offset + ms_page->dma; in ms_mem_pool_alloc()
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| /utopia/UTPA2-700.0.x/modules/msos/msos/nos/ |
| H A D | MsOS_nos.c | 1594 MS_U32 u32Offset; member
1606 MS_U32 u32Offset; member
1649 pHdr->u32Offset = (sizeof(MsOS_SHM_Hdr)+3)&~3; in MsOS_SHM_Init()
1655 _ShmHdr.u32Offset = (sizeof(MsOS_SHM_Hdr)+7)&~7; in MsOS_SHM_Init()
1703 if ((_ShmHdr.u32Offset + u32BufSize)> _ShmHdr.u32ShmSize) in MsOS_SHM_GetId()
1715 pClient->u32Offset = _ShmHdr.u32Offset; in MsOS_SHM_GetId()
1716 _ShmHdr.u32Offset += (u32BufSize+7)&~7; in MsOS_SHM_GetId()
1736 *pu32Addr = (MS_VIRT)_pu8ShareMem + pClient->u32Offset; in MsOS_SHM_GetId()
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| /utopia/UTPA2-700.0.x/modules/bdma/drv/bdma/ |
| H A D | drvBDMA.c | 695 MS_U32 u32Offset; in _BDMA_Check_MIUDev() local
698 _phy_to_miu_offset(u8MiuSel, u32Offset, phy64Addr) in _BDMA_Check_MIUDev()
1005 MS_U32 u32Offset; in _MDrv_BDMA_CopyHnd() local
1063 _phy_to_miu_offset(u8MiuSel, u32Offset, phy64DstAddr); in _MDrv_BDMA_CopyHnd()
1064 phy64DstAddr = u32Offset; in _MDrv_BDMA_CopyHnd()
1066 _phy_to_miu_offset(u8MiuSel, u32Offset, sOpCB.phy64DstAddr); in _MDrv_BDMA_CopyHnd()
1067 sOpCB.phy64DstAddr = u32Offset; in _MDrv_BDMA_CopyHnd()
1072 _phy_to_miu_offset(u8MiuSel, u32Offset, phy64SrcAddr); in _MDrv_BDMA_CopyHnd()
1073 phy64SrcAddr = u32Offset; in _MDrv_BDMA_CopyHnd()
1075 _phy_to_miu_offset(u8MiuSel, u32Offset, sOpCB.phy64SrcAddr); in _MDrv_BDMA_CopyHnd()
[all …]
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/maxim/hwi2c/ |
| H A D | halHWI2C.c | 1003 MS_U32 u32Offset = 0x0000; in miic_handler() local
1007 HAL_HWI2C_SetPortRegOffset(pstPortCfg->ePort, &u32Offset); in miic_handler()
1008 HAL_HWI2C_GetPortIdxByOffset(u32Offset, &u8Port); in miic_handler()
1012 if( HAL_HWI2C_DMA_IsTxfrDone(u32Offset, u8Port) == TRUE )/*dma done*/ in miic_handler()
1017 …f (HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset) == HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCN… in miic_handler()
1022 …N__,HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset),HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCNT+… in miic_handler()
1025 HAL_HWI2C_DMA_TxfrDone(u32Offset); in miic_handler()
1027 … HWI2C_HAL_INFO("[iic]%s irq = %d, port = %d, offset = %d\n",__FUNCTION__,irq,u8Port,u32Offset); in miic_handler()
1030 if (HAL_HWI2C_ReadByte(REG_HWI2C_DMA_CTL+u32Offset) & _DMA_CTL_RDWTCMD ) { in miic_handler()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7621/hwi2c/ |
| H A D | halHWI2C.c | 1003 MS_U32 u32Offset = 0x0000; in miic_handler() local
1007 HAL_HWI2C_SetPortRegOffset(pstPortCfg->ePort, &u32Offset); in miic_handler()
1008 HAL_HWI2C_GetPortIdxByOffset(u32Offset, &u8Port); in miic_handler()
1012 if( HAL_HWI2C_DMA_IsTxfrDone(u32Offset, u8Port) == TRUE )/*dma done*/ in miic_handler()
1017 …f (HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset) == HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCN… in miic_handler()
1022 …N__,HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset),HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCNT+… in miic_handler()
1025 HAL_HWI2C_DMA_TxfrDone(u32Offset); in miic_handler()
1027 … HWI2C_HAL_INFO("[iic]%s irq = %d, port = %d, offset = %d\n",__FUNCTION__,irq,u8Port,u32Offset); in miic_handler()
1030 if (HAL_HWI2C_ReadByte(REG_HWI2C_DMA_CTL+u32Offset) & _DMA_CTL_RDWTCMD ) { in miic_handler()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/manhattan/hwi2c/ |
| H A D | halHWI2C.c | 1003 MS_U32 u32Offset = 0x0000; in miic_handler() local
1007 HAL_HWI2C_SetPortRegOffset(pstPortCfg->ePort, &u32Offset); in miic_handler()
1008 HAL_HWI2C_GetPortIdxByOffset(u32Offset, &u8Port); in miic_handler()
1012 if( HAL_HWI2C_DMA_IsTxfrDone(u32Offset, u8Port) == TRUE )/*dma done*/ in miic_handler()
1017 …f (HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset) == HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCN… in miic_handler()
1022 …N__,HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset),HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCNT+… in miic_handler()
1024 HAL_HWI2C_DMA_TxfrDone(u32Offset); in miic_handler()
1025 … HWI2C_HAL_INFO("[iic]%s irq = %d, port = %d, offset = %d\n",__FUNCTION__,irq,u8Port,u32Offset); in miic_handler()
1027 if (HAL_HWI2C_ReadByte(REG_HWI2C_DMA_CTL+u32Offset) & _DMA_CTL_RDWTCMD ) { in miic_handler()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7821/hwi2c/ |
| H A D | halHWI2C.c | 1003 MS_U32 u32Offset = 0x0000; in miic_handler() local
1007 HAL_HWI2C_SetPortRegOffset(pstPortCfg->ePort, &u32Offset); in miic_handler()
1008 HAL_HWI2C_GetPortIdxByOffset(u32Offset, &u8Port); in miic_handler()
1012 if( HAL_HWI2C_DMA_IsTxfrDone(u32Offset, u8Port) == TRUE )/*dma done*/ in miic_handler()
1017 …f (HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset) == HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCN… in miic_handler()
1022 …N__,HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset),HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCNT+… in miic_handler()
1025 HAL_HWI2C_DMA_TxfrDone(u32Offset); in miic_handler()
1027 … HWI2C_HAL_INFO("[iic]%s irq = %d, port = %d, offset = %d\n",__FUNCTION__,irq,u8Port,u32Offset); in miic_handler()
1030 if (HAL_HWI2C_ReadByte(REG_HWI2C_DMA_CTL+u32Offset) & _DMA_CTL_RDWTCMD ) { in miic_handler()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/maserati/hwi2c/ |
| H A D | halHWI2C.c | 1003 MS_U32 u32Offset = 0x0000; in miic_handler() local
1007 HAL_HWI2C_SetPortRegOffset(pstPortCfg->ePort, &u32Offset); in miic_handler()
1008 HAL_HWI2C_GetPortIdxByOffset(u32Offset, &u8Port); in miic_handler()
1012 if( HAL_HWI2C_DMA_IsTxfrDone(u32Offset, u8Port) == TRUE )/*dma done*/ in miic_handler()
1017 …f (HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset) == HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCN… in miic_handler()
1022 …N__,HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_DATLEN+u32Offset),HAL_HWI2C_Read4Byte(REG_HWI2C_DMA_TXFRCNT+… in miic_handler()
1025 HAL_HWI2C_DMA_TxfrDone(u32Offset); in miic_handler()
1027 … HWI2C_HAL_INFO("[iic]%s irq = %d, port = %d, offset = %d\n",__FUNCTION__,irq,u8Port,u32Offset); in miic_handler()
1030 if (HAL_HWI2C_ReadByte(REG_HWI2C_DMA_CTL+u32Offset) & _DMA_CTL_RDWTCMD ) { in miic_handler()
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/ |
| H A D | halVPU_EX.c | 1060 MS_U32 u32Offset; in HAL_VPU_EX_REE_SetSHMBaseAddr() local
1063 u32Offset = u32SHMAddr-u32MIU1Addr; in HAL_VPU_EX_REE_SetSHMBaseAddr()
1064 _miu_offset_to_phy(E_CHIP_MIU_1, u32Offset, pVPUHalContext->u32VPUSHMAddr); in HAL_VPU_EX_REE_SetSHMBaseAddr()
2397 MS_U32 u32Offset = 0; in HAL_VPU_EX_CPUSetting() local
2402 _phy_to_miu_offset(u8MiuSel, u32Offset, u32StAddr); in HAL_VPU_EX_CPUSetting()
2422 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2423 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2425 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2426 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
3661 if (stEntry->u32Offset == 0) in HAL_VPU_EX_GetESReadPtr()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/ |
| H A D | halVPU_EX.c | 1094 MS_U32 u32Offset; in HAL_VPU_EX_REE_SetSHMBaseAddr() local
1097 u32Offset = u32SHMAddr-u32MIU1Addr; in HAL_VPU_EX_REE_SetSHMBaseAddr()
1098 _miu_offset_to_phy(E_CHIP_MIU_1, u32Offset, pVPUHalContext->u32VPUSHMAddr); in HAL_VPU_EX_REE_SetSHMBaseAddr()
2464 MS_U32 u32Offset = 0; in HAL_VPU_EX_CPUSetting() local
2469 _phy_to_miu_offset(u8MiuSel, u32Offset, u32StAddr); in HAL_VPU_EX_CPUSetting()
2489 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2490 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2492 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2493 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
3841 if (stEntry->u32Offset == 0) in HAL_VPU_EX_GetESReadPtr()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/ |
| H A D | halVPU_EX.c | 1086 MS_U32 u32Offset; in HAL_VPU_EX_REE_SetSHMBaseAddr() local
1089 u32Offset = u32SHMAddr-u32MIU1Addr; in HAL_VPU_EX_REE_SetSHMBaseAddr()
1090 _miu_offset_to_phy(E_CHIP_MIU_1, u32Offset, pVPUHalContext->u32VPUSHMAddr); in HAL_VPU_EX_REE_SetSHMBaseAddr()
2427 MS_U32 u32Offset = 0; in HAL_VPU_EX_CPUSetting() local
2432 _phy_to_miu_offset(u8MiuSel, u32Offset, u32StAddr); in HAL_VPU_EX_CPUSetting()
2452 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2453 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2455 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2456 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
3790 if (stEntry->u32Offset == 0) in HAL_VPU_EX_GetESReadPtr()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/ |
| H A D | halVPU_EX.c | 1060 MS_U32 u32Offset; in HAL_VPU_EX_REE_SetSHMBaseAddr() local
1063 u32Offset = u32SHMAddr-u32MIU1Addr; in HAL_VPU_EX_REE_SetSHMBaseAddr()
1064 _miu_offset_to_phy(E_CHIP_MIU_1, u32Offset, pVPUHalContext->u32VPUSHMAddr); in HAL_VPU_EX_REE_SetSHMBaseAddr()
2398 MS_U32 u32Offset = 0; in HAL_VPU_EX_CPUSetting() local
2403 _phy_to_miu_offset(u8MiuSel, u32Offset, u32StAddr); in HAL_VPU_EX_CPUSetting()
2423 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2424 _VPU_Write2Byte(VPU_REG_DCU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
2426 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_L, (MS_U16)(u32Offset & 0x0000ffff)) ; in HAL_VPU_EX_CPUSetting()
2427 _VPU_Write2Byte(VPU_REG_ICU_SDR_BASE_H, (MS_U16)((u32Offset >>16) & 0xffff)); in HAL_VPU_EX_CPUSetting()
3662 if (stEntry->u32Offset == 0) in HAL_VPU_EX_GetESReadPtr()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/drv/hvd_v3/ |
| H A D | HVD_EX_Common.c | 372 pEsHandleQueue->stEntry[pEsHandleQueue->u32WrPtr].u32Offset = 0; in _MDrv_HVD_EX_TEE_AllocateEsBufHandle_()
403 …u32WriteOffset = pEsHandleQueue->stEntry[u32PrevWptr].u32Offset + pEsHandleQueue->stEntry[u32PrevW… in _MDrv_HVD_EX_TEE_AllocateEsBufHandle_()
404 u32ReadOffset = pEsHandleQueue->stEntry[pEsHandleQueue->u32RdPtr].u32Offset; in _MDrv_HVD_EX_TEE_AllocateEsBufHandle_()
429 pEsHandleQueue->stEntry[pEsHandleQueue->u32WrPtr].u32Offset = u32WriteOffset; in _MDrv_HVD_EX_TEE_AllocateEsBufHandle_()
450 *pPhyAddr = pEsHandleQueue->stEntry[u32EsHandle].u32Offset; in _MDrv_HVD_EX_TEE_GetESBufByHandle_()
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