phyMiuOffsetPvrBuf1 (reference) in projects: utopia

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Searched refs:phyMiuOffsetPvrBuf1 (Results 1 – 4 of 4) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A D	halTSP.c	4898 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetBuf() local 4900 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf1, u32StartAddr1); in HAL_PVR_SetBuf() 4903 MS_U32 u32EndAddr1 = phyMiuOffsetPvrBuf1 + u32BufSize1; in HAL_PVR_SetBuf() 4919 …REG32_W(&_RegCtrl->Str2mi_head2pvr1, (phyMiuOffsetPvrBuf1>> MIU_BUS) & TSP_HW_PVR1_BUF_HEAD2_MASK); in HAL_PVR_SetBuf() 4923 … REG32_W(&(_RegCtrl->Str2mi_mid2pvr1), (phyMiuOffsetPvrBuf1>>MIU_BUS) & TSP_HW_PVR1_BUF_MID2_MASK); in HAL_PVR_SetBuf() 4937 … REG32_W(&_RegCtrl->Str2mi_head2_pvr2, (phyMiuOffsetPvrBuf1 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 4941 … REG32_W(&(_RegCtrl->Str2mi_mid2_pvr2), (phyMiuOffsetPvrBuf1 >>MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 4955 … REG32_W(&(_RegCtrl2->CFG_1D_1E), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2); in HAL_PVR_SetBuf() 4959 … REG32_W(&(_RegCtrl2->CFG_1F_20), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1F_20_PVR3_STR2MI_MID2); in HAL_PVR_SetBuf() 4973 … REG32_W(&(_RegCtrl2->CFG_2A_2B), (phyMiuOffsetPvrBuf1>>MIU_BUS) & CFG_2A_2B_PVR4_STR2MI_HEAD2); in HAL_PVR_SetBuf() [all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A D	halTSP.c	5071 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetBuf() local 5073 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf1, u32StartAddr1); in HAL_PVR_SetBuf() 5076 MS_U32 u32EndAddr1 = phyMiuOffsetPvrBuf1 + u32BufSize1; in HAL_PVR_SetBuf() 5092 …REG32_W(&_RegCtrl->Str2mi_head2pvr1, (phyMiuOffsetPvrBuf1>> MIU_BUS) & TSP_HW_PVR1_BUF_HEAD2_MASK); in HAL_PVR_SetBuf() 5096 … REG32_W(&(_RegCtrl->Str2mi_mid2pvr1), (phyMiuOffsetPvrBuf1>>MIU_BUS) & TSP_HW_PVR1_BUF_MID2_MASK); in HAL_PVR_SetBuf() 5110 … REG32_W(&_RegCtrl->Str2mi_head2_pvr2, (phyMiuOffsetPvrBuf1 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5114 … REG32_W(&(_RegCtrl->Str2mi_mid2_pvr2), (phyMiuOffsetPvrBuf1 >>MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5128 … REG32_W(&(_RegCtrl2->CFG_1D_1E), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2); in HAL_PVR_SetBuf() 5132 … REG32_W(&(_RegCtrl2->CFG_1F_20), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1F_20_PVR3_STR2MI_MID2); in HAL_PVR_SetBuf() 5146 … REG32_W(&(_RegCtrl2->CFG_2A_2B), (phyMiuOffsetPvrBuf1>>MIU_BUS) & CFG_2A_2B_PVR4_STR2MI_HEAD2); in HAL_PVR_SetBuf() [all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A D	halTSP.c	5408 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetBuf() local 5410 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf1, u32StartAddr1); in HAL_PVR_SetBuf() 5413 MS_U32 u32EndAddr1 = phyMiuOffsetPvrBuf1 + u32BufSize1; in HAL_PVR_SetBuf() 5429 …REG32_W(&_RegCtrl->Str2mi_head2pvr1, (phyMiuOffsetPvrBuf1>> MIU_BUS) & TSP_HW_PVR1_BUF_HEAD2_MASK); in HAL_PVR_SetBuf() 5433 … REG32_W(&(_RegCtrl->Str2mi_mid2pvr1), (phyMiuOffsetPvrBuf1>>MIU_BUS) & TSP_HW_PVR1_BUF_MID2_MASK); in HAL_PVR_SetBuf() 5447 … REG32_W(&_RegCtrl->Str2mi_head2_pvr2, (phyMiuOffsetPvrBuf1 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5451 … REG32_W(&(_RegCtrl->Str2mi_mid2_pvr2), (phyMiuOffsetPvrBuf1 >>MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5465 … REG32_W(&(_RegCtrl2->CFG_1D_1E), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2); in HAL_PVR_SetBuf() 5469 … REG32_W(&(_RegCtrl2->CFG_1F_20), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1F_20_PVR3_STR2MI_MID2); in HAL_PVR_SetBuf() 5483 … REG32_W(&(_RegCtrl2->CFG_2A_2B), (phyMiuOffsetPvrBuf1>>MIU_BUS) & CFG_2A_2B_PVR4_STR2MI_HEAD2); in HAL_PVR_SetBuf() [all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A D	halTSP.c	3691 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetStr2Miu_StartAddr() local 3695 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf1, u32StartAddr1); in HAL_PVR_SetStr2Miu_StartAddr() 3706 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_07_08, (phyMiuOffsetPvrBuf1 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_StartAddr() 3719 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetStr2Miu_MidAddr() local 3723 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf1, u32MidAddr1); in HAL_PVR_SetStr2Miu_MidAddr() 3735 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_09_0A, (phyMiuOffsetPvrBuf1 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_MidAddr() 3748 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetStr2Miu_EndAddr() local 3752 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf1, u32EndAddr1); in HAL_PVR_SetStr2Miu_EndAddr()