Lines Matching refs:phyMiuOffsetPvrBuf1

4898     MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1;  in HAL_PVR_SetBuf()  local
4900     _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf1, u32StartAddr1);  in HAL_PVR_SetBuf()
4903     MS_U32 u32EndAddr1 = phyMiuOffsetPvrBuf1 + u32BufSize1;  in HAL_PVR_SetBuf()
4919 …REG32_W(&_RegCtrl->Str2mi_head2pvr1, (phyMiuOffsetPvrBuf1>> MIU_BUS) & TSP_HW_PVR1_BUF_HEAD2_MASK);  in HAL_PVR_SetBuf()
4923 … REG32_W(&(_RegCtrl->Str2mi_mid2pvr1), (phyMiuOffsetPvrBuf1>>MIU_BUS) & TSP_HW_PVR1_BUF_MID2_MASK);  in HAL_PVR_SetBuf()
4937 …   REG32_W(&_RegCtrl->Str2mi_head2_pvr2, (phyMiuOffsetPvrBuf1 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK);  in HAL_PVR_SetBuf()
4941 …   REG32_W(&(_RegCtrl->Str2mi_mid2_pvr2), (phyMiuOffsetPvrBuf1 >>MIU_BUS) & TSP_STR2MI2_ADDR_MASK);  in HAL_PVR_SetBuf()
4955 …  REG32_W(&(_RegCtrl2->CFG_1D_1E), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1D_1E_PVR3_STR2MI_HEAD2);  in HAL_PVR_SetBuf()
4959 …   REG32_W(&(_RegCtrl2->CFG_1F_20), (phyMiuOffsetPvrBuf1 >> MIU_BUS) & CFG_1F_20_PVR3_STR2MI_MID2);  in HAL_PVR_SetBuf()
4973 …    REG32_W(&(_RegCtrl2->CFG_2A_2B), (phyMiuOffsetPvrBuf1>>MIU_BUS) & CFG_2A_2B_PVR4_STR2MI_HEAD2);  in HAL_PVR_SetBuf()
4977 …     REG32_W(&(_RegCtrl2->CFG_2C_2D), (phyMiuOffsetPvrBuf1>>MIU_BUS) & CFG_2C_2D_PVR4_STR2MI_MID2);  in HAL_PVR_SetBuf()