phyMiuOffsetPvrBuf0 (reference) in projects: utopia

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Searched refs:phyMiuOffsetPvrBuf0 (Results 1 – 4 of 4) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A D	halTSP.c	4898 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetBuf() local 4899 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf0, u32StartAddr0); in HAL_PVR_SetBuf() 4902 MS_U32 u32EndAddr0 = phyMiuOffsetPvrBuf0 + u32BufSize0; in HAL_PVR_SetBuf() 4912 … REG32_W(&_RegCtrl->TsRec_Head, (phyMiuOffsetPvrBuf0 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 4916 …REG32_W(&(_RegCtrl->TsRec_Mid_PVR1_WPTR), (phyMiuOffsetPvrBuf0 >>MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 4930 … REG32_W(&_RegCtrl->Str2mi_head1_pvr2, (phyMiuOffsetPvrBuf0 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 4934 …REG32_W(&(_RegCtrl->Str2mi_mid1_wptr_pvr2), (phyMiuOffsetPvrBuf0 >>MIU_BUS) & TSP_STR2MI2_ADDR_MAS… in HAL_PVR_SetBuf() 4948 … REG32_W(&(_RegCtrl2->CFG_17_18), (phyMiuOffsetPvrBuf0 >> MIU_BUS) & CFG_17_18_PVR3_STR2MI_HEAD); in HAL_PVR_SetBuf() 4952 … REG32_W(&(_RegCtrl2->CFG_19_1A), (phyMiuOffsetPvrBuf0 >> MIU_BUS) & CFG_19_1A_PVR3_STR2MI_MID); in HAL_PVR_SetBuf() 4966 … REG32_W(&(_RegCtrl2->CFG_24_25), (phyMiuOffsetPvrBuf0>>MIU_BUS) & CFG_24_25_PVR4_STR2MI_HEAD); in HAL_PVR_SetBuf() [all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A D	halTSP.c	5071 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetBuf() local 5072 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf0, u32StartAddr0); in HAL_PVR_SetBuf() 5075 MS_U32 u32EndAddr0 = phyMiuOffsetPvrBuf0 + u32BufSize0; in HAL_PVR_SetBuf() 5085 … REG32_W(&_RegCtrl->TsRec_Head, (phyMiuOffsetPvrBuf0 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5089 …REG32_W(&(_RegCtrl->TsRec_Mid_PVR1_WPTR), (phyMiuOffsetPvrBuf0 >>MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5103 … REG32_W(&_RegCtrl->Str2mi_head1_pvr2, (phyMiuOffsetPvrBuf0 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5107 …REG32_W(&(_RegCtrl->Str2mi_mid1_wptr_pvr2), (phyMiuOffsetPvrBuf0 >>MIU_BUS) & TSP_STR2MI2_ADDR_MAS… in HAL_PVR_SetBuf() 5121 … REG32_W(&(_RegCtrl2->CFG_17_18), (phyMiuOffsetPvrBuf0 >> MIU_BUS) & CFG_17_18_PVR3_STR2MI_HEAD); in HAL_PVR_SetBuf() 5125 … REG32_W(&(_RegCtrl2->CFG_19_1A), (phyMiuOffsetPvrBuf0 >> MIU_BUS) & CFG_19_1A_PVR3_STR2MI_MID); in HAL_PVR_SetBuf() 5139 … REG32_W(&(_RegCtrl2->CFG_24_25), (phyMiuOffsetPvrBuf0>>MIU_BUS) & CFG_24_25_PVR4_STR2MI_HEAD); in HAL_PVR_SetBuf() [all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A D	halTSP.c	5408 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetBuf() local 5409 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf0, u32StartAddr0); in HAL_PVR_SetBuf() 5412 MS_U32 u32EndAddr0 = phyMiuOffsetPvrBuf0 + u32BufSize0; in HAL_PVR_SetBuf() 5422 … REG32_W(&_RegCtrl->TsRec_Head, (phyMiuOffsetPvrBuf0 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5426 …REG32_W(&(_RegCtrl->TsRec_Mid_PVR1_WPTR), (phyMiuOffsetPvrBuf0 >>MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5440 … REG32_W(&_RegCtrl->Str2mi_head1_pvr2, (phyMiuOffsetPvrBuf0 >> MIU_BUS) & TSP_STR2MI2_ADDR_MASK); in HAL_PVR_SetBuf() 5444 …REG32_W(&(_RegCtrl->Str2mi_mid1_wptr_pvr2), (phyMiuOffsetPvrBuf0 >>MIU_BUS) & TSP_STR2MI2_ADDR_MAS… in HAL_PVR_SetBuf() 5458 … REG32_W(&(_RegCtrl2->CFG_17_18), (phyMiuOffsetPvrBuf0 >> MIU_BUS) & CFG_17_18_PVR3_STR2MI_HEAD); in HAL_PVR_SetBuf() 5462 … REG32_W(&(_RegCtrl2->CFG_19_1A), (phyMiuOffsetPvrBuf0 >> MIU_BUS) & CFG_19_1A_PVR3_STR2MI_MID); in HAL_PVR_SetBuf() 5476 … REG32_W(&(_RegCtrl2->CFG_24_25), (phyMiuOffsetPvrBuf0>>MIU_BUS) & CFG_24_25_PVR4_STR2MI_HEAD); in HAL_PVR_SetBuf() [all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A D	halTSP.c	3691 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetStr2Miu_StartAddr() local 3694 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf0, u32StartAddr0); in HAL_PVR_SetStr2Miu_StartAddr() 3704 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_01_02, (phyMiuOffsetPvrBuf0 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_StartAddr() 3719 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetStr2Miu_MidAddr() local 3722 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf0, u32MidAddr0); in HAL_PVR_SetStr2Miu_MidAddr() 3733 REG32_W(&RegPvrCtrl[u8PvrEng].CFG_PVR_03_04, (phyMiuOffsetPvrBuf0 >> MIU_BUS)); in HAL_PVR_SetStr2Miu_MidAddr() 3748 MS_PHY phyMiuOffsetPvrBuf0, phyMiuOffsetPvrBuf1; in HAL_PVR_SetStr2Miu_EndAddr() local 3751 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetPvrBuf0, u32EndAddr0); in HAL_PVR_SetStr2Miu_EndAddr()