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Searched refs:_HVD_WriteByteMask (Results 1 – 25 of 64) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/hvd_ex/
H A DhalHVD_EX.c2554 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2564 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2574 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV, TOP_CKG_HVD_INV); in HAL_HVD_EX_PowerCtrl()
2580 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_345MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2590 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_320MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2600 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_288MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2610 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_240MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/hvd_ex/
H A DhalHVD_EX.c2554 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2564 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2574 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV, TOP_CKG_HVD_INV); in HAL_HVD_EX_PowerCtrl()
2580 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_345MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2590 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_320MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2600 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_288MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2610 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_240MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/hvd_ex/
H A DhalHVD_EX.c2554 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2564 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2574 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV, TOP_CKG_HVD_INV); in HAL_HVD_EX_PowerCtrl()
2580 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_345MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2590 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_320MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2600 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_288MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2610 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_240MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/hvd_ex/
H A DhalHVD_EX.c2554 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2564 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2574 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV, TOP_CKG_HVD_INV); in HAL_HVD_EX_PowerCtrl()
2580 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_345MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2590 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_320MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2600 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_288MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2610 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_240MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/hvd_ex/
H A DhalHVD_EX.c2554 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2564 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2574 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV, TOP_CKG_HVD_INV); in HAL_HVD_EX_PowerCtrl()
2580 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_345MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2590 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_320MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2600 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_288MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2610 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_240MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/hvd_ex/
H A DhalHVD_EX.c2554 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2564 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2574 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV, TOP_CKG_HVD_INV); in HAL_HVD_EX_PowerCtrl()
2580 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_345MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2590 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_320MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2600 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_288MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2610 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_240MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/hvd_ex/
H A DhalHVD_EX.c2554 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2564 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2574 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV, TOP_CKG_HVD_INV); in HAL_HVD_EX_PowerCtrl()
2580 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_345MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2590 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_320MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2600 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_288MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2610 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_240MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/hvd_ex/
H A DhalHVD_EX.c2554 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2564 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS, TOP_CKG_HVD_DIS); in HAL_HVD_EX_PowerCtrl()
2574 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV, TOP_CKG_HVD_INV); in HAL_HVD_EX_PowerCtrl()
2580 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_345MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2582 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2590 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_320MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2592 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2600 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_288MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_VP6_192MHZ, TOP_CKG_VP6_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
2610 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_240MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/hvd/
H A DhalHVD_sub.c1479 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1483 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1486 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_Sub_PowerCtrl()
1490 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1493 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1496 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1499 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_123MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1502 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
H A DhalHVD.c1577 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1585 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1592 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_PowerCtrl()
1596 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_216MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1599 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1605 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1608 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
H A DregHVD.h190 #define _HVD_WriteByteMask( u32Reg, u8Val, u8Msk ) \ macro
199 …_HVD_WriteByteMask( ((u32Reg)+1) , (((u16Val) & 0xff00)>>8) , (((u16Msk)&0xff00)>>8) ); …
200 …_HVD_WriteByteMask( (u32Reg) , ((u16Val) & 0x00ff) , ((u16Msk)&0x00ff) ); …
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/hvd/
H A DhalHVD_sub.c1479 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1483 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1486 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_Sub_PowerCtrl()
1490 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1493 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1496 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1499 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_123MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1502 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
H A DhalHVD.c1577 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1585 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1592 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_PowerCtrl()
1596 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_216MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1599 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1605 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1608 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
H A DregHVD.h190 #define _HVD_WriteByteMask( u32Reg, u8Val, u8Msk ) \ macro
199 …_HVD_WriteByteMask( ((u32Reg)+1) , (((u16Val) & 0xff00)>>8) , (((u16Msk)&0xff00)>>8) ); …
200 …_HVD_WriteByteMask( (u32Reg) , ((u16Val) & 0x00ff) , ((u16Msk)&0x00ff) ); …
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/hvd/
H A DhalHVD_sub.c1479 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1483 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1486 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_Sub_PowerCtrl()
1490 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1493 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1496 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1499 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_123MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1502 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
H A DhalHVD.c1577 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1585 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1592 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_PowerCtrl()
1596 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_216MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1599 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1605 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1608 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
H A DregHVD.h190 #define _HVD_WriteByteMask( u32Reg, u8Val, u8Msk ) \ macro
199 …_HVD_WriteByteMask( ((u32Reg)+1) , (((u16Val) & 0xff00)>>8) , (((u16Msk)&0xff00)>>8) ); …
200 …_HVD_WriteByteMask( (u32Reg) , ((u16Val) & 0x00ff) , ((u16Msk)&0x00ff) ); …
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/hvd/
H A DhalHVD_sub.c1479 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1483 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1486 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_Sub_PowerCtrl()
1490 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1493 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1496 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1499 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_123MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1502 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
H A DhalHVD.c1577 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1585 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1592 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_PowerCtrl()
1596 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_216MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1599 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1605 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1608 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
H A DregHVD.h190 #define _HVD_WriteByteMask( u32Reg, u8Val, u8Msk ) \ macro
199 …_HVD_WriteByteMask( ((u32Reg)+1) , (((u16Val) & 0xff00)>>8) , (((u16Msk)&0xff00)>>8) ); …
200 …_HVD_WriteByteMask( (u32Reg) , ((u16Val) & 0x00ff) , ((u16Msk)&0x00ff) ); …
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/hvd/
H A DhalHVD_sub.c1479 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1483 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1486 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_Sub_PowerCtrl()
1490 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1493 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1496 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1499 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_123MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1502 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
H A DhalHVD.c1577 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1585 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1592 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_PowerCtrl()
1596 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_216MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1599 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1605 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1608 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/hvd/
H A DhalHVD_sub.c1479 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1483 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_Sub_PowerCtrl()
1486 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_Sub_PowerCtrl()
1490 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1493 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1496 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1499 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_123MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
1502 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_Sub_PowerCtrl()
H A DhalHVD.c1577 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1585 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_DIS , TOP_CKG_HVD_DIS ); in HAL_HVD_PowerCtrl()
1592 _HVD_WriteByteMask(REG_TOP_HVD, ~TOP_CKG_HVD_INV , TOP_CKG_HVD_INV ); in HAL_HVD_PowerCtrl()
1596 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_216MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1599 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_172MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1602 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1605 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_144MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
1608 _HVD_WriteByteMask(REG_TOP_HVD, TOP_CKG_HVD_160MHZ , TOP_CKG_HVD_CLK_MASK); in HAL_HVD_PowerCtrl()
H A DregHVD.h190 #define _HVD_WriteByteMask( u32Reg, u8Val, u8Msk ) \ macro
199 …_HVD_WriteByteMask( ((u32Reg)+1) , (((u16Val) & 0xff00)>>8) , (((u16Msk)&0xff00)>>8) ); …
200 …_HVD_WriteByteMask( (u32Reg) , ((u16Val) & 0x00ff) , ((u16Msk)&0x00ff) ); …

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