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Searched refs:UPDATE_DC0_FREERUN_CW (Results 1 – 25 of 36) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/mvop/hal/maldives/mvop/
H A DregMVOP.h336 #define UPDATE_DC0_FREERUN_CW BIT3 macro
H A DhalMVOP.c1192 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 1, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
1193 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 0, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/
H A DregMVOP.h396 #define UPDATE_DC0_FREERUN_CW BIT3 macro
H A DhalMVOP.c1339 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 1, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
1340 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 0, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/
H A DregMVOP.h418 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/
H A DregMVOP.h416 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/
H A DregMVOP.h409 #define UPDATE_DC0_FREERUN_CW BIT0 macro
H A DhalMVOP.c1429 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 1, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
1430 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 0, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/
H A DregMVOP.h423 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/
H A DregMVOP.h416 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/
H A DregMVOP.h439 #define UPDATE_DC0_FREERUN_CW BIT0 macro
H A DhalMVOP.c1453 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 1, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
1454 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 0, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/
H A DregMVOP.h424 #define UPDATE_DC0_FREERUN_CW BIT0 macro
H A DhalMVOP.c1526 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 1, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
1527 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 0, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/
H A DregMVOP.h436 #define UPDATE_DC0_FREERUN_CW BIT0 macro
H A DhalMVOP.c1547 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 1, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
1548 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 0, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/
H A DregMVOP.h426 #define UPDATE_DC0_FREERUN_CW BIT3 macro
H A DhalMVOP.c1403 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 1, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
1404 HAL_WriteRegBit(REG_UPDATE_DC0_CW, 0, UPDATE_DC0_FREERUN_CW); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/
H A DregMVOP.h451 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/
H A DregMVOP.h448 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/
H A DregMVOP.h449 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/
H A DregMVOP.h456 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/
H A DregMVOP.h436 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/
H A DregMVOP.h484 #define UPDATE_DC0_FREERUN_CW BIT0 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/
H A DregMVOP.h517 #define UPDATE_DC0_FREERUN_CW BIT0 macro

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