Home
last modified time | relevance | path

Searched refs:REG_MHL_CBUS_50 (Results 1 – 25 of 33) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/
H A DhwregMHL.h143 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA2) macro
H A DhalMHL.c160 {REG_MHL_CBUS_50, BIT(13), BIT(13)}, // [13]: MSC send command keep mode
165 {REG_MHL_CBUS_50, BIT(13), 0}, // [13]: MSC send command keep mode
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/
H A DhwregMHL.h143 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA2) macro
H A DhalMHL.c160 {REG_MHL_CBUS_50, BIT(13), BIT(13)}, // [13]: MSC send command keep mode
165 {REG_MHL_CBUS_50, BIT(13), 0}, // [13]: MSC send command keep mode
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c182 {REG_MHL_CBUS_50, BIT(13), BIT(13)}, // [13]: MSC send command keep mode
187 {REG_MHL_CBUS_50, BIT(13), 0}, // [13]: MSC send command keep mode
H A DhwregMHL.h196 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c182 {REG_MHL_CBUS_50, BIT(13), BIT(13)}, // [13]: MSC send command keep mode
187 {REG_MHL_CBUS_50, BIT(13), 0}, // [13]: MSC send command keep mode
H A DhwregMHL.h196 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhwregMHL.h196 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
H A DhalMHL.c166 {REG_MHL_CBUS_50, BIT(13), BIT(13)}, // [13]: MSC send command keep mode
171 {REG_MHL_CBUS_50, BIT(13), 0}, // [13]: MSC send command keep mode
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhwregMHL.h196 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhwregMHL.h196 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhwregMHL.h196 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
H A DhalMHL.c166 {REG_MHL_CBUS_50, BIT(13), BIT(13)}, // [13]: MSC send command keep mode
171 {REG_MHL_CBUS_50, BIT(13), 0}, // [13]: MSC send command keep mode
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhwregMHL.h196 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhwregMHL.h196 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhwregMHL.h196 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_pm_sleep.h607 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_pm_sleep.h605 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_pm_sleep.h606 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_pm_sleep.h607 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_pm_sleep.h607 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_pm_sleep.h608 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_pm_sleep.h608 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_pm_sleep.h607 #define REG_MHL_CBUS_50 (REG_MHL_CBUS_BANK + 0xA0) macro

12