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Searched refs:REG_FIQEXP_CLEAR_L (Results 1 – 25 of 28) sorted by relevance

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/utopia/UTPA2-700.0.x/mxlib/hal/M7621/
H A DregCHIP.h140 #define REG_FIQEXP_CLEAR_L 0x002e macro
166 #define REG_FIQEXP_CLEAR_L 0x002e macro
/utopia/UTPA2-700.0.x/mxlib/hal/maxim/
H A DregCHIP.h140 #define REG_FIQEXP_CLEAR_L 0x002e macro
165 #define REG_FIQEXP_CLEAR_L 0x002e macro
H A DhalCHIP.c536 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x1 << (u8VectorIndex-E_FIQEXPL_START) ); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/manhattan/
H A DregCHIP.h140 #define REG_FIQEXP_CLEAR_L 0x002e macro
165 #define REG_FIQEXP_CLEAR_L 0x002e macro
H A DhalCHIP.c536 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x1 << (u8VectorIndex-E_FIQEXPL_START) ); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/marcus/
H A DregCHIP.h140 #define REG_FIQEXP_CLEAR_L 0x002e macro
165 #define REG_FIQEXP_CLEAR_L 0x002e macro
H A DhalCHIP.c536 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x1 << (u8VectorIndex-E_FIQEXPL_START) ); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/M7821/
H A DregCHIP.h140 #define REG_FIQEXP_CLEAR_L 0x002e macro
166 #define REG_FIQEXP_CLEAR_L 0x002e macro
H A DhalCHIP.c536 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x1 << (u8VectorIndex-E_FIQEXPL_START) ); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/maserati/
H A DregCHIP.h140 #define REG_FIQEXP_CLEAR_L 0x002e macro
165 #define REG_FIQEXP_CLEAR_L 0x002e macro
H A DhalCHIP.c536 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x1 << (u8VectorIndex-E_FIQEXPL_START) ); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/curry/
H A DregCHIP.h121 #define REG_FIQEXP_CLEAR_L 0x002e macro
154 #define REG_FIQEXP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e) macro
H A DhalCHIP.c637 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
1760 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/k7u/
H A DregCHIP.h121 #define REG_FIQEXP_CLEAR_L 0x002e macro
154 #define REG_FIQEXP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e) macro
H A DhalCHIP.c637 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
1773 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/k6lite/
H A DregCHIP.h121 #define REG_FIQEXP_CLEAR_L 0x002e macro
154 #define REG_FIQEXP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e) macro
H A DhalCHIP.c637 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
1773 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/k6/
H A DregCHIP.h121 #define REG_FIQEXP_CLEAR_L 0x002e macro
154 #define REG_FIQEXP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e) macro
H A DhalCHIP.c637 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
1773 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/kano/
H A DregCHIP.h121 #define REG_FIQEXP_CLEAR_L 0x002e macro
154 #define REG_FIQEXP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e) macro
H A DhalCHIP.c637 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
1773 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
/utopia/UTPA2-700.0.x/mxlib/hal/mustang/
H A DregCHIP.h127 #define REG_FIQEXP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e) macro
/utopia/UTPA2-700.0.x/mxlib/hal/messi/
H A DregCHIP.h127 #define REG_FIQEXP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e) macro
/utopia/UTPA2-700.0.x/mxlib/hal/mainz/
H A DregCHIP.h127 #define REG_FIQEXP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e) macro
H A DhalCHIP.c518 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()

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