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Searched refs:REG_DC0_FREERUN_CW_L (Results 1 – 25 of 36) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/mvop/hal/maldives/mvop/
H A DregMVOP.h342 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0x10) macro
H A DhalMVOP.c1188 HAL_WriteByte((REG_DC0_FREERUN_CW_L ), LOWBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
1189 HAL_WriteByte((REG_DC0_FREERUN_CW_L+1), HIGHBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/
H A DregMVOP.h402 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0x10) macro
H A DhalMVOP.c1335 HAL_WriteByte((REG_DC0_FREERUN_CW_L ), LOWBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
1336 HAL_WriteByte((REG_DC0_FREERUN_CW_L+1), HIGHBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/
H A DregMVOP.h420 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/
H A DregMVOP.h418 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/
H A DregMVOP.h411 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
H A DhalMVOP.c1425 HAL_WriteByte((REG_DC0_FREERUN_CW_L ), LOWBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
1426 HAL_WriteByte((REG_DC0_FREERUN_CW_L+1), HIGHBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/
H A DregMVOP.h425 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/
H A DregMVOP.h418 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/
H A DregMVOP.h441 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
H A DhalMVOP.c1449 HAL_WriteByte((REG_DC0_FREERUN_CW_L ), LOWBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
1450 HAL_WriteByte((REG_DC0_FREERUN_CW_L+1), HIGHBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/
H A DregMVOP.h426 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
H A DhalMVOP.c1522 HAL_WriteByte((REG_DC0_FREERUN_CW_L ), LOWBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
1523 HAL_WriteByte((REG_DC0_FREERUN_CW_L+1), HIGHBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/
H A DregMVOP.h438 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
H A DhalMVOP.c1543 HAL_WriteByte((REG_DC0_FREERUN_CW_L ), LOWBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
1544 HAL_WriteByte((REG_DC0_FREERUN_CW_L+1), HIGHBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/
H A DregMVOP.h432 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0x10) macro
H A DhalMVOP.c1399 HAL_WriteByte((REG_DC0_FREERUN_CW_L ), LOWBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
1400 HAL_WriteByte((REG_DC0_FREERUN_CW_L+1), HIGHBYTE((MS_U16)u32FreerunClk)); in HAL_MVOP_SetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/
H A DregMVOP.h453 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/
H A DregMVOP.h450 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/
H A DregMVOP.h451 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/
H A DregMVOP.h458 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/
H A DregMVOP.h438 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/
H A DregMVOP.h486 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/
H A DregMVOP.h519 #define REG_DC0_FREERUN_CW_L (CHIP_REG_BASE + 0xE4) macro

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