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Searched refs:REG_COMBO_PHY1_P0_BASE (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1755 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1756 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1757 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1758 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1759 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1760 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1762 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1763 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1764 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
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H A Dmhal_xc_chip_config.h580 #define REG_COMBO_PHY1_P0_BASE 0x170300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1757 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1758 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1759 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1760 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1761 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1762 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1763 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1764 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1765 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1766 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
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H A Dmhal_xc_chip_config.h562 #define REG_COMBO_PHY1_P0_BASE 0x172900UL macro
564 #define REG_COMBO_PHY1_P1_BASE REG_COMBO_PHY1_P0_BASE
566 #define REG_COMBO_PHY1_P2_BASE REG_COMBO_PHY1_P0_BASE
568 #define REG_COMBO_PHY1_P3_BASE REG_COMBO_PHY1_P0_BASE
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1755 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1756 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1757 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1758 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1759 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1760 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1762 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1763 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1764 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h540 #define REG_COMBO_PHY1_P0_BASE 0x170300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1757 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1758 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1759 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1760 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1761 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1762 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1763 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1764 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1765 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1766 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
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H A Dmhal_xc_chip_config.h564 #define REG_COMBO_PHY1_P0_BASE 0x172900UL macro
566 #define REG_COMBO_PHY1_P1_BASE REG_COMBO_PHY1_P0_BASE
568 #define REG_COMBO_PHY1_P2_BASE REG_COMBO_PHY1_P0_BASE
570 #define REG_COMBO_PHY1_P3_BASE REG_COMBO_PHY1_P0_BASE
H A Dmhal_xc_chip_config.h.0563 #define REG_COMBO_PHY1_P0_BASE 0x172900UL
565 #define REG_COMBO_PHY1_P1_BASE REG_COMBO_PHY1_P0_BASE
567 #define REG_COMBO_PHY1_P2_BASE REG_COMBO_PHY1_P0_BASE
569 #define REG_COMBO_PHY1_P3_BASE REG_COMBO_PHY1_P0_BASE
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1755 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1756 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1757 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1758 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1759 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1760 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1762 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1763 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1764 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
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H A Dmhal_xc_chip_config.h567 #define REG_COMBO_PHY1_P0_BASE 0x170300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1757 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1758 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1759 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1760 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1761 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1762 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1763 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1764 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1765 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1766 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h556 #define REG_COMBO_PHY1_P0_BASE 0x172900UL macro
558 #define REG_COMBO_PHY1_P1_BASE REG_COMBO_PHY1_P0_BASE
560 #define REG_COMBO_PHY1_P2_BASE REG_COMBO_PHY1_P0_BASE
562 #define REG_COMBO_PHY1_P3_BASE REG_COMBO_PHY1_P0_BASE
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1757 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1758 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1759 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1760 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1761 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1762 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1763 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1764 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1765 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1766 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h562 #define REG_COMBO_PHY1_P0_BASE 0x172900UL macro
564 #define REG_COMBO_PHY1_P1_BASE REG_COMBO_PHY1_P0_BASE
566 #define REG_COMBO_PHY1_P2_BASE REG_COMBO_PHY1_P0_BASE
568 #define REG_COMBO_PHY1_P3_BASE REG_COMBO_PHY1_P0_BASE
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h1755 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1756 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1757 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1758 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1759 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1760 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1762 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1763 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1764 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
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H A Dmhal_xc_chip_config.h538 #define REG_COMBO_PHY1_P0_BASE 0x170300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h1756 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1757 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1758 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1759 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1760 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1761 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1762 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1763 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1764 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1765 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
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H A Dmhal_xc_chip_config.h521 #define REG_COMBO_PHY1_P0_BASE 0x170300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h1755 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1756 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1757 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1758 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1759 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1760 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1762 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1763 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1764 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h614 #define REG_COMBO_PHY1_P0_BASE 0x170300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h1755 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1756 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1757 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1758 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1759 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1760 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1762 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1763 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1764 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h626 #define REG_COMBO_PHY1_P0_BASE 0x170300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h1755 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1756 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1757 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1758 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1759 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1760 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1762 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1763 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1764 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h1755 #define REG_COMBO_PHY1_P0_00_L (REG_COMBO_PHY1_P0_BASE + 0x00)
1756 #define REG_COMBO_PHY1_P0_00_H (REG_COMBO_PHY1_P0_BASE + 0x01)
1757 #define REG_COMBO_PHY1_P0_01_L (REG_COMBO_PHY1_P0_BASE + 0x02)
1758 #define REG_COMBO_PHY1_P0_01_H (REG_COMBO_PHY1_P0_BASE + 0x03)
1759 #define REG_COMBO_PHY1_P0_02_L (REG_COMBO_PHY1_P0_BASE + 0x04)
1760 #define REG_COMBO_PHY1_P0_02_H (REG_COMBO_PHY1_P0_BASE + 0x05)
1761 #define REG_COMBO_PHY1_P0_03_L (REG_COMBO_PHY1_P0_BASE + 0x06)
1762 #define REG_COMBO_PHY1_P0_03_H (REG_COMBO_PHY1_P0_BASE + 0x07)
1763 #define REG_COMBO_PHY1_P0_04_L (REG_COMBO_PHY1_P0_BASE + 0x08)
1764 #define REG_COMBO_PHY1_P0_04_H (REG_COMBO_PHY1_P0_BASE + 0x09)
[all …]

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