| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| H A D | mhal_adctbl.c | 440 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| H A D | mhal_adctbl.c | 440 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| H A D | mhal_adctbl.c | 435 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| H A D | mhal_adctbl.c | 440 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_adc.c | 1454 W2BYTEMSK(REG_ADC_ATOP_32_L, IsShareGrd?BIT(9):0 , BIT(9) ); in Hal_ADC_init()
1467 W2BYTEMSK(REG_ADC_ATOP_32_L, ScartIDPort , BIT(12)|BIT(13)|BIT(14)|BIT(15) ); in Hal_ADC_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_adc.c | 1454 W2BYTEMSK(REG_ADC_ATOP_32_L, IsShareGrd?BIT(9):0 , BIT(9) ); in Hal_ADC_init()
1467 W2BYTEMSK(REG_ADC_ATOP_32_L, ScartIDPort , BIT(12)|BIT(13)|BIT(14)|BIT(15) ); in Hal_ADC_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | mhal_adctbl.c | 500 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | mhal_adctbl.c | 500 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | mhal_adctbl.c | 500 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | mhal_adctbl.c | 505 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | mhal_adctbl.c | 500 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | mhal_adctbl.c | 500 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | mhal_adctbl.c | 505 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/,
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| H A D | hwreg_adc_atop.h | 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) macro
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