1 // Excel File version:0.1 2 //////////////////////////////////////////////////////////////////////////////// 3 // 4 // Copyright (c) 2006-2008 MStar Semiconductor, Inc. 5 // All rights reserved. 6 // 7 // Unless otherwise stipulated in writing, any and all information contained 8 // herein regardless in any format shall remain the sole proprietary of 9 // MStar Semiconductor Inc. and be kept in strict confidence 10 // (; MStar; Confidential; Information; ) by the recipient. 11 // Any unauthorized act including without limitation unauthorized disclosure, 12 // copying, use, reproduction, sale, distribution, modification, disassembling, 13 // reverse engineering and compiling of the contents of MStar Confidential 14 // Information is unlawful and strictly prohibited. MStar hereby reserves the 15 // rights to any and all damages, losses, costs and expenses resulting therefrom. 16 // 17 //**************************************************** 18 // Amber3_ADC_Driver_LDO 19 // Excel File version:0.1 20 // 4/14/2016 14:21 21 //**************************************************** 22 23 #ifndef _DRVADCTBL_C_ 24 #define _DRVADCTBL_C_ 25 26 //**************************************************** 27 // INIT 28 //**************************************************** 29 MS_U8 MST_ADCINIT_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_INIT_NUMS*REG_DATA_SIZE]= 30 { // Reg Mask Ignore Value 31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0xF0, 0x00, 0x80/*$All*/, }, 32 { DRV_ADC_REG(REG_ADC_ATOP_0E_L), 0x01, 0x00, 0x00/*All*/, }, 33 { DRV_ADC_REG(REG_ADC_ATOP_12_L), 0x01, 0x00, 0x00/*All*/, }, 34 { DRV_ADC_REG(REG_ADC_ATOP_5E_L), 0xC2, 0x00, 0x00/*$All*/, }, 35 { DRV_ADC_REG(REG_ADC_ATOP_5E_H), 0x3F, 0x00, 0x02/*$All*/, }, 36 { DRV_ADC_REG(REG_ADC_ATOP_20_L), 0x3F, 0x00, 0x04/*$All*/, }, 37 { DRV_ADC_REG(REG_ADC_ATOP_10_L), 0x07, 0x00, 0x01/*All*/, }, 38 { DRV_ADC_REG(REG_ADC_ATOP_0A_L), 0x02, 0x00, 0x00/*All*/, }, 39 { DRV_ADC_REG(REG_ADC_ATOP_0B_H), 0x18, 0x00, 0x00/*All*/, }, 40 { DRV_ADC_REG(REG_ADC_ATOP_20_H), 0x77, 0x00, 0x77/*$All*/, }, 41 { DRV_ADC_REG(REG_ADC_ATOP_39_L), 0x1F, 0x00, 0x00/*All*/, }, 42 { DRV_ADC_REG(REG_ADC_ATOP_39_H), 0x20, 0x00, 0x20/*All*/, }, 43 { DRV_ADC_REG(REG_ADC_ATOP_3B_L), 0xFF, 0x00, 0x80/*All*/, }, 44 { DRV_ADC_REG(REG_ADC_ATOP_3B_H), 0x0C, 0x00, 0x00/*All*/, }, 45 { DRV_ADC_REG(REG_ADC_ATOP_3C_L), 0x1F, 0x00, 0x00/*All*/, }, 46 { DRV_ADC_REG(REG_ADC_ATOP_3C_H), 0x20, 0x00, 0x20/*All*/, }, 47 { DRV_ADC_REG(REG_ADC_ATOP_3E_L), 0xFF, 0x00, 0x80/*All*/, }, 48 { DRV_ADC_REG(REG_ADC_ATOP_3E_H), 0x0C, 0x00, 0x00/*All*/, }, 49 { DRV_ADC_REG(REG_ADC_ATOP_7A_H), 0xFF, 0x00, 0x28/*All*/, }, 50 { DRV_ADC_REG(REG_ADC_ATOP_7B_L), 0x2A, 0x00, 0x2A/*All*/, }, 51 { DRV_ADC_REG(REG_ADC_ATOP_19_L), 0x01, 0x00, 0x00/*All*/, }, 52 { DRV_ADC_REG(REG_ADC_ATOP_30_L), 0x07, 0x00, 0x00/*All*/, }, 53 { DRV_ADC_REG(REG_ADC_DTOP_76_L), 0xF0, 0x00, 0xE0/*All*/, }, 54 { DRV_ADC_REG(REG_ADC_DTOP_76_H), 0x0F, 0x00, 0x07/*All*/, }, 55 { DRV_ADC_REG(REG_ADC_DTOP_0D_H), 0x10, 0x00, 0x10/*All*/, }, 56 { DRV_ADC_REG(REG_ADC_DTOP_07_L), 0x18, 0x00, 0x00/*$All*/, }, 57 { DRV_ADC_REG(REG_ADC_DTOP_07_H), 0xFF, 0x00, 0x04/*All*/, }, 58 { DRV_ADC_REG(REG_ADC_DTOP_63_L), 0x3F, 0x00, 0x17/*All*/, }, 59 { DRV_ADC_REG(REG_ADC_DTOP_64_L), 0x3F, 0x00, 0x17/*All*/, }, 60 { DRV_ADC_REG(REG_ADC_DTOP_18_L), 0xFF, 0x00, 0x20/*All*/, }, 61 { DRV_ADC_REG(REG_ADC_DTOP_18_H), 0x07, 0x00, 0x07/*$All*/, }, 62 { DRV_ADC_REG(REG_ADC_DTOP_19_H), 0x1E, 0x00, 0x04/*$All*/, }, 63 { DRV_ADC_REG(REG_ADC_DTOP_65_L), 0xFF, 0x00, 0xCC/*$All*/, }, 64 { DRV_ADC_REG(REG_ADC_DTOP_65_H), 0xFF, 0x00, 0xCC/*$All*/, }, 65 { DRV_ADC_REG(REG_ADC_DTOP_22_L), 0xFF, 0x00, 0x05/*All*/, }, 66 { DRV_ADC_REG(REG_ADC_DTOP_22_H), 0x0F, 0x00, 0x00/*All*/, }, 67 { DRV_ADC_REG(REG_ADC_DTOP_23_L), 0xFF, 0x00, 0xD0/*All*/, }, 68 { DRV_ADC_REG(REG_ADC_DTOP_23_H), 0x1F, 0x00, 0x07/*All*/, }, 69 { DRV_ADC_REG(REG_ADC_DTOP_24_L), 0xFF, 0x00, 0x60/*$All*/, }, 70 { DRV_ADC_REG(REG_ADC_DTOP_24_H), 0x3F, 0x00, 0x20/*All*/, }, 71 { DRV_ADC_REG(REG_ADC_DTOP_25_L), 0xFF, 0x00, 0xA0/*$All*/, }, 72 { DRV_ADC_REG(REG_ADC_DTOP_25_H), 0x1F, 0x00, 0x03/*$All*/, }, 73 { DRV_ADC_REG(REG_ADC_DTOP_26_L), 0xFF, 0x00, 0x00/*All*/, }, 74 { DRV_ADC_REG(REG_ADC_DTOP_26_H), 0x3F, 0x00, 0x1C/*$All*/, }, 75 { DRV_ADC_REG(REG_ADC_DTOP_27_L), 0xFF, 0x00, 0x40/*All*/, }, 76 { DRV_ADC_REG(REG_ADC_DTOP_27_H), 0x3F, 0x00, 0x05/*All*/, }, 77 { DRV_ADC_REG(REG_ADC_DTOP_28_L), 0xFF, 0x00, 0x4A/*$All*/, }, 78 { DRV_ADC_REG(REG_ADC_DTOP_28_H), 0xFF, 0x00, 0x08/*$All*/, }, 79 { DRV_ADC_REG(REG_ADC_DTOP_29_L), 0xFF, 0x00, 0x10/*$All*/, }, 80 { DRV_ADC_REG(REG_ADC_DTOP_29_H), 0x3F, 0x00, 0x20/*$All*/, }, 81 { DRV_ADC_REG(REG_ADC_DTOP_2C_L), 0xFF, 0x00, 0x05/*All*/, }, 82 { DRV_ADC_REG(REG_ADC_DTOP_2C_H), 0x0F, 0x00, 0x00/*All*/, }, 83 { DRV_ADC_REG(REG_ADC_DTOP_2D_L), 0xFF, 0x00, 0xD0/*All*/, }, 84 { DRV_ADC_REG(REG_ADC_DTOP_2D_H), 0x1F, 0x00, 0x07/*All*/, }, 85 { DRV_ADC_REG(REG_ADC_DTOP_2E_L), 0xFF, 0x00, 0x60/*$All*/, }, 86 { DRV_ADC_REG(REG_ADC_DTOP_2E_H), 0x3F, 0x00, 0x20/*All*/, }, 87 { DRV_ADC_REG(REG_ADC_DTOP_2F_L), 0xFF, 0x00, 0xA0/*$All*/, }, 88 { DRV_ADC_REG(REG_ADC_DTOP_2F_H), 0x1F, 0x00, 0x03/*$All*/, }, 89 { DRV_ADC_REG(REG_ADC_DTOP_30_L), 0xFF, 0x00, 0x00/*All*/, }, 90 { DRV_ADC_REG(REG_ADC_DTOP_30_H), 0x3F, 0x00, 0x1C/*$All*/, }, 91 { DRV_ADC_REG(REG_ADC_DTOP_31_L), 0xFF, 0x00, 0x40/*All*/, }, 92 { DRV_ADC_REG(REG_ADC_DTOP_31_H), 0x3F, 0x00, 0x05/*All*/, }, 93 { DRV_ADC_REG(REG_ADC_DTOP_32_L), 0xFF, 0x00, 0x4A/*$All*/, }, 94 { DRV_ADC_REG(REG_ADC_DTOP_32_H), 0xFF, 0x00, 0x08/*$All*/, }, 95 { DRV_ADC_REG(REG_ADC_DTOP_33_L), 0xFF, 0x00, 0x10/*$All*/, }, 96 { DRV_ADC_REG(REG_ADC_DTOP_33_H), 0x3F, 0x00, 0x20/*$All*/, }, 97 { DRV_ADC_REG(REG_ADC_DTOP_36_L), 0xFF, 0x00, 0x05/*All*/, }, 98 { DRV_ADC_REG(REG_ADC_DTOP_36_H), 0x0F, 0x00, 0x00/*All*/, }, 99 { DRV_ADC_REG(REG_ADC_DTOP_37_L), 0xFF, 0x00, 0xD0/*All*/, }, 100 { DRV_ADC_REG(REG_ADC_DTOP_37_H), 0x1F, 0x00, 0x07/*All*/, }, 101 { DRV_ADC_REG(REG_ADC_DTOP_38_L), 0xFF, 0x00, 0x60/*$All*/, }, 102 { DRV_ADC_REG(REG_ADC_DTOP_38_H), 0x3F, 0x00, 0x20/*All*/, }, 103 { DRV_ADC_REG(REG_ADC_DTOP_39_L), 0xFF, 0x00, 0xA0/*$All*/, }, 104 { DRV_ADC_REG(REG_ADC_DTOP_39_H), 0x1F, 0x00, 0x03/*$All*/, }, 105 { DRV_ADC_REG(REG_ADC_DTOP_3A_L), 0xFF, 0x00, 0x00/*All*/, }, 106 { DRV_ADC_REG(REG_ADC_DTOP_3A_H), 0x3F, 0x00, 0x1C/*$All*/, }, 107 { DRV_ADC_REG(REG_ADC_DTOP_3B_L), 0xFF, 0x00, 0x40/*All*/, }, 108 { DRV_ADC_REG(REG_ADC_DTOP_3B_H), 0x3F, 0x00, 0x05/*All*/, }, 109 { DRV_ADC_REG(REG_ADC_DTOP_3C_L), 0xFF, 0x00, 0x4A/*$All*/, }, 110 { DRV_ADC_REG(REG_ADC_DTOP_3C_H), 0xFF, 0x00, 0x08/*$All*/, }, 111 { DRV_ADC_REG(REG_ADC_DTOP_3D_L), 0xFF, 0x00, 0x10/*$All*/, }, 112 { DRV_ADC_REG(REG_ADC_DTOP_3D_H), 0x3F, 0x00, 0x20/*$All*/, }, 113 { DRV_ADC_REG(REG_ADC_DTOP_62_H), 0x60, 0x00, 0x00/*All*/, }, 114 { DRV_ADC_REG(REG_ADC_DTOP_68_L), 0x18, 0x00, 0x18/*$All*/, }, 115 { DRV_ADC_REG(REG_ADC_ATOP_40_L), 0x8F, 0x00, 0x08/*$All*/, }, 116 { DRV_ADC_REG(REG_ADC_ATOP_40_H), 0x01, 0x00, 0x00/*All*/, }, 117 { DRV_ADC_REG(REG_ADC_ATOP_42_L), 0xFF, 0x00, 0xEC/*$All*/, }, 118 { DRV_ADC_REG(REG_ADC_ATOP_42_H), 0x0F, 0x00, 0x00/*$All*/, }, 119 { DRV_ADC_REG(REG_ADC_ATOP_43_L), 0x7F, 0x00, 0x00/*All*/, }, 120 { DRV_ADC_REG(REG_ADC_ATOP_43_H), 0x7F, 0x00, 0x00/*All*/, }, 121 { DRV_ADC_REG(REG_ADC_ATOP_44_L), 0x3F, 0x00, 0x1C/*All*/, }, 122 { DRV_ADC_REG(REG_ADC_ATOP_44_H), 0xFF, 0x00, 0xFF/*All*/, }, 123 { DRV_ADC_REG(REG_ADC_ATOP_45_L), 0x3F, 0x00, 0x00/*All*/, }, 124 { DRV_ADC_REG(REG_ADC_ATOP_46_L), 0x1B, 0x00, 0x0B/*$All*/, }, 125 { DRV_ADC_REG(REG_ADC_ATOP_47_H), 0x08, 0x00, 0x08/*All*/, }, 126 { DRV_ADC_REG(REG_ADC_DTOP_53_L), 0x1F, 0x00, 0x08/*All*/, }, 127 { DRV_ADC_REG(REG_ADC_ATOP_03_H), 0x0D, 0x00, 0x0D/*$All*/, }, 128 { DRV_ADC_REG(REG_ADC_CLKGEN0_20_L), 0x10, 0x00, 0x10/*All*/, }, 129 { DRV_ADC_REG(REG_ADC_ATOP_00_L), 0x08, 0x00, 0x08/*All*/, }, 130 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*All*/, }, 131 { DRV_ADC_REG(REG_ADC_ATOP_05_H), 0x30, 0x00, 0x00/*$All*/, }, 132 { DRV_ADC_REG(REG_ADC_ATOP_03_L), 0x40, 0x00, 0x40/*All*/, }, 133 { DRV_ADC_REG(REG_ADC_ATOP_00_H), 0x30, 0x00, 0x10/*All*/, }, 134 { DRV_ADC_REG(REG_ADC_ATOP_05_L), 0xC0, 0x00, 0x00/*$All*/, }, 135 { DRV_ADC_REG(REG_ADC_ATOP_38_H), 0x01, 0x00, 0x01/*All*/, }, 136 { DRV_ADC_REG(REG_ADC_DTOP_66_L), 0x0F, 0x00, 0x04/*All*/, }, 137 { DRV_ADC_REG(REG_ADC_ATOP_08_L), 0x01, 0x00, 0x00/*All*/, }, 138 { DRV_ADC_REG(REG_ADC_ATOPB_40_L), 0xFF, 0x00, 0x80/*All*/, }, 139 { DRV_ADC_REG(REG_ADC_ATOPB_40_H), 0x7F, 0x00, 0x00/*$All*/, }, 140 { DRV_ADC_REG(REG_ADC_ATOPB_41_L), 0xFF, 0x00, 0x96/*All*/, }, 141 { DRV_ADC_REG(REG_ADC_ATOPB_41_H), 0x3F, 0x00, 0x17/*All*/, }, 142 { DRV_ADC_REG(REG_ADC_ATOPB_42_L), 0xFF, 0x00, 0x00/*All*/, }, 143 { DRV_ADC_REG(REG_ADC_ATOPB_42_H), 0x7F, 0x00, 0x00/*$All*/, }, 144 { DRV_ADC_REG(REG_ADC_DTOP_67_L), 0xFF, 0x00, 0xD7/*$All*/, }, 145 { DRV_ADC_REG(REG_ADC_DTOP_67_H), 0x03, 0x00, 0x03/*All*/, }, 146 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 147 }; 148 149 //**************************************************** 150 // FreeRunEn 151 //**************************************************** 152 MS_U8 MST_ADCFreeRunEn_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_FreeRunEn_NUMS*REG_DATA_SIZE]= 153 { // Reg Mask Ignore Value 154 { DRV_ADC_REG(REG_ADC_DTOP_01_L), 0xFF, 0x00, 0x56/*All*/, }, 155 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x66/*All*/, }, 156 { DRV_ADC_REG(REG_ADC_DTOP_02_L), 0xFF, 0x00, 0x66/*All*/, }, 157 { DRV_ADC_REG(REG_ADC_DTOP_02_H), 0xFF, 0x00, 0x00/*All*/, }, 158 { DRV_ADC_REG(REG_ADC_DTOP_06_L), 0xFF, 0x00, 0x80/*All*/, }, 159 { DRV_ADC_REG(REG_ADC_DTOP_06_H), 0xFF, 0x00, 0x00/*All*/, }, 160 { DRV_ADC_REG(REG_ADC_ATOP_09_H), 0x18, 0x00, 0x10/*All*/, }, 161 { DRV_ADC_REG(REG_ADC_ATOP_0C_L), 0x07, 0x00, 0x00/*All*/, }, 162 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 163 }; 164 165 //**************************************************** 166 // FreeRunDis 167 //**************************************************** 168 MS_U8 MST_ADCFreeRunDis_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_FreeRunDis_NUMS*REG_DATA_SIZE]= 169 { // Reg Mask Ignore Value 170 { DRV_ADC_REG(REG_ADC_DTOP_06_L), 0xFF, 0x00, 0x00/*All*/, }, 171 { DRV_ADC_REG(REG_ADC_DTOP_06_H), 0xFF, 0x00, 0x00/*All*/, }, 172 { DRV_ADC_REG(REG_ADC_DTOP_01_L), 0xFF, 0x00, 0x82/*All*/, }, 173 { DRV_ADC_REG(REG_ADC_DTOP_01_H), 0xFF, 0x00, 0x09/*All*/, }, 174 { DRV_ADC_REG(REG_ADC_DTOP_02_L), 0xFF, 0x00, 0x05/*All*/, }, 175 { DRV_ADC_REG(REG_ADC_DTOP_02_H), 0xFF, 0x00, 0x00/*All*/, }, 176 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 177 }; 178 179 //**************************************************** 180 // PorstEn 181 //**************************************************** 182 MS_U8 MST_ADCPorstEn_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_PorstEn_NUMS*REG_DATA_SIZE]= 183 { // Reg Mask Ignore Value 184 { DRV_ADC_REG(REG_ADC_ATOP_0E_L), 0xFE, 0x00, 0x00/*All*/, }, 185 { DRV_ADC_REG(REG_ADC_ATOP_0E_H), 0xFF, 0x00, 0x02/*All*/, }, 186 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 187 }; 188 189 //**************************************************** 190 // PorstDis 191 //**************************************************** 192 MS_U8 MST_ADCPorstDis_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_PorstDis_NUMS*REG_DATA_SIZE]= 193 { // Reg Mask Ignore Value 194 { DRV_ADC_REG(REG_ADC_ATOP_0E_L), 0xFE, 0x00, 0x00/*All*/, }, 195 { DRV_ADC_REG(REG_ADC_ATOP_0E_H), 0xFF, 0x00, 0x00/*All*/, }, 196 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 197 }; 198 199 //**************************************************** 200 // MUX 201 //**************************************************** 202 MS_U8 MST_ADCMUX_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_MUX_NUMS*REG_DATA_SIZE]= 203 { // Reg Mask Ignore Value 204 { DRV_ADC_REG(REG_ADC_ATOP_01_L), 0x03, 0x00, 0x00/*RGB0_Sync*/, 205 0x01, 0x00/*RGB0_Data*/, 206 0x00, 0x01/*RGB1_Sync*/, 207 0x01, 0x00/*RGB1_Data*/, 208 0x00, 0x02/*RGB2_Sync*/, 209 0x01, 0x00/*RGB2_Data*/, 210 0x01, 0x00/*CVBSY0*/, 211 0x01, 0x00/*CVBSY1*/, 212 0x01, 0x00/*CVBSY2*/, 213 0x01, 0x00/*CVBSY3*/, 214 0x01, 0x00/*G0*/, 215 0x01, 0x00/*G1*/, 216 0x01, 0x00/*G2*/, 217 0x01, 0x00/*CVBSC0*/, 218 0x01, 0x00/*CVBSC1*/, 219 0x01, 0x00/*CVBSC2*/, 220 0x01, 0x00/*CVBSC3*/, 221 0x01, 0x00/*R0*/, 222 0x01, 0x00/*R1*/, 223 0x01, 0x00/*R2*/, 224 0x01, 0x00/*DVI0*/, 225 0x01, 0x00/*DVI1*/, 226 0x01, 0x00/*DVI2*/, 227 0x01, 0x00/*DVI3*/, 228 0x01, 0x00/*CVBSX0*/, 229 0x01, 0x00/*CVBSX1*/, 230 0x01, 0x00/*CVBSX2*/, 231 0x01, 0x00/*CVBSX3*/, }, 232 { DRV_ADC_REG(REG_ADC_ATOP_01_H), 0x30, 0x01, 0x00/*RGB0_Sync*/, 233 0x00, 0x00/*RGB0_Data*/, 234 0x01, 0x00/*RGB1_Sync*/, 235 0x00, 0x10/*RGB1_Data*/, 236 0x01, 0x00/*RGB2_Sync*/, 237 0x00, 0x20/*RGB2_Data*/, 238 0x01, 0x00/*CVBSY0*/, 239 0x01, 0x00/*CVBSY1*/, 240 0x01, 0x00/*CVBSY2*/, 241 0x01, 0x00/*CVBSY3*/, 242 0x01, 0x00/*G0*/, 243 0x01, 0x00/*G1*/, 244 0x01, 0x00/*G2*/, 245 0x01, 0x00/*CVBSC0*/, 246 0x01, 0x00/*CVBSC1*/, 247 0x01, 0x00/*CVBSC2*/, 248 0x01, 0x00/*CVBSC3*/, 249 0x01, 0x00/*R0*/, 250 0x01, 0x00/*R1*/, 251 0x01, 0x00/*R2*/, 252 0x01, 0x00/*DVI0*/, 253 0x01, 0x00/*DVI1*/, 254 0x01, 0x00/*DVI2*/, 255 0x01, 0x00/*DVI3*/, 256 0x01, 0x00/*CVBSX0*/, 257 0x01, 0x00/*CVBSX1*/, 258 0x01, 0x00/*CVBSX2*/, 259 0x01, 0x00/*CVBSX3*/, }, 260 { DRV_ADC_REG(REG_ADC_ATOP_02_L), 0x0F, 0x01, 0x00/*RGB0_Sync*/, 261 0x01, 0x00/*RGB0_Data*/, 262 0x01, 0x00/*RGB1_Sync*/, 263 0x01, 0x00/*RGB1_Data*/, 264 0x01, 0x00/*RGB2_Sync*/, 265 0x01, 0x00/*RGB2_Data*/, 266 0x00, 0x00/*CVBSY0*/, 267 0x00, 0x01/*CVBSY1*/, 268 0x00, 0x02/*CVBSY2*/, 269 0x00, 0x03/*CVBSY3*/, 270 0x00, 0x08/*G0*/, 271 0x00, 0x09/*G1*/, 272 0x00, 0x0A/*G2*/, 273 0x01, 0x00/*CVBSC0*/, 274 0x01, 0x00/*CVBSC1*/, 275 0x01, 0x00/*CVBSC2*/, 276 0x01, 0x00/*CVBSC3*/, 277 0x01, 0x00/*R0*/, 278 0x01, 0x00/*R1*/, 279 0x01, 0x00/*R2*/, 280 0x01, 0x00/*DVI0*/, 281 0x01, 0x00/*DVI1*/, 282 0x01, 0x00/*DVI2*/, 283 0x01, 0x00/*DVI3*/, 284 0x01, 0x00/*CVBSX0*/, 285 0x01, 0x00/*CVBSX1*/, 286 0x01, 0x00/*CVBSX2*/, 287 0x01, 0x00/*CVBSX3*/, }, 288 { DRV_ADC_REG(REG_ADC_ATOP_02_L), 0xF0, 0x01, 0x00/*RGB0_Sync*/, 289 0x01, 0x00/*RGB0_Data*/, 290 0x01, 0x00/*RGB1_Sync*/, 291 0x01, 0x00/*RGB1_Data*/, 292 0x01, 0x00/*RGB2_Sync*/, 293 0x01, 0x00/*RGB2_Data*/, 294 0x01, 0x00/*CVBSY0*/, 295 0x01, 0x00/*CVBSY1*/, 296 0x01, 0x00/*CVBSY2*/, 297 0x01, 0x00/*CVBSY3*/, 298 0x01, 0x00/*G0*/, 299 0x01, 0x00/*G1*/, 300 0x01, 0x00/*G2*/, 301 0x00, 0x00/*CVBSC0*/, 302 0x00, 0x10/*CVBSC1*/, 303 0x00, 0x20/*CVBSC2*/, 304 0x00, 0x30/*CVBSC3*/, 305 0x00, 0x80/*R0*/, 306 0x00, 0x90/*R1*/, 307 0x00, 0xA0/*R2*/, 308 0x01, 0x00/*DVI0*/, 309 0x01, 0x00/*DVI1*/, 310 0x01, 0x00/*DVI2*/, 311 0x01, 0x00/*DVI3*/, 312 0x01, 0x00/*CVBSX0*/, 313 0x01, 0x00/*CVBSX1*/, 314 0x01, 0x00/*CVBSX2*/, 315 0x01, 0x00/*CVBSX3*/, }, 316 { DRV_ADC_REG(REG_ADC_ATOP_3A_L), 0x0F, 0x00, 0x00/*RGB0_Sync*/, 317 0x00, 0x00/*RGB0_Data*/, 318 0x00, 0x01/*RGB1_Sync*/, 319 0x00, 0x01/*RGB1_Data*/, 320 0x00, 0x02/*RGB2_Sync*/, 321 0x00, 0x02/*RGB2_Data*/, 322 0x01, 0x00/*CVBSY0*/, 323 0x01, 0x00/*CVBSY1*/, 324 0x01, 0x00/*CVBSY2*/, 325 0x01, 0x00/*CVBSY3*/, 326 0x01, 0x00/*G0*/, 327 0x01, 0x00/*G1*/, 328 0x01, 0x00/*G2*/, 329 0x01, 0x00/*CVBSC0*/, 330 0x01, 0x00/*CVBSC1*/, 331 0x01, 0x00/*CVBSC2*/, 332 0x01, 0x00/*CVBSC3*/, 333 0x01, 0x00/*R0*/, 334 0x01, 0x00/*R1*/, 335 0x01, 0x00/*R2*/, 336 0x01, 0x00/*DVI0*/, 337 0x01, 0x00/*DVI1*/, 338 0x01, 0x00/*DVI2*/, 339 0x01, 0x00/*DVI3*/, 340 0x01, 0x00/*CVBSX0*/, 341 0x01, 0x00/*CVBSX1*/, 342 0x01, 0x00/*CVBSX2*/, 343 0x01, 0x00/*CVBSX3*/, }, 344 { DRV_ADC_REG(REG_ADC_ATOP_03_H), 0xF0, 0x01, 0x00/*RGB0_Sync*/, 345 0x01, 0x00/*RGB0_Data*/, 346 0x01, 0x00/*RGB1_Sync*/, 347 0x01, 0x00/*RGB1_Data*/, 348 0x01, 0x00/*RGB2_Sync*/, 349 0x01, 0x00/*RGB2_Data*/, 350 0x01, 0x00/*CVBSY0*/, 351 0x01, 0x00/*CVBSY1*/, 352 0x01, 0x00/*CVBSY2*/, 353 0x01, 0x00/*CVBSY3*/, 354 0x01, 0x00/*G0*/, 355 0x01, 0x00/*G1*/, 356 0x01, 0x00/*G2*/, 357 0x01, 0x00/*CVBSC0*/, 358 0x01, 0x00/*CVBSC1*/, 359 0x01, 0x00/*CVBSC2*/, 360 0x01, 0x00/*CVBSC3*/, 361 0x01, 0x00/*R0*/, 362 0x01, 0x00/*R1*/, 363 0x01, 0x00/*R2*/, 364 0x01, 0x00/*DVI0*/, 365 0x01, 0x00/*DVI1*/, 366 0x01, 0x00/*DVI2*/, 367 0x01, 0x00/*DVI3*/, 368 0x00, 0x00/*CVBSX0*/, 369 0x00, 0x10/*CVBSX1*/, 370 0x00, 0x20/*CVBSX2*/, 371 0x00, 0x30/*CVBSX3*/, }, 372 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 373 }; 374 375 //**************************************************** 376 // SOURCE 377 //**************************************************** 378 MS_U8 MST_ADCSOURCE_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_SOURCE_NUMS*REG_DATA_SIZE]= 379 { // Reg Mask Ignore Value 380 { DRV_ADC_REG(REG_ADC_ATOP_00_L), 0xF7, 0x00, 0x01/*RGB*/, 381 0x00, 0x01/*YUV*/, 382 0x00, 0x00/*ATV*/, 383 0x00, 0x00/*INT_ATV*/, 384 0x00, 0x10/*SVIDEO*/, 385 0x00, 0x20/*SCART*/, 386 0x00, 0x00/*CVBS*/, 387 0x00, 0x01/*DVI*/, 388 0x01, 0x00/*MVOP*/, 389 0x00, 0x01/*RGB_SC*/, 390 0x00, 0x01/*RGB_AV*/, 391 0x00, 0x01/*RGB_DVI*/, 392 0x00, 0x01/*RGB_MV*/, 393 0x00, 0x01/*YUV_SC*/, 394 0x00, 0x01/*YUV_AV*/, 395 0x00, 0x01/*YUV_DVI*/, 396 0x00, 0x01/*YUV_MV*/, 397 0x00, 0x10/*MVOP_SV*/, 398 0x00, 0x20/*MVOP_SC*/, 399 0x00, 0x00/*MVOP_AV*/, 400 0x00, 0x01/*MVOP_DVI*/, 401 0x00, 0x01/*DVI_CVBS*/, 402 0x00, 0x10/*DVI_SV*/, 403 0x00, 0x21/*DVI_SC*/, }, 404 { DRV_ADC_REG(REG_ADC_ATOP_01_H), 0x4F, 0x00, 0x40/*$RGB*/, 405 0x00, 0x40/*$YUV*/, 406 0x00, 0x04/*$ATV*/, 407 0x00, 0x04/*$INT_ATV*/, 408 0x00, 0x04/*$SVIDEO*/, 409 0x00, 0x44/*$SCART*/, 410 0x00, 0x04/*$CVBS*/, 411 0x01, 0x00/*$DVI*/, 412 0x01, 0x00/*$MVOP*/, 413 0x00, 0x44/*$RGB_SC*/, 414 0x00, 0x44/*$RGB_AV*/, 415 0x00, 0x40/*$RGB_DVI*/, 416 0x00, 0x40/*$RGB_MV*/, 417 0x00, 0x44/*$YUV_SC*/, 418 0x00, 0x44/*$YUV_AV*/, 419 0x00, 0x40/*$YUV_DVI*/, 420 0x00, 0x40/*$YUV_MV*/, 421 0x00, 0x04/*$MVOP_SV*/, 422 0x00, 0x44/*$MVOP_SC*/, 423 0x00, 0x04/*$MVOP_AV*/, 424 0x01, 0x00/*$MVOP_DVI*/, 425 0x00, 0x04/*$DVI_CVBS*/, 426 0x00, 0x04/*$DVI_SV*/, 427 0x00, 0x44/*$DVI_SC*/, }, 428 { DRV_ADC_REG(REG_ADC_ATOP_01_L), 0xF0, 0x00, 0x00/*$RGB*/, 429 0x00, 0x00/*$YUV*/, 430 0x00, 0x00/*$ATV*/, 431 0x00, 0x00/*$INT_ATV*/, 432 0x00, 0x10/*$SVIDEO*/, 433 0x00, 0x00/*$SCART*/, 434 0x00, 0x00/*$CVBS*/, 435 0x00, 0x00/*$DVI*/, 436 0x01, 0x00/*$MVOP*/, 437 0x00, 0x00/*$RGB_SC*/, 438 0x00, 0x00/*$RGB_AV*/, 439 0x00, 0x00/*$RGB_DVI*/, 440 0x00, 0x00/*$RGB_MV*/, 441 0x00, 0x00/*$YUV_SC*/, 442 0x00, 0x00/*$YUV_AV*/, 443 0x00, 0x00/*$YUV_DVI*/, 444 0x00, 0x00/*$YUV_MV*/, 445 0x00, 0x10/*$MVOP_SV*/, 446 0x00, 0x00/*$MVOP_SC*/, 447 0x00, 0x00/*$MVOP_AV*/, 448 0x00, 0x00/*$MVOP_DVI*/, 449 0x00, 0x00/*$DVI_CVBS*/, 450 0x00, 0x10/*$DVI_SV*/, 451 0x00, 0x00/*$DVI_SC*/, }, 452 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/, 453 0x00, 0x00/*$YUV*/, 454 0x00, 0x09/*$ATV*/, 455 0x00, 0x08/*$INT_ATV*/, 456 0x00, 0x0B/*$SVIDEO*/, 457 0x00, 0x09/*$SCART*/, 458 0x00, 0x09/*$CVBS*/, 459 0x00, 0x00/*$DVI*/, 460 0x01, 0x00/*$MVOP*/, 461 0x00, 0x09/*$RGB_SC*/, 462 0x00, 0x09/*$RGB_AV*/, 463 0x00, 0x00/*$RGB_DVI*/, 464 0x00, 0x00/*$RGB_MV*/, 465 0x00, 0x09/*$YUV_SC*/, 466 0x00, 0x09/*$YUV_AV*/, 467 0x00, 0x00/*$YUV_DVI*/, 468 0x00, 0x00/*$YUV_MV*/, 469 0x00, 0x0B/*$MVOP_SV*/, 470 0x00, 0x09/*$MVOP_SC*/, 471 0x00, 0x09/*$MVOP_AV*/, 472 0x01, 0x00/*$MVOP_DVI*/, 473 0x00, 0x09/*$DVI_CVBS*/, 474 0x00, 0x0B/*$DVI_SV*/, 475 0x00, 0x09/*$DVI_SC*/, }, 476 { DRV_ADC_REG(REG_ADC_ATOP_03_L), 0x03, 0x00, 0x00/*$RGB*/, 477 0x00, 0x00/*$YUV*/, 478 0x00, 0x02/*$ATV*/, 479 0x00, 0x02/*$INT_ATV*/, 480 0x00, 0x03/*$SVIDEO*/, 481 0x00, 0x03/*$SCART*/, 482 0x00, 0x02/*$CVBS*/, 483 0x00, 0x00/*$DVI*/, 484 0x00, 0x00/*$MVOP*/, 485 0x00, 0x02/*$RGB_SC*/, 486 0x00, 0x02/*$RGB_AV*/, 487 0x00, 0x00/*$RGB_DVI*/, 488 0x00, 0x00/*$RGB_MV*/, 489 0x00, 0x02/*$YUV_SC*/, 490 0x00, 0x02/*$YUV_AV*/, 491 0x00, 0x00/*$YUV_DVI*/, 492 0x00, 0x00/*$YUV_MV*/, 493 0x00, 0x03/*$MVOP_SV*/, 494 0x00, 0x03/*$MVOP_SC*/, 495 0x00, 0x02/*$MVOP_AV*/, 496 0x00, 0x00/*$MVOP_DVI*/, 497 0x00, 0x02/*$DVI_CVBS*/, 498 0x00, 0x03/*$DVI_SV*/, 499 0x00, 0x03/*$DVI_SC*/, }, 500 { DRV_ADC_REG(REG_ADC_ATOP_32_L), 0xFF, 0x00, 0x30/*RGB*/, 501 0x00, 0x30/*YUV*/, 502 0x00, 0x30/*ATV*/, 503 0x00, 0x30/*INT_ATV*/, 504 0x00, 0x30/*SVIDEO*/, 505 0x00, 0x30/*SCART*/, 506 0x00, 0x30/*CVBS*/, 507 0x00, 0x30/*DVI*/, 508 0x00, 0x30/*MVOP*/, 509 0x00, 0x30/*RGB_SC*/, 510 0x00, 0x30/*RGB_AV*/, 511 0x00, 0x30/*RGB_DVI*/, 512 0x00, 0x30/*RGB_MV*/, 513 0x00, 0x30/*YUV_SC*/, 514 0x00, 0x30/*YUV_AV*/, 515 0x00, 0x30/*YUV_DVI*/, 516 0x00, 0x30/*YUV_MV*/, 517 0x00, 0x30/*MVOP_SV*/, 518 0x00, 0x30/*MVOP_SC*/, 519 0x00, 0x30/*MVOP_AV*/, 520 0x00, 0x30/*MVOP_DVI*/, 521 0x00, 0x30/*DVI_CVBS*/, 522 0x00, 0x30/*DVI_SV*/, 523 0x00, 0x30/*DVI_SC*/, }, 524 { DRV_ADC_REG(REG_ADC_ATOP_38_L), 0x0F, 0x00, 0x00/*$RGB*/, 525 0x00, 0x00/*$YUV*/, 526 0x00, 0x01/*$ATV*/, 527 0x00, 0x01/*$INT_ATV*/, 528 0x00, 0x03/*$SVIDEO*/, 529 0x00, 0x01/*$SCART*/, 530 0x00, 0x01/*$CVBS*/, 531 0x00, 0x00/*$DVI*/, 532 0x01, 0x00/*$MVOP*/, 533 0x00, 0x01/*$RGB_SC*/, 534 0x00, 0x01/*$RGB_AV*/, 535 0x00, 0x00/*$RGB_DVI*/, 536 0x00, 0x00/*$RGB_MV*/, 537 0x00, 0x01/*$YUV_SC*/, 538 0x00, 0x01/*$YUV_AV*/, 539 0x00, 0x00/*$YUV_DVI*/, 540 0x00, 0x00/*$YUV_MV*/, 541 0x00, 0x03/*$MVOP_SV*/, 542 0x00, 0x01/*$MVOP_SC*/, 543 0x00, 0x01/*$MVOP_AV*/, 544 0x00, 0x00/*$MVOP_DVI*/, 545 0x00, 0x01/*$DVI_CVBS*/, 546 0x00, 0x03/*$DVI_SV*/, 547 0x00, 0x01/*$DVI_SC*/, }, 548 { DRV_ADC_REG(REG_ADC_DTOP_07_L), 0x60, 0x00, 0x00/*$RGB*/, 549 0x00, 0x60/*$YUV*/, 550 0x01, 0x00/*$ATV*/, 551 0x01, 0x00/*$INT_ATV*/, 552 0x01, 0x00/*$SVIDEO*/, 553 0x01, 0x00/*$SCART*/, 554 0x01, 0x00/*$CVBS*/, 555 0x01, 0x00/*$DVI*/, 556 0x01, 0x00/*$MVOP*/, 557 0x00, 0x00/*$RGB_SC*/, 558 0x00, 0x00/*$RGB_AV*/, 559 0x00, 0x00/*$RGB_DVI*/, 560 0x00, 0x00/*$RGB_MV*/, 561 0x00, 0x60/*$YUV_SC*/, 562 0x00, 0x60/*$YUV_AV*/, 563 0x00, 0x60/*$YUV_DVI*/, 564 0x00, 0x60/*$YUV_MV*/, 565 0x01, 0x00/*$MVOP_SV*/, 566 0x01, 0x00/*$MVOP_SC*/, 567 0x01, 0x00/*$MVOP_AV*/, 568 0x01, 0x00/*$MVOP_DVI*/, 569 0x01, 0x00/*$DVI_CVBS*/, 570 0x01, 0x00/*$DVI_SV*/, 571 0x01, 0x00/*$DVI_SC*/, }, 572 { DRV_ADC_REG(REG_ADC_DTOP_12_H), 0x01, 0x00, 0x00/*RGB*/, 573 0x00, 0x00/*YUV*/, 574 0x00, 0x00/*ATV*/, 575 0x00, 0x00/*INT_ATV*/, 576 0x00, 0x00/*SVIDEO*/, 577 0x00, 0x01/*SCART*/, 578 0x00, 0x00/*CVBS*/, 579 0x00, 0x00/*DVI*/, 580 0x00, 0x00/*MVOP*/, 581 0x00, 0x00/*RGB_SC*/, 582 0x00, 0x00/*RGB_AV*/, 583 0x00, 0x00/*RGB_DVI*/, 584 0x00, 0x00/*RGB_MV*/, 585 0x00, 0x00/*YUV_SC*/, 586 0x00, 0x00/*YUV_AV*/, 587 0x00, 0x00/*YUV_DVI*/, 588 0x00, 0x00/*YUV_MV*/, 589 0x00, 0x00/*MVOP_SV*/, 590 0x00, 0x01/*MVOP_SC*/, 591 0x00, 0x00/*MVOP_AV*/, 592 0x00, 0x00/*MVOP_DVI*/, 593 0x00, 0x00/*DVI_CVBS*/, 594 0x00, 0x00/*DVI_SV*/, 595 0x00, 0x01/*DVI_SC*/, }, 596 { DRV_ADC_REG(REG_ADC_ATOP_40_L), 0x40, 0x00, 0x40/*RGB*/, 597 0x00, 0x40/*YUV*/, 598 0x00, 0x40/*ATV*/, 599 0x00, 0x40/*INT_ATV*/, 600 0x00, 0x40/*SVIDEO*/, 601 0x00, 0x00/*SCART*/, 602 0x00, 0x40/*CVBS*/, 603 0x00, 0x40/*DVI*/, 604 0x00, 0x40/*MVOP*/, 605 0x00, 0x40/*RGB_SC*/, 606 0x00, 0x40/*RGB_AV*/, 607 0x00, 0x40/*RGB_DVI*/, 608 0x00, 0x40/*RGB_MV*/, 609 0x00, 0x40/*YUV_SC*/, 610 0x00, 0x40/*YUV_AV*/, 611 0x00, 0x40/*YUV_DVI*/, 612 0x00, 0x40/*YUV_MV*/, 613 0x00, 0x40/*MVOP_SV*/, 614 0x00, 0x00/*MVOP_SC*/, 615 0x00, 0x40/*MVOP_AV*/, 616 0x00, 0x40/*MVOP_DVI*/, 617 0x00, 0x40/*DVI_CVBS*/, 618 0x00, 0x40/*DVI_SV*/, 619 0x00, 0x00/*DVI_SC*/, }, 620 { DRV_ADC_REG(REG_ADC_ATOP_61_H), 0x10, 0x00, 0x00/*RGB*/, 621 0x00, 0x00/*YUV*/, 622 0x01, 0x00/*ATV*/, 623 0x01, 0x00/*INT_ATV*/, 624 0x01, 0x00/*SVIDEO*/, 625 0x01, 0x00/*SCART*/, 626 0x01, 0x00/*CVBS*/, 627 0x00, 0x00/*DVI*/, 628 0x01, 0x00/*MVOP*/, 629 0x00, 0x00/*RGB_SC*/, 630 0x00, 0x00/*RGB_AV*/, 631 0x00, 0x00/*RGB_DVI*/, 632 0x00, 0x00/*RGB_MV*/, 633 0x00, 0x00/*YUV_SC*/, 634 0x00, 0x00/*YUV_AV*/, 635 0x00, 0x00/*YUV_DVI*/, 636 0x00, 0x00/*YUV_MV*/, 637 0x01, 0x00/*MVOP_SV*/, 638 0x01, 0x00/*MVOP_SC*/, 639 0x01, 0x00/*MVOP_AV*/, 640 0x00, 0x00/*MVOP_DVI*/, 641 0x01, 0x00/*DVI_CVBS*/, 642 0x01, 0x00/*DVI_SV*/, 643 0x01, 0x00/*DVI_SC*/, }, 644 { DRV_ADC_REG(REG_ADC_ATOP_67_H), 0x03, 0x00, 0x00/*RGB*/, 645 0x00, 0x00/*YUV*/, 646 0x00, 0x00/*ATV*/, 647 0x00, 0x00/*INT_ATV*/, 648 0x00, 0x00/*SVIDEO*/, 649 0x00, 0x00/*SCART*/, 650 0x00, 0x00/*CVBS*/, 651 0x00, 0x00/*DVI*/, 652 0x00, 0x00/*MVOP*/, 653 0x00, 0x00/*RGB_SC*/, 654 0x00, 0x00/*RGB_AV*/, 655 0x00, 0x00/*RGB_DVI*/, 656 0x00, 0x00/*RGB_MV*/, 657 0x00, 0x00/*YUV_SC*/, 658 0x00, 0x00/*YUV_AV*/, 659 0x00, 0x00/*YUV_DVI*/, 660 0x00, 0x00/*YUV_MV*/, 661 0x00, 0x00/*MVOP_SV*/, 662 0x00, 0x00/*MVOP_SC*/, 663 0x00, 0x00/*MVOP_AV*/, 664 0x00, 0x00/*MVOP_DVI*/, 665 0x00, 0x00/*DVI_CVBS*/, 666 0x00, 0x00/*DVI_SV*/, 667 0x00, 0x00/*DVI_SC*/, }, 668 { DRV_ADC_REG(REG_ADC_DTOP_21_H), 0x0F, 0x00, 0x01/*RGB*/, 669 0x00, 0x08/*YUV*/, 670 0x01, 0x00/*ATV*/, 671 0x01, 0x00/*INT_ATV*/, 672 0x01, 0x00/*SVIDEO*/, 673 0x00, 0x01/*SCART*/, 674 0x01, 0x00/*CVBS*/, 675 0x00, 0x01/*DVI*/, 676 0x01, 0x00/*MVOP*/, 677 0x00, 0x01/*RGB_SC*/, 678 0x00, 0x01/*RGB_AV*/, 679 0x00, 0x01/*RGB_DVI*/, 680 0x00, 0x01/*RGB_MV*/, 681 0x00, 0x08/*YUV_SC*/, 682 0x00, 0x08/*YUV_AV*/, 683 0x00, 0x08/*YUV_DVI*/, 684 0x00, 0x08/*YUV_MV*/, 685 0x01, 0x00/*MVOP_SV*/, 686 0x00, 0x01/*MVOP_SC*/, 687 0x01, 0x00/*MVOP_AV*/, 688 0x00, 0x01/*MVOP_DVI*/, 689 0x00, 0x01/*DVI_CVBS*/, 690 0x01, 0x00/*DVI_SV*/, 691 0x00, 0x01/*DVI_SC*/, }, 692 { DRV_ADC_REG(REG_ADC_DTOP_21_L), 0xFF, 0x00, 0x00/*RGB*/, 693 0x00, 0x00/*YUV*/, 694 0x01, 0x00/*ATV*/, 695 0x01, 0x00/*INT_ATV*/, 696 0x01, 0x00/*SVIDEO*/, 697 0x00, 0x00/*SCART*/, 698 0x01, 0x00/*CVBS*/, 699 0x00, 0x00/*DVI*/, 700 0x01, 0x00/*MVOP*/, 701 0x00, 0x00/*RGB_SC*/, 702 0x00, 0x00/*RGB_AV*/, 703 0x00, 0x00/*RGB_DVI*/, 704 0x00, 0x00/*RGB_MV*/, 705 0x00, 0x00/*YUV_SC*/, 706 0x00, 0x00/*YUV_AV*/, 707 0x00, 0x00/*YUV_DVI*/, 708 0x00, 0x00/*YUV_MV*/, 709 0x01, 0x00/*MVOP_SV*/, 710 0x00, 0x00/*MVOP_SC*/, 711 0x01, 0x00/*MVOP_AV*/, 712 0x00, 0x00/*MVOP_DVI*/, 713 0x00, 0x00/*DVI_CVBS*/, 714 0x01, 0x00/*DVI_SV*/, 715 0x00, 0x00/*DVI_SC*/, }, 716 { DRV_ADC_REG(REG_ADC_DTOP_2B_H), 0x0F, 0x00, 0x01/*RGB*/, 717 0x00, 0x01/*YUV*/, 718 0x01, 0x00/*ATV*/, 719 0x01, 0x00/*INT_ATV*/, 720 0x01, 0x00/*SVIDEO*/, 721 0x00, 0x01/*SCART*/, 722 0x01, 0x00/*CVBS*/, 723 0x00, 0x01/*DVI*/, 724 0x01, 0x00/*MVOP*/, 725 0x00, 0x01/*RGB_SC*/, 726 0x00, 0x01/*RGB_AV*/, 727 0x00, 0x01/*RGB_DVI*/, 728 0x00, 0x01/*RGB_MV*/, 729 0x00, 0x01/*YUV_SC*/, 730 0x00, 0x01/*YUV_AV*/, 731 0x00, 0x01/*YUV_DVI*/, 732 0x00, 0x01/*YUV_MV*/, 733 0x01, 0x00/*MVOP_SV*/, 734 0x00, 0x01/*MVOP_SC*/, 735 0x01, 0x00/*MVOP_AV*/, 736 0x00, 0x01/*MVOP_DVI*/, 737 0x00, 0x01/*DVI_CVBS*/, 738 0x01, 0x00/*DVI_SV*/, 739 0x00, 0x01/*DVI_SC*/, }, 740 { DRV_ADC_REG(REG_ADC_DTOP_2B_L), 0xFF, 0x00, 0x00/*RGB*/, 741 0x00, 0x00/*YUV*/, 742 0x01, 0x00/*ATV*/, 743 0x01, 0x00/*INT_ATV*/, 744 0x01, 0x00/*SVIDEO*/, 745 0x00, 0x00/*SCART*/, 746 0x01, 0x00/*CVBS*/, 747 0x00, 0x00/*DVI*/, 748 0x01, 0x00/*MVOP*/, 749 0x00, 0x00/*RGB_SC*/, 750 0x00, 0x00/*RGB_AV*/, 751 0x00, 0x00/*RGB_DVI*/, 752 0x00, 0x00/*RGB_MV*/, 753 0x00, 0x00/*YUV_SC*/, 754 0x00, 0x00/*YUV_AV*/, 755 0x00, 0x00/*YUV_DVI*/, 756 0x00, 0x00/*YUV_MV*/, 757 0x01, 0x00/*MVOP_SV*/, 758 0x00, 0x00/*MVOP_SC*/, 759 0x01, 0x00/*MVOP_AV*/, 760 0x00, 0x00/*MVOP_DVI*/, 761 0x00, 0x00/*DVI_CVBS*/, 762 0x01, 0x00/*DVI_SV*/, 763 0x00, 0x00/*DVI_SC*/, }, 764 { DRV_ADC_REG(REG_ADC_DTOP_35_H), 0x0F, 0x00, 0x01/*RGB*/, 765 0x00, 0x08/*YUV*/, 766 0x01, 0x00/*ATV*/, 767 0x01, 0x00/*INT_ATV*/, 768 0x01, 0x00/*SVIDEO*/, 769 0x00, 0x01/*SCART*/, 770 0x01, 0x00/*CVBS*/, 771 0x00, 0x01/*DVI*/, 772 0x01, 0x00/*MVOP*/, 773 0x00, 0x01/*RGB_SC*/, 774 0x00, 0x01/*RGB_AV*/, 775 0x00, 0x01/*RGB_DVI*/, 776 0x00, 0x01/*RGB_MV*/, 777 0x00, 0x08/*YUV_SC*/, 778 0x00, 0x08/*YUV_AV*/, 779 0x00, 0x08/*YUV_DVI*/, 780 0x00, 0x08/*YUV_MV*/, 781 0x01, 0x00/*MVOP_SV*/, 782 0x00, 0x01/*MVOP_SC*/, 783 0x01, 0x00/*MVOP_AV*/, 784 0x00, 0x01/*MVOP_DVI*/, 785 0x00, 0x01/*DVI_CVBS*/, 786 0x01, 0x00/*DVI_SV*/, 787 0x00, 0x01/*DVI_SC*/, }, 788 { DRV_ADC_REG(REG_ADC_DTOP_35_L), 0xFF, 0x00, 0x00/*RGB*/, 789 0x00, 0x00/*YUV*/, 790 0x01, 0x00/*ATV*/, 791 0x01, 0x00/*INT_ATV*/, 792 0x01, 0x00/*SVIDEO*/, 793 0x00, 0x00/*SCART*/, 794 0x01, 0x00/*CVBS*/, 795 0x00, 0x00/*DVI*/, 796 0x01, 0x00/*MVOP*/, 797 0x00, 0x00/*RGB_SC*/, 798 0x00, 0x00/*RGB_AV*/, 799 0x00, 0x00/*RGB_DVI*/, 800 0x00, 0x00/*RGB_MV*/, 801 0x00, 0x00/*YUV_SC*/, 802 0x00, 0x00/*YUV_AV*/, 803 0x00, 0x00/*YUV_DVI*/, 804 0x00, 0x00/*YUV_MV*/, 805 0x01, 0x00/*MVOP_SV*/, 806 0x00, 0x00/*MVOP_SC*/, 807 0x01, 0x00/*MVOP_AV*/, 808 0x00, 0x00/*MVOP_DVI*/, 809 0x00, 0x00/*DVI_CVBS*/, 810 0x01, 0x00/*DVI_SV*/, 811 0x00, 0x00/*DVI_SC*/, }, 812 { DRV_ADC_REG(REG_ADC_DTOP_50_H), 0x0F, 0x00, 0x01/*RGB*/, 813 0x00, 0x08/*YUV*/, 814 0x01, 0x00/*ATV*/, 815 0x01, 0x00/*INT_ATV*/, 816 0x00, 0x08/*SVIDEO*/, 817 0x00, 0x01/*SCART*/, 818 0x01, 0x00/*CVBS*/, 819 0x00, 0x01/*DVI*/, 820 0x01, 0x00/*MVOP*/, 821 0x00, 0x01/*RGB_SC*/, 822 0x00, 0x01/*RGB_AV*/, 823 0x00, 0x01/*RGB_DVI*/, 824 0x00, 0x01/*RGB_MV*/, 825 0x00, 0x08/*YUV_SC*/, 826 0x00, 0x08/*YUV_AV*/, 827 0x00, 0x08/*YUV_DVI*/, 828 0x00, 0x08/*YUV_MV*/, 829 0x00, 0x08/*MVOP_SV*/, 830 0x00, 0x01/*MVOP_SC*/, 831 0x01, 0x00/*MVOP_AV*/, 832 0x00, 0x01/*MVOP_DVI*/, 833 0x00, 0x01/*DVI_CVBS*/, 834 0x00, 0x08/*DVI_SV*/, 835 0x00, 0x01/*DVI_SC*/, }, 836 { DRV_ADC_REG(REG_ADC_DTOP_50_L), 0xFF, 0x00, 0x00/*RGB*/, 837 0x00, 0x00/*YUV*/, 838 0x01, 0x00/*ATV*/, 839 0x01, 0x00/*INT_ATV*/, 840 0x00, 0x00/*SVIDEO*/, 841 0x00, 0x00/*SCART*/, 842 0x01, 0x00/*CVBS*/, 843 0x00, 0x00/*DVI*/, 844 0x01, 0x00/*MVOP*/, 845 0x00, 0x00/*RGB_SC*/, 846 0x00, 0x00/*RGB_AV*/, 847 0x00, 0x00/*RGB_DVI*/, 848 0x00, 0x00/*RGB_MV*/, 849 0x00, 0x00/*YUV_SC*/, 850 0x00, 0x00/*YUV_AV*/, 851 0x00, 0x00/*YUV_DVI*/, 852 0x00, 0x00/*YUV_MV*/, 853 0x00, 0x00/*MVOP_SV*/, 854 0x00, 0x00/*MVOP_SC*/, 855 0x01, 0x00/*MVOP_AV*/, 856 0x00, 0x00/*MVOP_DVI*/, 857 0x00, 0x00/*DVI_CVBS*/, 858 0x00, 0x00/*DVI_SV*/, 859 0x00, 0x00/*DVI_SC*/, }, 860 { DRV_ADC_REG(REG_ADC_DTOP_51_H), 0x3F, 0x01, 0x00/*RGB*/, 861 0x01, 0x00/*YUV*/, 862 0x01, 0x00/*ATV*/, 863 0x01, 0x00/*INT_ATV*/, 864 0x01, 0x00/*SVIDEO*/, 865 0x01, 0x00/*SCART*/, 866 0x01, 0x00/*CVBS*/, 867 0x01, 0x00/*DVI*/, 868 0x01, 0x00/*MVOP*/, 869 0x01, 0x00/*RGB_SC*/, 870 0x01, 0x00/*RGB_AV*/, 871 0x01, 0x00/*RGB_DVI*/, 872 0x01, 0x00/*RGB_MV*/, 873 0x01, 0x00/*YUV_SC*/, 874 0x01, 0x00/*YUV_AV*/, 875 0x01, 0x00/*YUV_DVI*/, 876 0x01, 0x00/*YUV_MV*/, 877 0x01, 0x00/*MVOP_SV*/, 878 0x01, 0x00/*MVOP_SC*/, 879 0x01, 0x00/*MVOP_AV*/, 880 0x01, 0x00/*MVOP_DVI*/, 881 0x01, 0x00/*DVI_CVBS*/, 882 0x01, 0x00/*DVI_SV*/, 883 0x01, 0x00/*DVI_SC*/, }, 884 { DRV_ADC_REG(REG_ADC_DTOP_51_L), 0xFF, 0x01, 0x00/*RGB*/, 885 0x01, 0x00/*YUV*/, 886 0x01, 0x00/*ATV*/, 887 0x01, 0x00/*INT_ATV*/, 888 0x01, 0x00/*SVIDEO*/, 889 0x01, 0x00/*SCART*/, 890 0x01, 0x00/*CVBS*/, 891 0x01, 0x00/*DVI*/, 892 0x01, 0x00/*MVOP*/, 893 0x01, 0x00/*RGB_SC*/, 894 0x01, 0x00/*RGB_AV*/, 895 0x01, 0x00/*RGB_DVI*/, 896 0x01, 0x00/*RGB_MV*/, 897 0x01, 0x00/*YUV_SC*/, 898 0x01, 0x00/*YUV_AV*/, 899 0x01, 0x00/*YUV_DVI*/, 900 0x01, 0x00/*YUV_MV*/, 901 0x01, 0x00/*MVOP_SV*/, 902 0x01, 0x00/*MVOP_SC*/, 903 0x01, 0x00/*MVOP_AV*/, 904 0x01, 0x00/*MVOP_DVI*/, 905 0x01, 0x00/*DVI_CVBS*/, 906 0x01, 0x00/*DVI_SV*/, 907 0x01, 0x00/*DVI_SC*/, }, 908 { DRV_ADC_REG(REG_ADC_DTOP_52_H), 0x7F, 0x00, 0x00/*$RGB*/, 909 0x00, 0x08/*$YUV*/, 910 0x01, 0x00/*$ATV*/, 911 0x01, 0x00/*$INT_ATV*/, 912 0x00, 0x08/*$SVIDEO*/, 913 0x00, 0x00/*$SCART*/, 914 0x01, 0x00/*$CVBS*/, 915 0x00, 0x00/*$DVI*/, 916 0x01, 0x00/*$MVOP*/, 917 0x00, 0x00/*$RGB_SC*/, 918 0x00, 0x00/*$RGB_AV*/, 919 0x00, 0x00/*$RGB_DVI*/, 920 0x00, 0x00/*$RGB_MV*/, 921 0x00, 0x08/*$YUV_SC*/, 922 0x00, 0x08/*$YUV_AV*/, 923 0x00, 0x08/*$YUV_DVI*/, 924 0x00, 0x08/*$YUV_MV*/, 925 0x00, 0x08/*$MVOP_SV*/, 926 0x00, 0x00/*$MVOP_SC*/, 927 0x01, 0x00/*$MVOP_AV*/, 928 0x00, 0x00/*$MVOP_DVI*/, 929 0x00, 0x00/*$DVI_CVBS*/, 930 0x00, 0x08/*$DVI_SV*/, 931 0x00, 0x00/*$DVI_SC*/, }, 932 { DRV_ADC_REG(REG_ADC_DTOP_52_L), 0xFF, 0x00, 0x00/*RGB*/, 933 0x00, 0x00/*YUV*/, 934 0x01, 0x00/*ATV*/, 935 0x01, 0x00/*INT_ATV*/, 936 0x00, 0x00/*SVIDEO*/, 937 0x00, 0x00/*SCART*/, 938 0x01, 0x00/*CVBS*/, 939 0x00, 0x00/*DVI*/, 940 0x01, 0x00/*MVOP*/, 941 0x00, 0x00/*RGB_SC*/, 942 0x00, 0x00/*RGB_AV*/, 943 0x00, 0x00/*RGB_DVI*/, 944 0x00, 0x00/*RGB_MV*/, 945 0x00, 0x00/*YUV_SC*/, 946 0x00, 0x00/*YUV_AV*/, 947 0x00, 0x00/*YUV_DVI*/, 948 0x00, 0x00/*YUV_MV*/, 949 0x00, 0x00/*MVOP_SV*/, 950 0x00, 0x00/*MVOP_SC*/, 951 0x01, 0x00/*MVOP_AV*/, 952 0x00, 0x00/*MVOP_DVI*/, 953 0x00, 0x00/*DVI_CVBS*/, 954 0x00, 0x00/*DVI_SV*/, 955 0x00, 0x00/*DVI_SC*/, }, 956 { DRV_ADC_REG(REG_ADC_DTOP_55_H), 0x0F, 0x00, 0x01/*RGB*/, 957 0x00, 0x01/*YUV*/, 958 0x01, 0x00/*ATV*/, 959 0x01, 0x00/*INT_ATV*/, 960 0x01, 0x00/*SVIDEO*/, 961 0x00, 0x01/*SCART*/, 962 0x01, 0x00/*CVBS*/, 963 0x00, 0x01/*DVI*/, 964 0x01, 0x00/*MVOP*/, 965 0x00, 0x01/*RGB_SC*/, 966 0x00, 0x01/*RGB_AV*/, 967 0x00, 0x01/*RGB_DVI*/, 968 0x00, 0x01/*RGB_MV*/, 969 0x00, 0x01/*YUV_SC*/, 970 0x00, 0x01/*YUV_AV*/, 971 0x00, 0x01/*YUV_DVI*/, 972 0x00, 0x01/*YUV_MV*/, 973 0x01, 0x00/*MVOP_SV*/, 974 0x00, 0x01/*MVOP_SC*/, 975 0x01, 0x00/*MVOP_AV*/, 976 0x00, 0x01/*MVOP_DVI*/, 977 0x00, 0x01/*DVI_CVBS*/, 978 0x01, 0x00/*DVI_SV*/, 979 0x00, 0x01/*DVI_SC*/, }, 980 { DRV_ADC_REG(REG_ADC_DTOP_55_L), 0xFF, 0x00, 0x00/*RGB*/, 981 0x00, 0x00/*YUV*/, 982 0x01, 0x00/*ATV*/, 983 0x01, 0x00/*INT_ATV*/, 984 0x01, 0x00/*SVIDEO*/, 985 0x00, 0x00/*SCART*/, 986 0x01, 0x00/*CVBS*/, 987 0x00, 0x00/*DVI*/, 988 0x01, 0x00/*MVOP*/, 989 0x00, 0x00/*RGB_SC*/, 990 0x00, 0x00/*RGB_AV*/, 991 0x00, 0x00/*RGB_DVI*/, 992 0x00, 0x00/*RGB_MV*/, 993 0x00, 0x00/*YUV_SC*/, 994 0x00, 0x00/*YUV_AV*/, 995 0x00, 0x00/*YUV_DVI*/, 996 0x00, 0x00/*YUV_MV*/, 997 0x01, 0x00/*MVOP_SV*/, 998 0x00, 0x00/*MVOP_SC*/, 999 0x01, 0x00/*MVOP_AV*/, 1000 0x00, 0x00/*MVOP_DVI*/, 1001 0x00, 0x00/*DVI_CVBS*/, 1002 0x01, 0x00/*DVI_SV*/, 1003 0x00, 0x00/*DVI_SC*/, }, 1004 { DRV_ADC_REG(REG_ADC_DTOP_56_H), 0x3F, 0x01, 0x00/*RGB*/, 1005 0x01, 0x00/*YUV*/, 1006 0x01, 0x00/*ATV*/, 1007 0x01, 0x00/*INT_ATV*/, 1008 0x01, 0x00/*SVIDEO*/, 1009 0x01, 0x00/*SCART*/, 1010 0x01, 0x00/*CVBS*/, 1011 0x01, 0x00/*DVI*/, 1012 0x01, 0x00/*MVOP*/, 1013 0x01, 0x00/*RGB_SC*/, 1014 0x01, 0x00/*RGB_AV*/, 1015 0x01, 0x00/*RGB_DVI*/, 1016 0x01, 0x00/*RGB_MV*/, 1017 0x01, 0x00/*YUV_SC*/, 1018 0x01, 0x00/*YUV_AV*/, 1019 0x01, 0x00/*YUV_DVI*/, 1020 0x01, 0x00/*YUV_MV*/, 1021 0x01, 0x00/*MVOP_SV*/, 1022 0x01, 0x00/*MVOP_SC*/, 1023 0x01, 0x00/*MVOP_AV*/, 1024 0x01, 0x00/*MVOP_DVI*/, 1025 0x01, 0x00/*DVI_CVBS*/, 1026 0x01, 0x00/*DVI_SV*/, 1027 0x01, 0x00/*DVI_SC*/, }, 1028 { DRV_ADC_REG(REG_ADC_DTOP_56_L), 0xFF, 0x01, 0x00/*RGB*/, 1029 0x01, 0x00/*YUV*/, 1030 0x01, 0x00/*ATV*/, 1031 0x01, 0x00/*INT_ATV*/, 1032 0x01, 0x00/*SVIDEO*/, 1033 0x01, 0x00/*SCART*/, 1034 0x01, 0x00/*CVBS*/, 1035 0x01, 0x00/*DVI*/, 1036 0x01, 0x00/*MVOP*/, 1037 0x01, 0x00/*RGB_SC*/, 1038 0x01, 0x00/*RGB_AV*/, 1039 0x01, 0x00/*RGB_DVI*/, 1040 0x01, 0x00/*RGB_MV*/, 1041 0x01, 0x00/*YUV_SC*/, 1042 0x01, 0x00/*YUV_AV*/, 1043 0x01, 0x00/*YUV_DVI*/, 1044 0x01, 0x00/*YUV_MV*/, 1045 0x01, 0x00/*MVOP_SV*/, 1046 0x01, 0x00/*MVOP_SC*/, 1047 0x01, 0x00/*MVOP_AV*/, 1048 0x01, 0x00/*MVOP_DVI*/, 1049 0x01, 0x00/*DVI_CVBS*/, 1050 0x01, 0x00/*DVI_SV*/, 1051 0x01, 0x00/*DVI_SC*/, }, 1052 { DRV_ADC_REG(REG_ADC_DTOP_57_H), 0x7F, 0x00, 0x00/*$RGB*/, 1053 0x00, 0x01/*$YUV*/, 1054 0x01, 0x00/*$ATV*/, 1055 0x01, 0x00/*$INT_ATV*/, 1056 0x01, 0x00/*$SVIDEO*/, 1057 0x00, 0x00/*$SCART*/, 1058 0x01, 0x00/*$CVBS*/, 1059 0x00, 0x00/*$DVI*/, 1060 0x01, 0x00/*$MVOP*/, 1061 0x00, 0x00/*$RGB_SC*/, 1062 0x00, 0x00/*$RGB_AV*/, 1063 0x00, 0x00/*$RGB_DVI*/, 1064 0x00, 0x00/*$RGB_MV*/, 1065 0x00, 0x01/*$YUV_SC*/, 1066 0x00, 0x01/*$YUV_AV*/, 1067 0x00, 0x01/*$YUV_DVI*/, 1068 0x00, 0x01/*$YUV_MV*/, 1069 0x01, 0x00/*$MVOP_SV*/, 1070 0x00, 0x00/*$MVOP_SC*/, 1071 0x01, 0x00/*$MVOP_AV*/, 1072 0x00, 0x00/*$MVOP_DVI*/, 1073 0x00, 0x00/*$DVI_CVBS*/, 1074 0x01, 0x00/*$DVI_SV*/, 1075 0x00, 0x00/*$DVI_SC*/, }, 1076 { DRV_ADC_REG(REG_ADC_DTOP_57_L), 0xFF, 0x00, 0x00/*RGB*/, 1077 0x00, 0x00/*YUV*/, 1078 0x01, 0x00/*ATV*/, 1079 0x01, 0x00/*INT_ATV*/, 1080 0x01, 0x00/*SVIDEO*/, 1081 0x00, 0x00/*SCART*/, 1082 0x01, 0x00/*CVBS*/, 1083 0x00, 0x00/*DVI*/, 1084 0x01, 0x00/*MVOP*/, 1085 0x00, 0x00/*RGB_SC*/, 1086 0x00, 0x00/*RGB_AV*/, 1087 0x00, 0x00/*RGB_DVI*/, 1088 0x00, 0x00/*RGB_MV*/, 1089 0x00, 0x00/*YUV_SC*/, 1090 0x00, 0x00/*YUV_AV*/, 1091 0x00, 0x00/*YUV_DVI*/, 1092 0x00, 0x00/*YUV_MV*/, 1093 0x01, 0x00/*MVOP_SV*/, 1094 0x00, 0x00/*MVOP_SC*/, 1095 0x01, 0x00/*MVOP_AV*/, 1096 0x00, 0x00/*MVOP_DVI*/, 1097 0x00, 0x00/*DVI_CVBS*/, 1098 0x01, 0x00/*DVI_SV*/, 1099 0x00, 0x00/*DVI_SC*/, }, 1100 { DRV_ADC_REG(REG_ADC_DTOP_5A_H), 0x0F, 0x00, 0x01/*RGB*/, 1101 0x00, 0x08/*YUV*/, 1102 0x01, 0x00/*ATV*/, 1103 0x01, 0x00/*INT_ATV*/, 1104 0x01, 0x00/*SVIDEO*/, 1105 0x00, 0x01/*SCART*/, 1106 0x01, 0x00/*CVBS*/, 1107 0x00, 0x01/*DVI*/, 1108 0x01, 0x00/*MVOP*/, 1109 0x00, 0x01/*RGB_SC*/, 1110 0x00, 0x01/*RGB_AV*/, 1111 0x00, 0x01/*RGB_DVI*/, 1112 0x00, 0x01/*RGB_MV*/, 1113 0x00, 0x08/*YUV_SC*/, 1114 0x00, 0x08/*YUV_AV*/, 1115 0x00, 0x08/*YUV_DVI*/, 1116 0x00, 0x08/*YUV_MV*/, 1117 0x01, 0x00/*MVOP_SV*/, 1118 0x00, 0x01/*MVOP_SC*/, 1119 0x01, 0x00/*MVOP_AV*/, 1120 0x00, 0x01/*MVOP_DVI*/, 1121 0x00, 0x01/*DVI_CVBS*/, 1122 0x01, 0x00/*DVI_SV*/, 1123 0x00, 0x01/*DVI_SC*/, }, 1124 { DRV_ADC_REG(REG_ADC_DTOP_5A_L), 0xFF, 0x00, 0x00/*RGB*/, 1125 0x00, 0x00/*YUV*/, 1126 0x01, 0x00/*ATV*/, 1127 0x01, 0x00/*INT_ATV*/, 1128 0x01, 0x00/*SVIDEO*/, 1129 0x00, 0x00/*SCART*/, 1130 0x01, 0x00/*CVBS*/, 1131 0x00, 0x00/*DVI*/, 1132 0x01, 0x00/*MVOP*/, 1133 0x00, 0x00/*RGB_SC*/, 1134 0x00, 0x00/*RGB_AV*/, 1135 0x00, 0x00/*RGB_DVI*/, 1136 0x00, 0x00/*RGB_MV*/, 1137 0x00, 0x00/*YUV_SC*/, 1138 0x00, 0x00/*YUV_AV*/, 1139 0x00, 0x00/*YUV_DVI*/, 1140 0x00, 0x00/*YUV_MV*/, 1141 0x01, 0x00/*MVOP_SV*/, 1142 0x00, 0x00/*MVOP_SC*/, 1143 0x01, 0x00/*MVOP_AV*/, 1144 0x00, 0x00/*MVOP_DVI*/, 1145 0x00, 0x00/*DVI_CVBS*/, 1146 0x01, 0x00/*DVI_SV*/, 1147 0x00, 0x00/*DVI_SC*/, }, 1148 { DRV_ADC_REG(REG_ADC_DTOP_5B_H), 0x3F, 0x01, 0x00/*RGB*/, 1149 0x01, 0x00/*YUV*/, 1150 0x01, 0x00/*ATV*/, 1151 0x01, 0x00/*INT_ATV*/, 1152 0x01, 0x00/*SVIDEO*/, 1153 0x01, 0x00/*SCART*/, 1154 0x01, 0x00/*CVBS*/, 1155 0x01, 0x00/*DVI*/, 1156 0x01, 0x00/*MVOP*/, 1157 0x01, 0x00/*RGB_SC*/, 1158 0x01, 0x00/*RGB_AV*/, 1159 0x01, 0x00/*RGB_DVI*/, 1160 0x01, 0x00/*RGB_MV*/, 1161 0x01, 0x00/*YUV_SC*/, 1162 0x01, 0x00/*YUV_AV*/, 1163 0x01, 0x00/*YUV_DVI*/, 1164 0x01, 0x00/*YUV_MV*/, 1165 0x01, 0x00/*MVOP_SV*/, 1166 0x01, 0x00/*MVOP_SC*/, 1167 0x01, 0x00/*MVOP_AV*/, 1168 0x01, 0x00/*MVOP_DVI*/, 1169 0x01, 0x00/*DVI_CVBS*/, 1170 0x01, 0x00/*DVI_SV*/, 1171 0x01, 0x00/*DVI_SC*/, }, 1172 { DRV_ADC_REG(REG_ADC_DTOP_5B_L), 0xFF, 0x01, 0x00/*RGB*/, 1173 0x01, 0x00/*YUV*/, 1174 0x01, 0x00/*ATV*/, 1175 0x01, 0x00/*INT_ATV*/, 1176 0x01, 0x00/*SVIDEO*/, 1177 0x01, 0x00/*SCART*/, 1178 0x01, 0x00/*CVBS*/, 1179 0x01, 0x00/*DVI*/, 1180 0x01, 0x00/*MVOP*/, 1181 0x01, 0x00/*RGB_SC*/, 1182 0x01, 0x00/*RGB_AV*/, 1183 0x01, 0x00/*RGB_DVI*/, 1184 0x01, 0x00/*RGB_MV*/, 1185 0x01, 0x00/*YUV_SC*/, 1186 0x01, 0x00/*YUV_AV*/, 1187 0x01, 0x00/*YUV_DVI*/, 1188 0x01, 0x00/*YUV_MV*/, 1189 0x01, 0x00/*MVOP_SV*/, 1190 0x01, 0x00/*MVOP_SC*/, 1191 0x01, 0x00/*MVOP_AV*/, 1192 0x01, 0x00/*MVOP_DVI*/, 1193 0x01, 0x00/*DVI_CVBS*/, 1194 0x01, 0x00/*DVI_SV*/, 1195 0x01, 0x00/*DVI_SC*/, }, 1196 { DRV_ADC_REG(REG_ADC_DTOP_5C_H), 0x7F, 0x00, 0x00/*$RGB*/, 1197 0x00, 0x08/*$YUV*/, 1198 0x01, 0x00/*$ATV*/, 1199 0x01, 0x00/*$INT_ATV*/, 1200 0x01, 0x00/*$SVIDEO*/, 1201 0x00, 0x00/*$SCART*/, 1202 0x01, 0x00/*$CVBS*/, 1203 0x00, 0x00/*$DVI*/, 1204 0x01, 0x00/*$MVOP*/, 1205 0x00, 0x00/*$RGB_SC*/, 1206 0x00, 0x00/*$RGB_AV*/, 1207 0x00, 0x00/*$RGB_DVI*/, 1208 0x00, 0x00/*$RGB_MV*/, 1209 0x00, 0x08/*$YUV_SC*/, 1210 0x00, 0x08/*$YUV_AV*/, 1211 0x00, 0x08/*$YUV_DVI*/, 1212 0x00, 0x08/*$YUV_MV*/, 1213 0x01, 0x00/*$MVOP_SV*/, 1214 0x00, 0x00/*$MVOP_SC*/, 1215 0x01, 0x00/*$MVOP_AV*/, 1216 0x00, 0x00/*$MVOP_DVI*/, 1217 0x00, 0x00/*$DVI_CVBS*/, 1218 0x01, 0x00/*$DVI_SV*/, 1219 0x00, 0x00/*$DVI_SC*/, }, 1220 { DRV_ADC_REG(REG_ADC_DTOP_5C_L), 0xFF, 0x00, 0x00/*RGB*/, 1221 0x00, 0x00/*YUV*/, 1222 0x01, 0x00/*ATV*/, 1223 0x01, 0x00/*INT_ATV*/, 1224 0x01, 0x00/*SVIDEO*/, 1225 0x00, 0x00/*SCART*/, 1226 0x01, 0x00/*CVBS*/, 1227 0x00, 0x00/*DVI*/, 1228 0x01, 0x00/*MVOP*/, 1229 0x00, 0x00/*RGB_SC*/, 1230 0x00, 0x00/*RGB_AV*/, 1231 0x00, 0x00/*RGB_DVI*/, 1232 0x00, 0x00/*RGB_MV*/, 1233 0x00, 0x00/*YUV_SC*/, 1234 0x00, 0x00/*YUV_AV*/, 1235 0x00, 0x00/*YUV_DVI*/, 1236 0x00, 0x00/*YUV_MV*/, 1237 0x01, 0x00/*MVOP_SV*/, 1238 0x00, 0x00/*MVOP_SC*/, 1239 0x01, 0x00/*MVOP_AV*/, 1240 0x00, 0x00/*MVOP_DVI*/, 1241 0x00, 0x00/*DVI_CVBS*/, 1242 0x01, 0x00/*DVI_SV*/, 1243 0x00, 0x00/*DVI_SC*/, }, 1244 { DRV_ADC_REG(REG_ADC_DTOP_60_H), 0x0F, 0x00, 0x00/*RGB*/, 1245 0x00, 0x00/*YUV*/, 1246 0x00, 0x03/*ATV*/, 1247 0x00, 0x03/*INT_ATV*/, 1248 0x00, 0x03/*SVIDEO*/, 1249 0x00, 0x03/*SCART*/, 1250 0x00, 0x03/*CVBS*/, 1251 0x00, 0x00/*DVI*/, 1252 0x00, 0x00/*MVOP*/, 1253 0x00, 0x03/*RGB_SC*/, 1254 0x00, 0x03/*RGB_AV*/, 1255 0x00, 0x00/*RGB_DVI*/, 1256 0x00, 0x00/*RGB_MV*/, 1257 0x00, 0x03/*YUV_SC*/, 1258 0x00, 0x03/*YUV_AV*/, 1259 0x00, 0x00/*YUV_DVI*/, 1260 0x00, 0x00/*YUV_MV*/, 1261 0x00, 0x03/*MVOP_SV*/, 1262 0x00, 0x03/*MVOP_SC*/, 1263 0x00, 0x03/*MVOP_AV*/, 1264 0x00, 0x00/*MVOP_DVI*/, 1265 0x00, 0x03/*DVI_CVBS*/, 1266 0x00, 0x03/*DVI_SV*/, 1267 0x00, 0x03/*DVI_SC*/, }, 1268 { DRV_ADC_REG(REG_ADC_DTOP_60_L), 0xFF, 0x00, 0x00/*RGB*/, 1269 0x00, 0x80/*YUV*/, 1270 0x00, 0xC0/*ATV*/, 1271 0x00, 0xC0/*INT_ATV*/, 1272 0x00, 0xC0/*SVIDEO*/, 1273 0x00, 0xC0/*SCART*/, 1274 0x00, 0xC0/*CVBS*/, 1275 0x00, 0x00/*DVI*/, 1276 0x00, 0x00/*MVOP*/, 1277 0x00, 0xC0/*RGB_SC*/, 1278 0x00, 0xC0/*RGB_AV*/, 1279 0x00, 0x00/*RGB_DVI*/, 1280 0x00, 0x00/*RGB_MV*/, 1281 0x00, 0xC0/*YUV_SC*/, 1282 0x00, 0xC0/*YUV_AV*/, 1283 0x00, 0x80/*YUV_DVI*/, 1284 0x00, 0x80/*YUV_MV*/, 1285 0x00, 0xC0/*MVOP_SV*/, 1286 0x00, 0xC0/*MVOP_SC*/, 1287 0x00, 0xC0/*MVOP_AV*/, 1288 0x00, 0x00/*MVOP_DVI*/, 1289 0x00, 0xC0/*DVI_CVBS*/, 1290 0x00, 0xC0/*DVI_SV*/, 1291 0x00, 0xC0/*DVI_SC*/, }, 1292 { DRV_ADC_REG(REG_ADC_DTOP_62_H), 0x1F, 0x00, 0x00/*RGB*/, 1293 0x00, 0x00/*YUV*/, 1294 0x00, 0x03/*ATV*/, 1295 0x00, 0x03/*INT_ATV*/, 1296 0x00, 0x03/*SVIDEO*/, 1297 0x00, 0x03/*SCART*/, 1298 0x00, 0x03/*CVBS*/, 1299 0x00, 0x00/*DVI*/, 1300 0x00, 0x00/*MVOP*/, 1301 0x00, 0x03/*RGB_SC*/, 1302 0x00, 0x03/*RGB_AV*/, 1303 0x00, 0x00/*RGB_DVI*/, 1304 0x00, 0x00/*RGB_MV*/, 1305 0x00, 0x03/*YUV_SC*/, 1306 0x00, 0x03/*YUV_AV*/, 1307 0x00, 0x00/*YUV_DVI*/, 1308 0x00, 0x00/*YUV_MV*/, 1309 0x00, 0x03/*MVOP_SV*/, 1310 0x00, 0x03/*MVOP_SC*/, 1311 0x00, 0x03/*MVOP_AV*/, 1312 0x00, 0x00/*MVOP_DVI*/, 1313 0x00, 0x03/*DVI_CVBS*/, 1314 0x00, 0x03/*DVI_SV*/, 1315 0x00, 0x03/*DVI_SC*/, }, 1316 { DRV_ADC_REG(REG_ADC_DTOP_62_L), 0xFF, 0x00, 0x00/*RGB*/, 1317 0x00, 0x00/*YUV*/, 1318 0x00, 0xC0/*ATV*/, 1319 0x00, 0xC0/*INT_ATV*/, 1320 0x00, 0xC0/*SVIDEO*/, 1321 0x00, 0xC0/*SCART*/, 1322 0x00, 0xC0/*CVBS*/, 1323 0x00, 0x00/*DVI*/, 1324 0x00, 0x00/*MVOP*/, 1325 0x00, 0xC0/*RGB_SC*/, 1326 0x00, 0xC0/*RGB_AV*/, 1327 0x00, 0x00/*RGB_DVI*/, 1328 0x00, 0x00/*RGB_MV*/, 1329 0x00, 0xC0/*YUV_SC*/, 1330 0x00, 0xC0/*YUV_AV*/, 1331 0x00, 0x00/*YUV_DVI*/, 1332 0x00, 0x00/*YUV_MV*/, 1333 0x00, 0xC0/*MVOP_SV*/, 1334 0x00, 0xC0/*MVOP_SC*/, 1335 0x00, 0xC0/*MVOP_AV*/, 1336 0x00, 0x00/*MVOP_DVI*/, 1337 0x00, 0xC0/*DVI_CVBS*/, 1338 0x00, 0xC0/*DVI_SV*/, 1339 0x00, 0xC0/*DVI_SC*/, }, 1340 { DRV_ADC_REG(REG_ADC_DTOP_63_L), 0xC0, 0x00, 0xC0/*$RGB*/, 1341 0x00, 0xC0/*$YUV*/, 1342 0x00, 0xC0/*$ATV*/, 1343 0x00, 0xC0/*$INT_ATV*/, 1344 0x00, 0xC0/*$SVIDEO*/, 1345 0x00, 0xC0/*$SCART*/, 1346 0x00, 0xC0/*$CVBS*/, 1347 0x00, 0xC0/*$DVI*/, 1348 0x00, 0xC0/*$MVOP*/, 1349 0x00, 0xC0/*$RGB_SC*/, 1350 0x00, 0xC0/*$RGB_AV*/, 1351 0x00, 0xC0/*$RGB_DVI*/, 1352 0x00, 0xC0/*$RGB_MV*/, 1353 0x00, 0xC0/*$YUV_SC*/, 1354 0x00, 0xC0/*$YUV_AV*/, 1355 0x00, 0xC0/*$YUV_DVI*/, 1356 0x00, 0xC0/*$YUV_MV*/, 1357 0x00, 0xC0/*$MVOP_SV*/, 1358 0x00, 0xC0/*$MVOP_SC*/, 1359 0x00, 0xC0/*$MVOP_AV*/, 1360 0x00, 0xC0/*$MVOP_DVI*/, 1361 0x00, 0xC0/*$DVI_CVBS*/, 1362 0x00, 0xC0/*$DVI_SV*/, 1363 0x00, 0xC0/*$DVI_SC*/, }, 1364 { DRV_ADC_REG(REG_ADC_DTOP_63_H), 0x03, 0x00, 0x03/*RGB*/, 1365 0x00, 0x03/*YUV*/, 1366 0x00, 0x03/*ATV*/, 1367 0x00, 0x03/*INT_ATV*/, 1368 0x00, 0x02/*SVIDEO*/, 1369 0x00, 0x03/*SCART*/, 1370 0x00, 0x03/*CVBS*/, 1371 0x00, 0x03/*DVI*/, 1372 0x00, 0x03/*MVOP*/, 1373 0x00, 0x03/*RGB_SC*/, 1374 0x00, 0x03/*RGB_AV*/, 1375 0x00, 0x03/*RGB_DVI*/, 1376 0x00, 0x03/*RGB_MV*/, 1377 0x00, 0x03/*YUV_SC*/, 1378 0x00, 0x03/*YUV_AV*/, 1379 0x00, 0x03/*YUV_DVI*/, 1380 0x00, 0x03/*YUV_MV*/, 1381 0x00, 0x02/*MVOP_SV*/, 1382 0x00, 0x03/*MVOP_SC*/, 1383 0x00, 0x03/*MVOP_AV*/, 1384 0x00, 0x03/*MVOP_DVI*/, 1385 0x00, 0x03/*DVI_CVBS*/, 1386 0x00, 0x02/*DVI_SV*/, 1387 0x00, 0x03/*DVI_SC*/, }, 1388 { DRV_ADC_REG(REG_ADC_DTOP_64_L), 0xC0, 0x00, 0xC0/*$RGB*/, 1389 0x00, 0xC0/*$YUV*/, 1390 0x00, 0xC0/*$ATV*/, 1391 0x00, 0xC0/*$INT_ATV*/, 1392 0x00, 0xC0/*$SVIDEO*/, 1393 0x00, 0xC0/*$SCART*/, 1394 0x00, 0xC0/*$CVBS*/, 1395 0x00, 0xC0/*$DVI*/, 1396 0x00, 0xC0/*$MVOP*/, 1397 0x00, 0xC0/*$RGB_SC*/, 1398 0x00, 0xC0/*$RGB_AV*/, 1399 0x00, 0xC0/*$RGB_DVI*/, 1400 0x00, 0xC0/*$RGB_MV*/, 1401 0x00, 0xC0/*$YUV_SC*/, 1402 0x00, 0xC0/*$YUV_AV*/, 1403 0x00, 0xC0/*$YUV_DVI*/, 1404 0x00, 0xC0/*$YUV_MV*/, 1405 0x00, 0xC0/*$MVOP_SV*/, 1406 0x00, 0xC0/*$MVOP_SC*/, 1407 0x00, 0xC0/*$MVOP_AV*/, 1408 0x00, 0xC0/*$MVOP_DVI*/, 1409 0x00, 0xC0/*$DVI_CVBS*/, 1410 0x00, 0xC0/*$DVI_SV*/, 1411 0x00, 0xC0/*$DVI_SC*/, }, 1412 { DRV_ADC_REG(REG_ADC_DTOP_64_H), 0x03, 0x00, 0x03/*RGB*/, 1413 0x00, 0x03/*YUV*/, 1414 0x00, 0x02/*ATV*/, 1415 0x00, 0x02/*INT_ATV*/, 1416 0x00, 0x02/*SVIDEO*/, 1417 0x00, 0x02/*SCART*/, 1418 0x00, 0x02/*CVBS*/, 1419 0x00, 0x03/*DVI*/, 1420 0x00, 0x03/*MVOP*/, 1421 0x00, 0x02/*RGB_SC*/, 1422 0x00, 0x02/*RGB_AV*/, 1423 0x00, 0x03/*RGB_DVI*/, 1424 0x00, 0x03/*RGB_MV*/, 1425 0x00, 0x02/*YUV_SC*/, 1426 0x00, 0x02/*YUV_AV*/, 1427 0x00, 0x03/*YUV_DVI*/, 1428 0x00, 0x03/*YUV_MV*/, 1429 0x00, 0x02/*MVOP_SV*/, 1430 0x00, 0x02/*MVOP_SC*/, 1431 0x00, 0x02/*MVOP_AV*/, 1432 0x00, 0x03/*MVOP_DVI*/, 1433 0x00, 0x02/*DVI_CVBS*/, 1434 0x00, 0x02/*DVI_SV*/, 1435 0x00, 0x02/*DVI_SC*/, }, 1436 { DRV_ADC_REG(REG_ADC_DTOP_68_L), 0x04, 0x00, 0x00/*RGB*/, 1437 0x00, 0x00/*YUV*/, 1438 0x01, 0x00/*ATV*/, 1439 0x01, 0x00/*INT_ATV*/, 1440 0x00, 0x04/*SVIDEO*/, 1441 0x00, 0x04/*SCART*/, 1442 0x00, 0x04/*CVBS*/, 1443 0x00, 0x00/*DVI*/, 1444 0x01, 0x00/*MVOP*/, 1445 0x00, 0x04/*RGB_SC*/, 1446 0x00, 0x04/*RGB_AV*/, 1447 0x00, 0x00/*RGB_DVI*/, 1448 0x00, 0x00/*RGB_MV*/, 1449 0x00, 0x04/*YUV_SC*/, 1450 0x00, 0x04/*YUV_AV*/, 1451 0x00, 0x00/*YUV_DVI*/, 1452 0x00, 0x00/*YUV_MV*/, 1453 0x00, 0x04/*MVOP_SV*/, 1454 0x00, 0x04/*MVOP_SC*/, 1455 0x00, 0x04/*MVOP_AV*/, 1456 0x00, 0x00/*MVOP_DVI*/, 1457 0x00, 0x04/*DVI_CVBS*/, 1458 0x00, 0x04/*DVI_SV*/, 1459 0x00, 0x04/*DVI_SC*/, }, 1460 { DRV_ADC_REG(REG_ADC_DTOP_0D_L), 0xFF, 0x00, 0x01/*RGB*/, 1461 0x00, 0x01/*YUV*/, 1462 0x01, 0x00/*ATV*/, 1463 0x01, 0x00/*INT_ATV*/, 1464 0x01, 0x00/*SVIDEO*/, 1465 0x00, 0x80/*SCART*/, 1466 0x01, 0x00/*CVBS*/, 1467 0x01, 0x00/*DVI*/, 1468 0x01, 0x00/*MVOP*/, 1469 0x00, 0x01/*RGB_SC*/, 1470 0x00, 0x01/*RGB_AV*/, 1471 0x00, 0x01/*RGB_DVI*/, 1472 0x00, 0x01/*RGB_MV*/, 1473 0x00, 0x01/*YUV_SC*/, 1474 0x00, 0x01/*YUV_AV*/, 1475 0x00, 0x01/*YUV_DVI*/, 1476 0x00, 0x01/*YUV_MV*/, 1477 0x01, 0x00/*MVOP_SV*/, 1478 0x00, 0x80/*MVOP_SC*/, 1479 0x01, 0x00/*MVOP_AV*/, 1480 0x01, 0x00/*MVOP_DVI*/, 1481 0x01, 0x00/*DVI_CVBS*/, 1482 0x01, 0x00/*DVI_SV*/, 1483 0x00, 0x80/*DVI_SC*/, }, 1484 { DRV_ADC_REG(REG_ADC_DTOP_0D_H), 0x0F, 0x00, 0x00/*RGB*/, 1485 0x00, 0x00/*YUV*/, 1486 0x01, 0x00/*ATV*/, 1487 0x01, 0x00/*INT_ATV*/, 1488 0x01, 0x00/*SVIDEO*/, 1489 0x00, 0x00/*SCART*/, 1490 0x01, 0x00/*CVBS*/, 1491 0x01, 0x00/*DVI*/, 1492 0x01, 0x00/*MVOP*/, 1493 0x00, 0x00/*RGB_SC*/, 1494 0x00, 0x00/*RGB_AV*/, 1495 0x00, 0x00/*RGB_DVI*/, 1496 0x00, 0x00/*RGB_MV*/, 1497 0x00, 0x00/*YUV_SC*/, 1498 0x00, 0x00/*YUV_AV*/, 1499 0x00, 0x00/*YUV_DVI*/, 1500 0x00, 0x00/*YUV_MV*/, 1501 0x01, 0x00/*MVOP_SV*/, 1502 0x00, 0x00/*MVOP_SC*/, 1503 0x01, 0x00/*MVOP_AV*/, 1504 0x01, 0x00/*MVOP_DVI*/, 1505 0x01, 0x00/*DVI_CVBS*/, 1506 0x01, 0x00/*DVI_SV*/, 1507 0x00, 0x00/*DVI_SC*/, }, 1508 { DRV_ADC_REG(REG_ADC_DTOP_08_H), 0xFF, 0x00, 0x10/*RGB*/, 1509 0x00, 0x10/*YUV*/, 1510 0x01, 0x00/*ATV*/, 1511 0x01, 0x00/*INT_ATV*/, 1512 0x01, 0x00/*SVIDEO*/, 1513 0x00, 0x80/*SCART*/, 1514 0x01, 0x00/*CVBS*/, 1515 0x01, 0x00/*DVI*/, 1516 0x01, 0x00/*MVOP*/, 1517 0x00, 0x10/*RGB_SC*/, 1518 0x00, 0x10/*RGB_AV*/, 1519 0x00, 0x10/*RGB_DVI*/, 1520 0x00, 0x10/*RGB_MV*/, 1521 0x00, 0x10/*YUV_SC*/, 1522 0x00, 0x10/*YUV_AV*/, 1523 0x00, 0x10/*YUV_DVI*/, 1524 0x00, 0x10/*YUV_MV*/, 1525 0x01, 0x00/*MVOP_SV*/, 1526 0x00, 0x80/*MVOP_SC*/, 1527 0x01, 0x00/*MVOP_AV*/, 1528 0x01, 0x00/*MVOP_DVI*/, 1529 0x01, 0x00/*DVI_CVBS*/, 1530 0x01, 0x00/*DVI_SV*/, 1531 0x00, 0x80/*DVI_SC*/, }, 1532 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x05/*RGB*/, 1533 0x00, 0x05/*YUV*/, 1534 0x00, 0x05/*ATV*/, 1535 0x00, 0x05/*INT_ATV*/, 1536 0x00, 0x05/*SVIDEO*/, 1537 0x00, 0x05/*SCART*/, 1538 0x00, 0x05/*CVBS*/, 1539 0x00, 0x05/*DVI*/, 1540 0x00, 0x05/*MVOP*/, 1541 0x00, 0x05/*RGB_SC*/, 1542 0x00, 0x05/*RGB_AV*/, 1543 0x00, 0x05/*RGB_DVI*/, 1544 0x00, 0x05/*RGB_MV*/, 1545 0x00, 0x05/*YUV_SC*/, 1546 0x00, 0x05/*YUV_AV*/, 1547 0x00, 0x05/*YUV_DVI*/, 1548 0x00, 0x05/*YUV_MV*/, 1549 0x00, 0x05/*MVOP_SV*/, 1550 0x00, 0x05/*MVOP_SC*/, 1551 0x00, 0x05/*MVOP_AV*/, 1552 0x00, 0x05/*MVOP_DVI*/, 1553 0x00, 0x05/*DVI_CVBS*/, 1554 0x00, 0x05/*DVI_SV*/, 1555 0x00, 0x05/*DVI_SC*/, }, 1556 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 1557 }; 1558 1559 //**************************************************** 1560 // AdcCal 1561 //**************************************************** 1562 MS_U8 MST_ADCAdcCal_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_AdcCal_NUMS*REG_DATA_SIZE]= 1563 { // Reg Mask Ignore Value 1564 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x18, 0x00, 0x08/*SW_UG*/, 1565 0x00, 0x08/*Fix_UG*/, 1566 0x00, 0x08/*BG_Fix_UG*/, }, 1567 { DRV_ADC_REG(REG_ADC_DTOPB_7B_H), 0xE0, 0x00, 0x00/*SW_UG*/, 1568 0x00, 0x00/*Fix_UG*/, 1569 0x00, 0x00/*BG_Fix_UG*/, }, 1570 { DRV_ADC_REG(REG_ADC_DTOPB_06_L), 0x01, 0x00, 0x01/*SW_UG*/, 1571 0x00, 0x01/*Fix_UG*/, 1572 0x00, 0x01/*BG_Fix_UG*/, }, 1573 { DRV_ADC_REG(REG_ADC_DTOPB_06_H), 0xFF, 0x00, 0x70/*$SW_UG*/, 1574 0x00, 0x70/*$Fix_UG*/, 1575 0x00, 0x70/*$BG_Fix_UG*/, }, 1576 { DRV_ADC_REG(REG_ADC_DTOPB_07_L), 0x07, 0x00, 0x07/*SW_UG*/, 1577 0x00, 0x07/*Fix_UG*/, 1578 0x00, 0x07/*BG_Fix_UG*/, }, 1579 { DRV_ADC_REG(REG_ADC_DTOPB_08_L), 0xFF, 0x00, 0x3F/*SW_UG*/, 1580 0x00, 0x3F/*Fix_UG*/, 1581 0x00, 0x3F/*BG_Fix_UG*/, }, 1582 { DRV_ADC_REG(REG_ADC_DTOPB_08_H), 0x0F, 0x00, 0x00/*SW_UG*/, 1583 0x00, 0x00/*Fix_UG*/, 1584 0x00, 0x00/*BG_Fix_UG*/, }, 1585 { DRV_ADC_REG(REG_ADC_DTOPB_09_L), 0xFF, 0x00, 0xFF/*SW_UG*/, 1586 0x00, 0xFF/*Fix_UG*/, 1587 0x00, 0xFF/*BG_Fix_UG*/, }, 1588 { DRV_ADC_REG(REG_ADC_DTOPB_0A_L), 0x20, 0x00, 0x00/*SW_UG*/, 1589 0x00, 0x00/*Fix_UG*/, 1590 0x00, 0x00/*BG_Fix_UG*/, }, 1591 { DRV_ADC_REG(REG_ADC_DTOPB_0A_H), 0x20, 0x00, 0x00/*SW_UG*/, 1592 0x00, 0x00/*Fix_UG*/, 1593 0x00, 0x00/*BG_Fix_UG*/, }, 1594 { DRV_ADC_REG(REG_ADC_DTOPB_0B_L), 0x20, 0x00, 0x00/*SW_UG*/, 1595 0x00, 0x00/*Fix_UG*/, 1596 0x00, 0x00/*BG_Fix_UG*/, }, 1597 { DRV_ADC_REG(REG_ADC_DTOPB_04_L), 0x07, 0x00, 0x06/*SW_UG*/, 1598 0x00, 0x06/*Fix_UG*/, 1599 0x00, 0x06/*BG_Fix_UG*/, }, 1600 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x01, 0x00, 0x01/*SW_UG*/, 1601 0x00, 0x01/*Fix_UG*/, 1602 0x00, 0x01/*BG_Fix_UG*/, }, 1603 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*SW_UG*/, 1604 0x00, 0x01/*Fix_UG*/, 1605 0x00, 0x01/*BG_Fix_UG*/, }, 1606 { DRV_ADC_REG(REG_ADC_DTOPB_04_L), 0x07, 0x00, 0x05/*SW_UG*/, 1607 0x00, 0x05/*Fix_UG*/, 1608 0x00, 0x05/*BG_Fix_UG*/, }, 1609 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x01, 0x00, 0x01/*SW_UG*/, 1610 0x00, 0x01/*Fix_UG*/, 1611 0x00, 0x01/*BG_Fix_UG*/, }, 1612 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*SW_UG*/, 1613 0x00, 0x01/*Fix_UG*/, 1614 0x00, 0x01/*BG_Fix_UG*/, }, 1615 { DRV_ADC_REG(REG_ADC_DTOPB_04_L), 0x07, 0x00, 0x03/*SW_UG*/, 1616 0x00, 0x03/*Fix_UG*/, 1617 0x00, 0x03/*BG_Fix_UG*/, }, 1618 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x01, 0x00, 0x01/*SW_UG*/, 1619 0x00, 0x01/*Fix_UG*/, 1620 0x00, 0x01/*BG_Fix_UG*/, }, 1621 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*SW_UG*/, 1622 0x00, 0x01/*Fix_UG*/, 1623 0x00, 0x01/*BG_Fix_UG*/, }, 1624 { DRV_ADC_REG(REG_ADC_DTOPB_3F_L), 0xFF, 0x00, 0x37/*$SW_UG*/, 1625 0x00, 0x37/*$Fix_UG*/, 1626 0x00, 0x37/*$BG_Fix_UG*/, }, 1627 { DRV_ADC_REG(REG_ADC_DTOPB_3F_H), 0x8F, 0x00, 0x8C/*$SW_UG*/, 1628 0x00, 0x8C/*$Fix_UG*/, 1629 0x00, 0x8C/*$BG_Fix_UG*/, }, 1630 { DRV_ADC_REG(REG_ADC_DTOPB_40_L), 0xFF, 0x00, 0xFF/*SW_UG*/, 1631 0x00, 0xC0/*Fix_UG*/, 1632 0x00, 0xC0/*BG_Fix_UG*/, }, 1633 { DRV_ADC_REG(REG_ADC_DTOPB_40_H), 0x0F, 0x00, 0x07/*SW_UG*/, 1634 0x00, 0x07/*Fix_UG*/, 1635 0x00, 0x07/*BG_Fix_UG*/, }, 1636 { DRV_ADC_REG(REG_ADC_DTOPB_41_L), 0x8F, 0x00, 0x8C/*$SW_UG*/, 1637 0x00, 0x8C/*$Fix_UG*/, 1638 0x00, 0x8C/*$BG_Fix_UG*/, }, 1639 { DRV_ADC_REG(REG_ADC_DTOPB_04_L), 0x08, 0x00, 0x08/*SW_UG*/, 1640 0x00, 0x08/*Fix_UG*/, 1641 0x00, 0x08/*BG_Fix_UG*/, }, 1642 { DRV_ADC_REG(REG_ADC_ATOP_5A_L), 0x01, 0x00, 0x01/*SW_UG*/, 1643 0x00, 0x01/*Fix_UG*/, 1644 0x00, 0x00/*BG_Fix_UG*/, }, 1645 { DRV_ADC_REG(REG_ADC_ATOP_5A_L), 0x10, 0x00, 0x10/*SW_UG*/, 1646 0x00, 0x10/*Fix_UG*/, 1647 0x00, 0x00/*BG_Fix_UG*/, }, 1648 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x18, 0x00, 0x10/*SW_UG*/, 1649 0x00, 0x10/*Fix_UG*/, 1650 0x00, 0x10/*BG_Fix_UG*/, }, 1651 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x20, 0x00, 0x00/*SW_UG*/, 1652 0x00, 0x00/*Fix_UG*/, 1653 0x00, 0x00/*BG_Fix_UG*/, }, 1654 { DRV_ADC_REG(REG_ADC_DTOPB_7B_H), 0xE0, 0x00, 0x00/*SW_UG*/, 1655 0x00, 0x00/*Fix_UG*/, 1656 0x00, 0x00/*BG_Fix_UG*/, }, 1657 { DRV_ADC_REG(REG_ADC_DTOPB_12_L), 0x0F, 0x00, 0x0F/*$SW_UG*/, 1658 0x00, 0x0F/*$Fix_UG*/, 1659 0x00, 0x0F/*$BG_Fix_UG*/, }, 1660 { DRV_ADC_REG(REG_ADC_DTOPB_13_L), 0xFF, 0x00, 0x3F/*SW_UG*/, 1661 0x00, 0x3F/*Fix_UG*/, 1662 0x00, 0x3F/*BG_Fix_UG*/, }, 1663 { DRV_ADC_REG(REG_ADC_DTOPB_13_H), 0x0F, 0x00, 0x00/*SW_UG*/, 1664 0x00, 0x00/*Fix_UG*/, 1665 0x00, 0x00/*BG_Fix_UG*/, }, 1666 { DRV_ADC_REG(REG_ADC_DTOPB_14_L), 0xFF, 0x00, 0xFF/*SW_UG*/, 1667 0x00, 0xFF/*Fix_UG*/, 1668 0x00, 0xFF/*BG_Fix_UG*/, }, 1669 { DRV_ADC_REG(REG_ADC_DTOPB_1F_L), 0x1F, 0x00, 0x0F/*$SW_UG*/, 1670 0x00, 0x0F/*$Fix_UG*/, 1671 0x00, 0x0F/*$BG_Fix_UG*/, }, 1672 { DRV_ADC_REG(REG_ADC_DTOPB_20_L), 0xFF, 0x00, 0x3F/*SW_UG*/, 1673 0x00, 0x3F/*Fix_UG*/, 1674 0x00, 0x3F/*BG_Fix_UG*/, }, 1675 { DRV_ADC_REG(REG_ADC_DTOPB_20_H), 0x0F, 0x00, 0x00/*SW_UG*/, 1676 0x00, 0x00/*Fix_UG*/, 1677 0x00, 0x00/*BG_Fix_UG*/, }, 1678 { DRV_ADC_REG(REG_ADC_DTOPB_21_L), 0xFF, 0x00, 0xFF/*SW_UG*/, 1679 0x00, 0xFF/*Fix_UG*/, 1680 0x00, 0xFF/*BG_Fix_UG*/, }, 1681 { DRV_ADC_REG(REG_ADC_DTOPB_21_H), 0xFF, 0x00, 0xFF/*SW_UG*/, 1682 0x00, 0xFF/*Fix_UG*/, 1683 0x00, 0xFF/*BG_Fix_UG*/, }, 1684 { DRV_ADC_REG(REG_ADC_DTOPB_04_L), 0x07, 0x00, 0x06/*SW_UG*/, 1685 0x00, 0x06/*Fix_UG*/, 1686 0x00, 0x06/*BG_Fix_UG*/, }, 1687 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x01, 0x00, 0x01/*SW_UG*/, 1688 0x00, 0x01/*Fix_UG*/, 1689 0x00, 0x01/*BG_Fix_UG*/, }, 1690 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*SW_UG*/, 1691 0x00, 0x01/*Fix_UG*/, 1692 0x00, 0x01/*BG_Fix_UG*/, }, 1693 { DRV_ADC_REG(REG_ADC_DTOPB_04_L), 0x07, 0x00, 0x05/*SW_UG*/, 1694 0x00, 0x05/*Fix_UG*/, 1695 0x00, 0x05/*BG_Fix_UG*/, }, 1696 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x01, 0x00, 0x01/*SW_UG*/, 1697 0x00, 0x01/*Fix_UG*/, 1698 0x00, 0x01/*BG_Fix_UG*/, }, 1699 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*SW_UG*/, 1700 0x00, 0x01/*Fix_UG*/, 1701 0x00, 0x01/*BG_Fix_UG*/, }, 1702 { DRV_ADC_REG(REG_ADC_DTOPB_04_L), 0x07, 0x00, 0x03/*SW_UG*/, 1703 0x00, 0x03/*Fix_UG*/, 1704 0x00, 0x03/*BG_Fix_UG*/, }, 1705 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x01, 0x00, 0x01/*SW_UG*/, 1706 0x00, 0x01/*Fix_UG*/, 1707 0x00, 0x01/*BG_Fix_UG*/, }, 1708 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*SW_UG*/, 1709 0x00, 0x01/*Fix_UG*/, 1710 0x00, 0x01/*BG_Fix_UG*/, }, 1711 { DRV_ADC_REG(REG_ADC_ATOP_39_H), 0x20, 0x00, 0x00/*SW_UG*/, 1712 0x00, 0x00/*Fix_UG*/, 1713 0x00, 0x00/*BG_Fix_UG*/, }, 1714 { DRV_ADC_REG(REG_ADC_ATOP_3C_H), 0x20, 0x00, 0x00/*SW_UG*/, 1715 0x00, 0x00/*Fix_UG*/, 1716 0x00, 0x00/*BG_Fix_UG*/, }, 1717 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*SW_UG*/, 1718 0x00, 0x01/*Fix_UG*/, 1719 0x00, 0x01/*BG_Fix_UG*/, }, 1720 { DRV_ADC_REG(REG_ADC_ATOP_39_H), 0x20, 0x00, 0x20/*SW_UG*/, 1721 0x00, 0x20/*Fix_UG*/, 1722 0x00, 0x20/*BG_Fix_UG*/, }, 1723 { DRV_ADC_REG(REG_ADC_ATOP_3C_H), 0x20, 0x00, 0x20/*SW_UG*/, 1724 0x00, 0x20/*Fix_UG*/, 1725 0x00, 0x20/*BG_Fix_UG*/, }, 1726 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x0A/*SW_UG*/, 1727 0x00, 0x0A/*Fix_UG*/, 1728 0x00, 0x0A/*BG_Fix_UG*/, }, 1729 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 1730 }; 1731 1732 //**************************************************** 1733 // AdcCal_AV 1734 //**************************************************** 1735 MS_U8 MST_ADCAdcCal_AV_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_AdcCal_AV_NUMS*REG_DATA_SIZE]= 1736 { // Reg Mask Ignore Value 1737 { DRV_ADC_REG(REG_ADC_DTOPB_53_H), 0x18, 0x00, 0x08/*ALL*/, }, 1738 { DRV_ADC_REG(REG_ADC_DTOPB_7C_H), 0xE0, 0x00, 0x00/*ALL*/, }, 1739 { DRV_ADC_REG(REG_ADC_DTOPB_57_L), 0x01, 0x00, 0x01/*ALL*/, }, 1740 { DRV_ADC_REG(REG_ADC_DTOPB_57_H), 0xFF, 0x00, 0x70/*$ALL*/, }, 1741 { DRV_ADC_REG(REG_ADC_DTOPB_58_L), 0x41, 0x00, 0x01/*$ALL*/, }, 1742 { DRV_ADC_REG(REG_ADC_DTOPB_5B_L), 0xFF, 0x00, 0x3F/*ALL*/, }, 1743 { DRV_ADC_REG(REG_ADC_DTOPB_5B_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1744 { DRV_ADC_REG(REG_ADC_DTOPB_5C_L), 0xFF, 0x00, 0xFF/*ALL*/, }, 1745 { DRV_ADC_REG(REG_ADC_DTOPB_53_H), 0x01, 0x00, 0x01/*ALL*/, }, 1746 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*ALL*/, }, 1747 { DRV_ADC_REG(REG_ADC_ATOP_5A_L), 0x01, 0x00, 0x01/*ALL*/, }, 1748 { DRV_ADC_REG(REG_ADC_ATOP_5A_L), 0x08, 0x00, 0x00/*ALL*/, }, 1749 { DRV_ADC_REG(REG_ADC_DTOPB_72_L), 0x0F, 0x00, 0x07/*ALL*/, }, 1750 { DRV_ADC_REG(REG_ADC_DTOPB_72_L), 0xF0, 0x00, 0x30/*ALL*/, }, 1751 { DRV_ADC_REG(REG_ADC_DTOPB_72_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1752 { DRV_ADC_REG(REG_ADC_DTOPB_72_H), 0x80, 0x00, 0x80/*ALL*/, }, 1753 { DRV_ADC_REG(REG_ADC_DTOPB_72_H), 0x0F, 0x00, 0x04/*ALL*/, }, 1754 { DRV_ADC_REG(REG_ADC_DTOPB_72_H), 0x80, 0x00, 0x80/*ALL*/, }, 1755 { DRV_ADC_REG(REG_ADC_DTOPB_72_H), 0x0F, 0x00, 0x08/*ALL*/, }, 1756 { DRV_ADC_REG(REG_ADC_DTOPB_72_H), 0x80, 0x00, 0x80/*ALL*/, }, 1757 { DRV_ADC_REG(REG_ADC_DTOPB_72_H), 0x0F, 0x00, 0x0C/*ALL*/, }, 1758 { DRV_ADC_REG(REG_ADC_DTOPB_72_H), 0x80, 0x00, 0x80/*ALL*/, }, 1759 { DRV_ADC_REG(REG_ADC_DTOPB_53_H), 0x18, 0x00, 0x10/*ALL*/, }, 1760 { DRV_ADC_REG(REG_ADC_DTOPB_53_H), 0x20, 0x00, 0x20/*ALL*/, }, 1761 { DRV_ADC_REG(REG_ADC_DTOPB_7C_H), 0xE0, 0x00, 0x00/*ALL*/, }, 1762 { DRV_ADC_REG(REG_ADC_DTOPB_5D_L), 0x03, 0x00, 0x03/*$ALL*/, }, 1763 { DRV_ADC_REG(REG_ADC_DTOPB_5E_L), 0xFF, 0x00, 0x3F/*ALL*/, }, 1764 { DRV_ADC_REG(REG_ADC_DTOPB_5E_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1765 { DRV_ADC_REG(REG_ADC_DTOPB_5F_L), 0xFF, 0x00, 0xFF/*ALL*/, }, 1766 { DRV_ADC_REG(REG_ADC_DTOPB_64_L), 0x07, 0x00, 0x07/*$ALL*/, }, 1767 { DRV_ADC_REG(REG_ADC_DTOPB_65_L), 0xFF, 0x00, 0x3F/*ALL*/, }, 1768 { DRV_ADC_REG(REG_ADC_DTOPB_65_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1769 { DRV_ADC_REG(REG_ADC_DTOPB_66_L), 0xFF, 0x00, 0xFF/*ALL*/, }, 1770 { DRV_ADC_REG(REG_ADC_DTOPB_66_H), 0xFF, 0x00, 0xFF/*ALL*/, }, 1771 { DRV_ADC_REG(REG_ADC_DTOPB_53_H), 0x01, 0x00, 0x01/*ALL*/, }, 1772 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x0A/*ALL*/, }, 1773 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 1774 }; 1775 1776 //**************************************************** 1777 // AdcCal_AV_OFF 1778 //**************************************************** 1779 MS_U8 MST_ADCAdcCal_AV_OFF_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_AdcCal_AV_OFF_NUMS*REG_DATA_SIZE]= 1780 { // Reg Mask Ignore Value 1781 { DRV_ADC_REG(REG_ADC_ATOPB_53_H), 0x18, 0x00, 0x08/*ALL*/, }, 1782 { DRV_ADC_REG(REG_ADC_ATOPB_7C_H), 0xE0, 0x00, 0x00/*ALL*/, }, 1783 { DRV_ADC_REG(REG_ADC_ATOPB_57_L), 0x01, 0x00, 0x01/*ALL*/, }, 1784 { DRV_ADC_REG(REG_ADC_ATOPB_57_H), 0xFF, 0x00, 0x70/*$ALL*/, }, 1785 { DRV_ADC_REG(REG_ADC_ATOPB_58_L), 0x41, 0x00, 0x01/*$ALL*/, }, 1786 { DRV_ADC_REG(REG_ADC_ATOPB_5B_L), 0xFF, 0x00, 0x3F/*ALL*/, }, 1787 { DRV_ADC_REG(REG_ADC_ATOPB_5B_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1788 { DRV_ADC_REG(REG_ADC_ATOPB_5C_L), 0xFF, 0x00, 0xFF/*ALL*/, }, 1789 { DRV_ADC_REG(REG_ADC_ATOPB_53_H), 0x01, 0x00, 0x01/*ALL*/, }, 1790 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*ALL*/, }, 1791 { DRV_ADC_REG(REG_ADC_ATOP_5A_L), 0x01, 0x00, 0x00/*ALL*/, }, 1792 { DRV_ADC_REG(REG_ADC_ATOP_5A_L), 0x40, 0x00, 0x00/*ALL*/, }, 1793 { DRV_ADC_REG(REG_ADC_ATOPB_72_L), 0x0F, 0x00, 0x07/*ALL*/, }, 1794 { DRV_ADC_REG(REG_ADC_ATOPB_72_L), 0xF0, 0x00, 0x30/*ALL*/, }, 1795 { DRV_ADC_REG(REG_ADC_ATOPB_72_H), 0x0F, 0x00, 0x0C/*ALL*/, }, 1796 { DRV_ADC_REG(REG_ADC_ATOPB_72_H), 0x80, 0x00, 0x80/*ALL*/, }, 1797 { DRV_ADC_REG(REG_ADC_ATOPB_53_H), 0x18, 0x00, 0x10/*ALL*/, }, 1798 { DRV_ADC_REG(REG_ADC_ATOPB_53_H), 0x20, 0x00, 0x00/*ALL*/, }, 1799 { DRV_ADC_REG(REG_ADC_ATOPB_7C_H), 0xE0, 0x00, 0x00/*ALL*/, }, 1800 { DRV_ADC_REG(REG_ADC_ATOPB_5D_L), 0x03, 0x00, 0x03/*$ALL*/, }, 1801 { DRV_ADC_REG(REG_ADC_ATOPB_5E_L), 0xFF, 0x00, 0x3F/*ALL*/, }, 1802 { DRV_ADC_REG(REG_ADC_ATOPB_5E_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1803 { DRV_ADC_REG(REG_ADC_ATOPB_5F_L), 0xFF, 0x00, 0xFF/*ALL*/, }, 1804 { DRV_ADC_REG(REG_ADC_ATOPB_64_L), 0x07, 0x00, 0x07/*$ALL*/, }, 1805 { DRV_ADC_REG(REG_ADC_ATOPB_65_L), 0xFF, 0x00, 0x3F/*ALL*/, }, 1806 { DRV_ADC_REG(REG_ADC_ATOPB_65_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1807 { DRV_ADC_REG(REG_ADC_ATOPB_66_L), 0xFF, 0x00, 0xFF/*ALL*/, }, 1808 { DRV_ADC_REG(REG_ADC_ATOPB_66_H), 0xFF, 0x00, 0xFF/*ALL*/, }, 1809 { DRV_ADC_REG(REG_ADC_ATOPB_53_H), 0x01, 0x00, 0x01/*ALL*/, }, 1810 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x0A/*ALL*/, }, 1811 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 1812 }; 1813 1814 //**************************************************** 1815 // AdcCal_SV 1816 //**************************************************** 1817 MS_U8 MST_ADCAdcCal_SV_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_AdcCal_SV_NUMS*REG_DATA_SIZE]= 1818 { // Reg Mask Ignore Value 1819 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x18, 0x00, 0x08/*ALL*/, }, 1820 { DRV_ADC_REG(REG_ADC_DTOPB_7B_H), 0xE0, 0x00, 0x00/*ALL*/, }, 1821 { DRV_ADC_REG(REG_ADC_DTOPB_06_L), 0x01, 0x00, 0x01/*ALL*/, }, 1822 { DRV_ADC_REG(REG_ADC_DTOPB_06_H), 0xFF, 0x00, 0x70/*$ALL*/, }, 1823 { DRV_ADC_REG(REG_ADC_DTOPB_07_L), 0x07, 0x00, 0x07/*ALL*/, }, 1824 { DRV_ADC_REG(REG_ADC_DTOPB_08_L), 0xFF, 0x00, 0x3F/*ALL*/, }, 1825 { DRV_ADC_REG(REG_ADC_DTOPB_08_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1826 { DRV_ADC_REG(REG_ADC_DTOPB_09_L), 0xFF, 0x00, 0xFF/*ALL*/, }, 1827 { DRV_ADC_REG(REG_ADC_DTOPB_0A_L), 0x20, 0x00, 0x00/*ALL*/, }, 1828 { DRV_ADC_REG(REG_ADC_DTOPB_0A_H), 0x20, 0x00, 0x00/*ALL*/, }, 1829 { DRV_ADC_REG(REG_ADC_DTOPB_0B_L), 0x20, 0x00, 0x00/*ALL*/, }, 1830 { DRV_ADC_REG(REG_ADC_DTOPB_04_L), 0x07, 0x00, 0x06/*ALL*/, }, 1831 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x01, 0x00, 0x01/*ALL*/, }, 1832 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x01/*ALL*/, }, 1833 { DRV_ADC_REG(REG_ADC_DTOPB_04_L), 0x08, 0x00, 0x08/*ALL*/, }, 1834 { DRV_ADC_REG(REG_ADC_ATOP_5A_L), 0x01, 0x00, 0x01/*ALL*/, }, 1835 { DRV_ADC_REG(REG_ADC_ATOP_5A_L), 0x10, 0x00, 0x00/*ALL*/, }, 1836 { DRV_ADC_REG(REG_ADC_DTOPB_3F_L), 0x0F, 0x00, 0x07/*ALL*/, }, 1837 { DRV_ADC_REG(REG_ADC_DTOPB_3F_L), 0xF0, 0x00, 0x30/*ALL*/, }, 1838 { DRV_ADC_REG(REG_ADC_DTOPB_3F_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1839 { DRV_ADC_REG(REG_ADC_DTOPB_3F_H), 0x80, 0x00, 0x80/*ALL*/, }, 1840 { DRV_ADC_REG(REG_ADC_DTOPB_3F_H), 0x0F, 0x00, 0x04/*ALL*/, }, 1841 { DRV_ADC_REG(REG_ADC_DTOPB_3F_H), 0x80, 0x00, 0x80/*ALL*/, }, 1842 { DRV_ADC_REG(REG_ADC_DTOPB_3F_H), 0x0F, 0x00, 0x08/*ALL*/, }, 1843 { DRV_ADC_REG(REG_ADC_DTOPB_3F_H), 0x80, 0x00, 0x80/*ALL*/, }, 1844 { DRV_ADC_REG(REG_ADC_DTOPB_3F_H), 0x0F, 0x00, 0x0C/*ALL*/, }, 1845 { DRV_ADC_REG(REG_ADC_DTOPB_3F_H), 0x80, 0x00, 0x80/*ALL*/, }, 1846 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x18, 0x00, 0x10/*ALL*/, }, 1847 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x20, 0x00, 0x20/*ALL*/, }, 1848 { DRV_ADC_REG(REG_ADC_DTOPB_7B_H), 0xE0, 0x00, 0x00/*ALL*/, }, 1849 { DRV_ADC_REG(REG_ADC_DTOPB_12_L), 0x03, 0x00, 0x03/*$ALL*/, }, 1850 { DRV_ADC_REG(REG_ADC_DTOPB_13_L), 0xFF, 0x00, 0x3F/*ALL*/, }, 1851 { DRV_ADC_REG(REG_ADC_DTOPB_13_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1852 { DRV_ADC_REG(REG_ADC_DTOPB_14_L), 0xFF, 0x00, 0xFF/*ALL*/, }, 1853 { DRV_ADC_REG(REG_ADC_DTOPB_1F_L), 0x13, 0x00, 0x13/*$ALL*/, }, 1854 { DRV_ADC_REG(REG_ADC_DTOPB_20_L), 0xFF, 0x00, 0x3F/*ALL*/, }, 1855 { DRV_ADC_REG(REG_ADC_DTOPB_20_H), 0x0F, 0x00, 0x00/*ALL*/, }, 1856 { DRV_ADC_REG(REG_ADC_DTOPB_21_L), 0xFF, 0x00, 0xFF/*ALL*/, }, 1857 { DRV_ADC_REG(REG_ADC_DTOPB_21_H), 0xFF, 0x00, 0xFF/*ALL*/, }, 1858 { DRV_ADC_REG(REG_ADC_DTOPB_02_H), 0x01, 0x00, 0x01/*ALL*/, }, 1859 { DRV_ADC_REG(REG_ADC_DTOPB_FE_L), 0xFF, 0x00, 0x0A/*ALL*/, }, 1860 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 1861 }; 1862 1863 //**************************************************** 1864 // SetMode 1865 //**************************************************** 1866 ADC_FREQ_RANGE MST_ADC_FreqRange_TBL[]= 1867 { 1868 //H-Limit, L-Limit 1869 { 0x1000, 0x012C},/*ADC_FREQ_SECTION1*/ 1870 { 0x012C, 0x00FA},/*ADC_FREQ_SECTION2*/ 1871 { 0x00FA, 0x00C8},/*ADC_FREQ_SECTION3*/ 1872 { 0x00C8, 0x00B4},/*ADC_FREQ_SECTION4*/ 1873 { 0x00B4, 0x00A0},/*ADC_FREQ_SECTION5*/ 1874 { 0x00A0, 0x008C},/*ADC_FREQ_SECTION6*/ 1875 { 0x008C, 0x0078},/*ADC_FREQ_SECTION7*/ 1876 { 0x0078, 0x0064},/*ADC_FREQ_SECTION8*/ 1877 { 0x0064, 0x0050},/*ADC_FREQ_SECTION9*/ 1878 { 0x0050, 0x0046},/*ADC_FREQ_SECTION10*/ 1879 { 0x0046, 0x003C},/*ADC_FREQ_SECTION11*/ 1880 { 0x003C, 0x002D},/*ADC_FREQ_SECTION12*/ 1881 { 0x002D, 0x0028},/*ADC_FREQ_SECTION13*/ 1882 { 0x0028, 0x001E},/*ADC_FREQ_SECTION14*/ 1883 { 0x001E, 0x0014},/*ADC_FREQ_SECTION15*/ 1884 { 0x0014, 0x000F},/*ADC_FREQ_SECTION16*/ 1885 { 0x000F, 0x0005},/*ADC_FREQ_SECTION17*/ 1886 }; 1887 1888 MS_U8 MST_ADCSetModeYUV_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_SetMode_NUMS*REG_DATA_SIZE]= 1889 { // Reg Mask Ignore Value 1890 { DRV_ADC_REG(REG_ADC_ATOP_34_L), 0x0F, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 1891 0x00, 0x01/*ADC_TABLE_FREQ_SECTION2*/, 1892 0x00, 0x02/*ADC_TABLE_FREQ_SECTION3*/, 1893 0x00, 0x04/*ADC_TABLE_FREQ_SECTION4*/, 1894 0x00, 0x05/*ADC_TABLE_FREQ_SECTION5*/, 1895 0x00, 0x06/*ADC_TABLE_FREQ_SECTION6*/, 1896 0x00, 0x07/*ADC_TABLE_FREQ_SECTION7*/, 1897 0x00, 0x08/*ADC_TABLE_FREQ_SECTION8*/, 1898 0x00, 0x09/*ADC_TABLE_FREQ_SECTION9*/, 1899 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION10*/, 1900 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION11*/, 1901 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION12*/, 1902 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION13*/, 1903 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION14*/, 1904 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION15*/, 1905 0x00, 0x0D/*ADC_TABLE_FREQ_SECTION16*/, 1906 0x00, 0x0E/*ADC_TABLE_FREQ_SECTION17*/,}, 1907 { DRV_ADC_REG(REG_ADC_ATOP_34_L), 0xF0, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 1908 0x00, 0x10/*ADC_TABLE_FREQ_SECTION2*/, 1909 0x00, 0x20/*ADC_TABLE_FREQ_SECTION3*/, 1910 0x00, 0x40/*ADC_TABLE_FREQ_SECTION4*/, 1911 0x00, 0x50/*ADC_TABLE_FREQ_SECTION5*/, 1912 0x00, 0x60/*ADC_TABLE_FREQ_SECTION6*/, 1913 0x00, 0x70/*ADC_TABLE_FREQ_SECTION7*/, 1914 0x00, 0x80/*ADC_TABLE_FREQ_SECTION8*/, 1915 0x00, 0x90/*ADC_TABLE_FREQ_SECTION9*/, 1916 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION10*/, 1917 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION11*/, 1918 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION12*/, 1919 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION13*/, 1920 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION14*/, 1921 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION15*/, 1922 0x00, 0xD0/*ADC_TABLE_FREQ_SECTION16*/, 1923 0x00, 0xE0/*ADC_TABLE_FREQ_SECTION17*/,}, 1924 { DRV_ADC_REG(REG_ADC_ATOP_34_H), 0x0F, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 1925 0x00, 0x01/*ADC_TABLE_FREQ_SECTION2*/, 1926 0x00, 0x02/*ADC_TABLE_FREQ_SECTION3*/, 1927 0x00, 0x04/*ADC_TABLE_FREQ_SECTION4*/, 1928 0x00, 0x05/*ADC_TABLE_FREQ_SECTION5*/, 1929 0x00, 0x06/*ADC_TABLE_FREQ_SECTION6*/, 1930 0x00, 0x07/*ADC_TABLE_FREQ_SECTION7*/, 1931 0x00, 0x08/*ADC_TABLE_FREQ_SECTION8*/, 1932 0x00, 0x09/*ADC_TABLE_FREQ_SECTION9*/, 1933 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION10*/, 1934 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION11*/, 1935 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION12*/, 1936 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION13*/, 1937 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION14*/, 1938 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION15*/, 1939 0x00, 0x0D/*ADC_TABLE_FREQ_SECTION16*/, 1940 0x00, 0x0E/*ADC_TABLE_FREQ_SECTION17*/,}, 1941 { DRV_ADC_REG(REG_ADC_ATOP_34_H), 0xF0, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 1942 0x00, 0x10/*ADC_TABLE_FREQ_SECTION2*/, 1943 0x00, 0x20/*ADC_TABLE_FREQ_SECTION3*/, 1944 0x00, 0x40/*ADC_TABLE_FREQ_SECTION4*/, 1945 0x00, 0x50/*ADC_TABLE_FREQ_SECTION5*/, 1946 0x00, 0x60/*ADC_TABLE_FREQ_SECTION6*/, 1947 0x00, 0x70/*ADC_TABLE_FREQ_SECTION7*/, 1948 0x00, 0x80/*ADC_TABLE_FREQ_SECTION8*/, 1949 0x00, 0x90/*ADC_TABLE_FREQ_SECTION9*/, 1950 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION10*/, 1951 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION11*/, 1952 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION12*/, 1953 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION13*/, 1954 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION14*/, 1955 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION15*/, 1956 0x00, 0xD0/*ADC_TABLE_FREQ_SECTION16*/, 1957 0x00, 0xE0/*ADC_TABLE_FREQ_SECTION17*/,}, 1958 { DRV_ADC_REG(REG_ADC_ATOP_35_L), 0x0F, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 1959 0x00, 0x01/*ADC_TABLE_FREQ_SECTION2*/, 1960 0x00, 0x02/*ADC_TABLE_FREQ_SECTION3*/, 1961 0x00, 0x04/*ADC_TABLE_FREQ_SECTION4*/, 1962 0x00, 0x05/*ADC_TABLE_FREQ_SECTION5*/, 1963 0x00, 0x06/*ADC_TABLE_FREQ_SECTION6*/, 1964 0x00, 0x07/*ADC_TABLE_FREQ_SECTION7*/, 1965 0x00, 0x08/*ADC_TABLE_FREQ_SECTION8*/, 1966 0x00, 0x09/*ADC_TABLE_FREQ_SECTION9*/, 1967 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION10*/, 1968 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION11*/, 1969 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION12*/, 1970 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION13*/, 1971 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION14*/, 1972 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION15*/, 1973 0x00, 0x0D/*ADC_TABLE_FREQ_SECTION16*/, 1974 0x00, 0x0E/*ADC_TABLE_FREQ_SECTION17*/,}, 1975 { DRV_ADC_REG(REG_ADC_ATOP_35_L), 0xF0, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 1976 0x00, 0x10/*ADC_TABLE_FREQ_SECTION2*/, 1977 0x00, 0x20/*ADC_TABLE_FREQ_SECTION3*/, 1978 0x00, 0x40/*ADC_TABLE_FREQ_SECTION4*/, 1979 0x00, 0x50/*ADC_TABLE_FREQ_SECTION5*/, 1980 0x00, 0x60/*ADC_TABLE_FREQ_SECTION6*/, 1981 0x00, 0x70/*ADC_TABLE_FREQ_SECTION7*/, 1982 0x00, 0x80/*ADC_TABLE_FREQ_SECTION8*/, 1983 0x00, 0x90/*ADC_TABLE_FREQ_SECTION9*/, 1984 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION10*/, 1985 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION11*/, 1986 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION12*/, 1987 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION13*/, 1988 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION14*/, 1989 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION15*/, 1990 0x00, 0xD0/*ADC_TABLE_FREQ_SECTION16*/, 1991 0x00, 0xE0/*ADC_TABLE_FREQ_SECTION17*/,}, 1992 { DRV_ADC_REG(REG_ADC_DTOP_17_H), 0x0F, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 1993 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 1994 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 1995 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 1996 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 1997 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 1998 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 1999 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2000 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2001 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2002 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2003 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2004 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2005 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2006 0x00, 0x00/*ADC_TABLE_FREQ_SECTION15*/, 2007 0x00, 0x00/*ADC_TABLE_FREQ_SECTION16*/, 2008 0x00, 0x00/*ADC_TABLE_FREQ_SECTION17*/,}, 2009 { DRV_ADC_REG(REG_ADC_DTOP_17_L), 0xFF, 0x00, 0x45/*ADC_TABLE_FREQ_SECTION1*/, 2010 0x00, 0x45/*ADC_TABLE_FREQ_SECTION2*/, 2011 0x00, 0x45/*ADC_TABLE_FREQ_SECTION3*/, 2012 0x00, 0x45/*ADC_TABLE_FREQ_SECTION4*/, 2013 0x00, 0x45/*ADC_TABLE_FREQ_SECTION5*/, 2014 0x00, 0x45/*ADC_TABLE_FREQ_SECTION6*/, 2015 0x00, 0x45/*ADC_TABLE_FREQ_SECTION7*/, 2016 0x00, 0x45/*ADC_TABLE_FREQ_SECTION8*/, 2017 0x00, 0x45/*ADC_TABLE_FREQ_SECTION9*/, 2018 0x00, 0x45/*ADC_TABLE_FREQ_SECTION10*/, 2019 0x00, 0x45/*ADC_TABLE_FREQ_SECTION11*/, 2020 0x00, 0x30/*ADC_TABLE_FREQ_SECTION12*/, 2021 0x00, 0x30/*ADC_TABLE_FREQ_SECTION13*/, 2022 0x00, 0x30/*ADC_TABLE_FREQ_SECTION14*/, 2023 0x00, 0x30/*ADC_TABLE_FREQ_SECTION15*/, 2024 0x00, 0x30/*ADC_TABLE_FREQ_SECTION16*/, 2025 0x00, 0x30/*ADC_TABLE_FREQ_SECTION17*/,}, 2026 { DRV_ADC_REG(REG_ADC_DTOP_18_L), 0xFF, 0x00, 0x80/*ADC_TABLE_FREQ_SECTION1*/, 2027 0x00, 0x80/*ADC_TABLE_FREQ_SECTION2*/, 2028 0x00, 0x80/*ADC_TABLE_FREQ_SECTION3*/, 2029 0x00, 0x80/*ADC_TABLE_FREQ_SECTION4*/, 2030 0x00, 0x80/*ADC_TABLE_FREQ_SECTION5*/, 2031 0x00, 0x40/*ADC_TABLE_FREQ_SECTION6*/, 2032 0x00, 0x40/*ADC_TABLE_FREQ_SECTION7*/, 2033 0x00, 0x40/*ADC_TABLE_FREQ_SECTION8*/, 2034 0x00, 0x40/*ADC_TABLE_FREQ_SECTION9*/, 2035 0x00, 0x40/*ADC_TABLE_FREQ_SECTION10*/, 2036 0x00, 0x40/*ADC_TABLE_FREQ_SECTION11*/, 2037 0x00, 0x20/*ADC_TABLE_FREQ_SECTION12*/, 2038 0x00, 0x20/*ADC_TABLE_FREQ_SECTION13*/, 2039 0x00, 0x20/*ADC_TABLE_FREQ_SECTION14*/, 2040 0x00, 0x20/*ADC_TABLE_FREQ_SECTION15*/, 2041 0x00, 0x20/*ADC_TABLE_FREQ_SECTION16*/, 2042 0x00, 0x20/*ADC_TABLE_FREQ_SECTION17*/,}, 2043 { DRV_ADC_REG(REG_ADC_DTOP_19_H), 0x60, 0x00, 0x40/*ADC_TABLE_FREQ_SECTION1*/, 2044 0x00, 0x40/*ADC_TABLE_FREQ_SECTION2*/, 2045 0x00, 0x40/*ADC_TABLE_FREQ_SECTION3*/, 2046 0x00, 0x40/*ADC_TABLE_FREQ_SECTION4*/, 2047 0x00, 0x40/*ADC_TABLE_FREQ_SECTION5*/, 2048 0x00, 0x40/*ADC_TABLE_FREQ_SECTION6*/, 2049 0x00, 0x40/*ADC_TABLE_FREQ_SECTION7*/, 2050 0x00, 0x20/*ADC_TABLE_FREQ_SECTION8*/, 2051 0x00, 0x20/*ADC_TABLE_FREQ_SECTION9*/, 2052 0x00, 0x20/*ADC_TABLE_FREQ_SECTION10*/, 2053 0x00, 0x20/*ADC_TABLE_FREQ_SECTION11*/, 2054 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2055 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2056 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2057 0x00, 0x00/*ADC_TABLE_FREQ_SECTION15*/, 2058 0x00, 0x00/*ADC_TABLE_FREQ_SECTION16*/, 2059 0x00, 0x00/*ADC_TABLE_FREQ_SECTION17*/,}, 2060 { DRV_ADC_REG(REG_ADC_ATOP_0D_L), 0x10, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2061 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2062 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 2063 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 2064 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 2065 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2066 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2067 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2068 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2069 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2070 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2071 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2072 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2073 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2074 0x00, 0x10/*ADC_TABLE_FREQ_SECTION15*/, 2075 0x00, 0x10/*ADC_TABLE_FREQ_SECTION16*/, 2076 0x00, 0x10/*ADC_TABLE_FREQ_SECTION17*/,}, 2077 { DRV_ADC_REG(REG_ADC_ATOP_0C_L), 0x07, 0x00, 0x01/*ADC_TABLE_FREQ_SECTION1*/, 2078 0x00, 0x01/*ADC_TABLE_FREQ_SECTION2*/, 2079 0x00, 0x01/*ADC_TABLE_FREQ_SECTION3*/, 2080 0x00, 0x01/*ADC_TABLE_FREQ_SECTION4*/, 2081 0x00, 0x01/*ADC_TABLE_FREQ_SECTION5*/, 2082 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2083 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2084 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2085 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2086 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2087 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2088 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2089 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2090 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2091 0x00, 0x00/*ADC_TABLE_FREQ_SECTION15*/, 2092 0x00, 0x00/*ADC_TABLE_FREQ_SECTION16*/, 2093 0x00, 0x00/*ADC_TABLE_FREQ_SECTION17*/,}, 2094 { DRV_ADC_REG(REG_ADC_ATOP_09_H), 0x18, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2095 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2096 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 2097 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 2098 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 2099 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2100 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2101 0x00, 0x08/*ADC_TABLE_FREQ_SECTION8*/, 2102 0x00, 0x08/*ADC_TABLE_FREQ_SECTION9*/, 2103 0x00, 0x08/*ADC_TABLE_FREQ_SECTION10*/, 2104 0x00, 0x08/*ADC_TABLE_FREQ_SECTION11*/, 2105 0x00, 0x10/*ADC_TABLE_FREQ_SECTION12*/, 2106 0x00, 0x10/*ADC_TABLE_FREQ_SECTION13*/, 2107 0x00, 0x10/*ADC_TABLE_FREQ_SECTION14*/, 2108 0x00, 0x18/*ADC_TABLE_FREQ_SECTION15*/, 2109 0x00, 0x18/*ADC_TABLE_FREQ_SECTION16*/, 2110 0x00, 0x18/*ADC_TABLE_FREQ_SECTION17*/,}, 2111 { DRV_ADC_REG(REG_ADC_ATOP_0A_L), 0x04, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2112 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2113 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 2114 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 2115 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 2116 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2117 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2118 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2119 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2120 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2121 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2122 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2123 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2124 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2125 0x00, 0x04/*ADC_TABLE_FREQ_SECTION15*/, 2126 0x00, 0x04/*ADC_TABLE_FREQ_SECTION16*/, 2127 0x00, 0x04/*ADC_TABLE_FREQ_SECTION17*/,}, 2128 { DRV_ADC_REG(REG_ADC_ATOP_61_H), 0x60, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2129 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2130 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 2131 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 2132 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 2133 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2134 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2135 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2136 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2137 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2138 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2139 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2140 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2141 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2142 0x00, 0x20/*ADC_TABLE_FREQ_SECTION15*/, 2143 0x00, 0x20/*ADC_TABLE_FREQ_SECTION16*/, 2144 0x00, 0x20/*ADC_TABLE_FREQ_SECTION17*/,}, 2145 { DRV_ADC_REG(REG_ADC_ATOP_09_H), 0x07, 0x00, 0x02/*ADC_TABLE_FREQ_SECTION1*/, 2146 0x00, 0x02/*ADC_TABLE_FREQ_SECTION2*/, 2147 0x00, 0x02/*ADC_TABLE_FREQ_SECTION3*/, 2148 0x00, 0x02/*ADC_TABLE_FREQ_SECTION4*/, 2149 0x00, 0x02/*ADC_TABLE_FREQ_SECTION5*/, 2150 0x00, 0x01/*ADC_TABLE_FREQ_SECTION6*/, 2151 0x00, 0x01/*ADC_TABLE_FREQ_SECTION7*/, 2152 0x00, 0x02/*ADC_TABLE_FREQ_SECTION8*/, 2153 0x00, 0x02/*ADC_TABLE_FREQ_SECTION9*/, 2154 0x00, 0x02/*ADC_TABLE_FREQ_SECTION10*/, 2155 0x00, 0x02/*ADC_TABLE_FREQ_SECTION11*/, 2156 0x00, 0x04/*ADC_TABLE_FREQ_SECTION12*/, 2157 0x00, 0x04/*ADC_TABLE_FREQ_SECTION13*/, 2158 0x00, 0x04/*ADC_TABLE_FREQ_SECTION14*/, 2159 0x00, 0x06/*ADC_TABLE_FREQ_SECTION15*/, 2160 0x00, 0x06/*ADC_TABLE_FREQ_SECTION16*/, 2161 0x00, 0x06/*ADC_TABLE_FREQ_SECTION17*/,}, 2162 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 2163 }; 2164 2165 MS_U8 MST_ADCSetModeRGB_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_SetMode_NUMS*REG_DATA_SIZE]= 2166 { // Reg Mask Ignore Value 2167 { DRV_ADC_REG(REG_ADC_ATOP_34_L), 0x0F, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2168 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2169 0x00, 0x01/*ADC_TABLE_FREQ_SECTION3*/, 2170 0x00, 0x01/*ADC_TABLE_FREQ_SECTION4*/, 2171 0x00, 0x02/*ADC_TABLE_FREQ_SECTION5*/, 2172 0x00, 0x03/*ADC_TABLE_FREQ_SECTION6*/, 2173 0x00, 0x04/*ADC_TABLE_FREQ_SECTION7*/, 2174 0x00, 0x05/*ADC_TABLE_FREQ_SECTION8*/, 2175 0x00, 0x06/*ADC_TABLE_FREQ_SECTION9*/, 2176 0x00, 0x07/*ADC_TABLE_FREQ_SECTION10*/, 2177 0x00, 0x08/*ADC_TABLE_FREQ_SECTION11*/, 2178 0x00, 0x09/*ADC_TABLE_FREQ_SECTION12*/, 2179 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION13*/, 2180 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION14*/, 2181 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION15*/, 2182 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION16*/, 2183 0x00, 0x0D/*ADC_TABLE_FREQ_SECTION17*/,}, 2184 { DRV_ADC_REG(REG_ADC_ATOP_34_L), 0xF0, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2185 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2186 0x00, 0x10/*ADC_TABLE_FREQ_SECTION3*/, 2187 0x00, 0x10/*ADC_TABLE_FREQ_SECTION4*/, 2188 0x00, 0x20/*ADC_TABLE_FREQ_SECTION5*/, 2189 0x00, 0x30/*ADC_TABLE_FREQ_SECTION6*/, 2190 0x00, 0x40/*ADC_TABLE_FREQ_SECTION7*/, 2191 0x00, 0x50/*ADC_TABLE_FREQ_SECTION8*/, 2192 0x00, 0x60/*ADC_TABLE_FREQ_SECTION9*/, 2193 0x00, 0x70/*ADC_TABLE_FREQ_SECTION10*/, 2194 0x00, 0x80/*ADC_TABLE_FREQ_SECTION11*/, 2195 0x00, 0x90/*ADC_TABLE_FREQ_SECTION12*/, 2196 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION13*/, 2197 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION14*/, 2198 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION15*/, 2199 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION16*/, 2200 0x00, 0xD0/*ADC_TABLE_FREQ_SECTION17*/,}, 2201 { DRV_ADC_REG(REG_ADC_ATOP_34_H), 0x0F, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2202 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2203 0x00, 0x01/*ADC_TABLE_FREQ_SECTION3*/, 2204 0x00, 0x01/*ADC_TABLE_FREQ_SECTION4*/, 2205 0x00, 0x02/*ADC_TABLE_FREQ_SECTION5*/, 2206 0x00, 0x03/*ADC_TABLE_FREQ_SECTION6*/, 2207 0x00, 0x04/*ADC_TABLE_FREQ_SECTION7*/, 2208 0x00, 0x05/*ADC_TABLE_FREQ_SECTION8*/, 2209 0x00, 0x06/*ADC_TABLE_FREQ_SECTION9*/, 2210 0x00, 0x07/*ADC_TABLE_FREQ_SECTION10*/, 2211 0x00, 0x08/*ADC_TABLE_FREQ_SECTION11*/, 2212 0x00, 0x09/*ADC_TABLE_FREQ_SECTION12*/, 2213 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION13*/, 2214 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION14*/, 2215 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION15*/, 2216 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION16*/, 2217 0x00, 0x0D/*ADC_TABLE_FREQ_SECTION17*/,}, 2218 { DRV_ADC_REG(REG_ADC_ATOP_34_H), 0xF0, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2219 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2220 0x00, 0x10/*ADC_TABLE_FREQ_SECTION3*/, 2221 0x00, 0x10/*ADC_TABLE_FREQ_SECTION4*/, 2222 0x00, 0x20/*ADC_TABLE_FREQ_SECTION5*/, 2223 0x00, 0x30/*ADC_TABLE_FREQ_SECTION6*/, 2224 0x00, 0x40/*ADC_TABLE_FREQ_SECTION7*/, 2225 0x00, 0x50/*ADC_TABLE_FREQ_SECTION8*/, 2226 0x00, 0x60/*ADC_TABLE_FREQ_SECTION9*/, 2227 0x00, 0x70/*ADC_TABLE_FREQ_SECTION10*/, 2228 0x00, 0x80/*ADC_TABLE_FREQ_SECTION11*/, 2229 0x00, 0x90/*ADC_TABLE_FREQ_SECTION12*/, 2230 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION13*/, 2231 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION14*/, 2232 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION15*/, 2233 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION16*/, 2234 0x00, 0xD0/*ADC_TABLE_FREQ_SECTION17*/,}, 2235 { DRV_ADC_REG(REG_ADC_ATOP_35_L), 0x0F, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2236 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2237 0x00, 0x01/*ADC_TABLE_FREQ_SECTION3*/, 2238 0x00, 0x01/*ADC_TABLE_FREQ_SECTION4*/, 2239 0x00, 0x02/*ADC_TABLE_FREQ_SECTION5*/, 2240 0x00, 0x03/*ADC_TABLE_FREQ_SECTION6*/, 2241 0x00, 0x04/*ADC_TABLE_FREQ_SECTION7*/, 2242 0x00, 0x05/*ADC_TABLE_FREQ_SECTION8*/, 2243 0x00, 0x06/*ADC_TABLE_FREQ_SECTION9*/, 2244 0x00, 0x07/*ADC_TABLE_FREQ_SECTION10*/, 2245 0x00, 0x08/*ADC_TABLE_FREQ_SECTION11*/, 2246 0x00, 0x09/*ADC_TABLE_FREQ_SECTION12*/, 2247 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION13*/, 2248 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION14*/, 2249 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION15*/, 2250 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION16*/, 2251 0x00, 0x0D/*ADC_TABLE_FREQ_SECTION17*/,}, 2252 { DRV_ADC_REG(REG_ADC_ATOP_35_L), 0xF0, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2253 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2254 0x00, 0x10/*ADC_TABLE_FREQ_SECTION3*/, 2255 0x00, 0x10/*ADC_TABLE_FREQ_SECTION4*/, 2256 0x00, 0x20/*ADC_TABLE_FREQ_SECTION5*/, 2257 0x00, 0x30/*ADC_TABLE_FREQ_SECTION6*/, 2258 0x00, 0x40/*ADC_TABLE_FREQ_SECTION7*/, 2259 0x00, 0x50/*ADC_TABLE_FREQ_SECTION8*/, 2260 0x00, 0x60/*ADC_TABLE_FREQ_SECTION9*/, 2261 0x00, 0x70/*ADC_TABLE_FREQ_SECTION10*/, 2262 0x00, 0x80/*ADC_TABLE_FREQ_SECTION11*/, 2263 0x00, 0x90/*ADC_TABLE_FREQ_SECTION12*/, 2264 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION13*/, 2265 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION14*/, 2266 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION15*/, 2267 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION16*/, 2268 0x00, 0xD0/*ADC_TABLE_FREQ_SECTION17*/,}, 2269 { DRV_ADC_REG(REG_ADC_DTOP_17_H), 0x0F, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2270 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2271 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 2272 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 2273 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 2274 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2275 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2276 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2277 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2278 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2279 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2280 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2281 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2282 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2283 0x00, 0x00/*ADC_TABLE_FREQ_SECTION15*/, 2284 0x00, 0x00/*ADC_TABLE_FREQ_SECTION16*/, 2285 0x00, 0x00/*ADC_TABLE_FREQ_SECTION17*/,}, 2286 { DRV_ADC_REG(REG_ADC_DTOP_17_L), 0xFF, 0x00, 0x30/*ADC_TABLE_FREQ_SECTION1*/, 2287 0x00, 0x30/*ADC_TABLE_FREQ_SECTION2*/, 2288 0x00, 0x30/*ADC_TABLE_FREQ_SECTION3*/, 2289 0x00, 0x30/*ADC_TABLE_FREQ_SECTION4*/, 2290 0x00, 0x30/*ADC_TABLE_FREQ_SECTION5*/, 2291 0x00, 0x30/*ADC_TABLE_FREQ_SECTION6*/, 2292 0x00, 0x30/*ADC_TABLE_FREQ_SECTION7*/, 2293 0x00, 0x20/*ADC_TABLE_FREQ_SECTION8*/, 2294 0x00, 0x20/*ADC_TABLE_FREQ_SECTION9*/, 2295 0x00, 0x20/*ADC_TABLE_FREQ_SECTION10*/, 2296 0x00, 0x20/*ADC_TABLE_FREQ_SECTION11*/, 2297 0x00, 0x20/*ADC_TABLE_FREQ_SECTION12*/, 2298 0x00, 0x20/*ADC_TABLE_FREQ_SECTION13*/, 2299 0x00, 0x20/*ADC_TABLE_FREQ_SECTION14*/, 2300 0x00, 0x10/*ADC_TABLE_FREQ_SECTION15*/, 2301 0x00, 0x10/*ADC_TABLE_FREQ_SECTION16*/, 2302 0x00, 0x10/*ADC_TABLE_FREQ_SECTION17*/,}, 2303 { DRV_ADC_REG(REG_ADC_DTOP_18_L), 0xFF, 0x00, 0x80/*ADC_TABLE_FREQ_SECTION1*/, 2304 0x00, 0x80/*ADC_TABLE_FREQ_SECTION2*/, 2305 0x00, 0x80/*ADC_TABLE_FREQ_SECTION3*/, 2306 0x00, 0x80/*ADC_TABLE_FREQ_SECTION4*/, 2307 0x00, 0x80/*ADC_TABLE_FREQ_SECTION5*/, 2308 0x00, 0x40/*ADC_TABLE_FREQ_SECTION6*/, 2309 0x00, 0x40/*ADC_TABLE_FREQ_SECTION7*/, 2310 0x00, 0x40/*ADC_TABLE_FREQ_SECTION8*/, 2311 0x00, 0x40/*ADC_TABLE_FREQ_SECTION9*/, 2312 0x00, 0x40/*ADC_TABLE_FREQ_SECTION10*/, 2313 0x00, 0x40/*ADC_TABLE_FREQ_SECTION11*/, 2314 0x00, 0x20/*ADC_TABLE_FREQ_SECTION12*/, 2315 0x00, 0x20/*ADC_TABLE_FREQ_SECTION13*/, 2316 0x00, 0x20/*ADC_TABLE_FREQ_SECTION14*/, 2317 0x00, 0x20/*ADC_TABLE_FREQ_SECTION15*/, 2318 0x00, 0x20/*ADC_TABLE_FREQ_SECTION16*/, 2319 0x00, 0x20/*ADC_TABLE_FREQ_SECTION17*/,}, 2320 { DRV_ADC_REG(REG_ADC_DTOP_19_H), 0x60, 0x00, 0x40/*ADC_TABLE_FREQ_SECTION1*/, 2321 0x00, 0x40/*ADC_TABLE_FREQ_SECTION2*/, 2322 0x00, 0x40/*ADC_TABLE_FREQ_SECTION3*/, 2323 0x00, 0x40/*ADC_TABLE_FREQ_SECTION4*/, 2324 0x00, 0x40/*ADC_TABLE_FREQ_SECTION5*/, 2325 0x00, 0x40/*ADC_TABLE_FREQ_SECTION6*/, 2326 0x00, 0x40/*ADC_TABLE_FREQ_SECTION7*/, 2327 0x00, 0x20/*ADC_TABLE_FREQ_SECTION8*/, 2328 0x00, 0x20/*ADC_TABLE_FREQ_SECTION9*/, 2329 0x00, 0x20/*ADC_TABLE_FREQ_SECTION10*/, 2330 0x00, 0x20/*ADC_TABLE_FREQ_SECTION11*/, 2331 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2332 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2333 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2334 0x00, 0x00/*ADC_TABLE_FREQ_SECTION15*/, 2335 0x00, 0x00/*ADC_TABLE_FREQ_SECTION16*/, 2336 0x00, 0x00/*ADC_TABLE_FREQ_SECTION17*/,}, 2337 { DRV_ADC_REG(REG_ADC_ATOP_0D_L), 0x10, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2338 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2339 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 2340 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 2341 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 2342 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2343 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2344 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2345 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2346 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2347 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2348 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2349 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2350 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2351 0x00, 0x10/*ADC_TABLE_FREQ_SECTION15*/, 2352 0x00, 0x10/*ADC_TABLE_FREQ_SECTION16*/, 2353 0x00, 0x10/*ADC_TABLE_FREQ_SECTION17*/,}, 2354 { DRV_ADC_REG(REG_ADC_ATOP_0C_L), 0x07, 0x00, 0x01/*ADC_TABLE_FREQ_SECTION1*/, 2355 0x00, 0x01/*ADC_TABLE_FREQ_SECTION2*/, 2356 0x00, 0x01/*ADC_TABLE_FREQ_SECTION3*/, 2357 0x00, 0x01/*ADC_TABLE_FREQ_SECTION4*/, 2358 0x00, 0x01/*ADC_TABLE_FREQ_SECTION5*/, 2359 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2360 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2361 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2362 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2363 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2364 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2365 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2366 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2367 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2368 0x00, 0x00/*ADC_TABLE_FREQ_SECTION15*/, 2369 0x00, 0x00/*ADC_TABLE_FREQ_SECTION16*/, 2370 0x00, 0x00/*ADC_TABLE_FREQ_SECTION17*/,}, 2371 { DRV_ADC_REG(REG_ADC_ATOP_09_H), 0x18, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2372 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2373 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 2374 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 2375 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 2376 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2377 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2378 0x00, 0x08/*ADC_TABLE_FREQ_SECTION8*/, 2379 0x00, 0x08/*ADC_TABLE_FREQ_SECTION9*/, 2380 0x00, 0x08/*ADC_TABLE_FREQ_SECTION10*/, 2381 0x00, 0x08/*ADC_TABLE_FREQ_SECTION11*/, 2382 0x00, 0x10/*ADC_TABLE_FREQ_SECTION12*/, 2383 0x00, 0x10/*ADC_TABLE_FREQ_SECTION13*/, 2384 0x00, 0x10/*ADC_TABLE_FREQ_SECTION14*/, 2385 0x00, 0x18/*ADC_TABLE_FREQ_SECTION15*/, 2386 0x00, 0x18/*ADC_TABLE_FREQ_SECTION16*/, 2387 0x00, 0x18/*ADC_TABLE_FREQ_SECTION17*/,}, 2388 { DRV_ADC_REG(REG_ADC_ATOP_0A_L), 0x04, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2389 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2390 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 2391 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 2392 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 2393 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2394 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2395 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2396 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2397 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2398 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2399 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2400 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2401 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2402 0x00, 0x04/*ADC_TABLE_FREQ_SECTION15*/, 2403 0x00, 0x04/*ADC_TABLE_FREQ_SECTION16*/, 2404 0x00, 0x04/*ADC_TABLE_FREQ_SECTION17*/,}, 2405 { DRV_ADC_REG(REG_ADC_ATOP_61_H), 0x60, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2406 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2407 0x00, 0x00/*ADC_TABLE_FREQ_SECTION3*/, 2408 0x00, 0x00/*ADC_TABLE_FREQ_SECTION4*/, 2409 0x00, 0x00/*ADC_TABLE_FREQ_SECTION5*/, 2410 0x00, 0x00/*ADC_TABLE_FREQ_SECTION6*/, 2411 0x00, 0x00/*ADC_TABLE_FREQ_SECTION7*/, 2412 0x00, 0x00/*ADC_TABLE_FREQ_SECTION8*/, 2413 0x00, 0x00/*ADC_TABLE_FREQ_SECTION9*/, 2414 0x00, 0x00/*ADC_TABLE_FREQ_SECTION10*/, 2415 0x00, 0x00/*ADC_TABLE_FREQ_SECTION11*/, 2416 0x00, 0x00/*ADC_TABLE_FREQ_SECTION12*/, 2417 0x00, 0x00/*ADC_TABLE_FREQ_SECTION13*/, 2418 0x00, 0x00/*ADC_TABLE_FREQ_SECTION14*/, 2419 0x00, 0x20/*ADC_TABLE_FREQ_SECTION15*/, 2420 0x00, 0x20/*ADC_TABLE_FREQ_SECTION16*/, 2421 0x00, 0x20/*ADC_TABLE_FREQ_SECTION17*/,}, 2422 { DRV_ADC_REG(REG_ADC_ATOP_09_H), 0x07, 0x00, 0x02/*ADC_TABLE_FREQ_SECTION1*/, 2423 0x00, 0x02/*ADC_TABLE_FREQ_SECTION2*/, 2424 0x00, 0x02/*ADC_TABLE_FREQ_SECTION3*/, 2425 0x00, 0x02/*ADC_TABLE_FREQ_SECTION4*/, 2426 0x00, 0x02/*ADC_TABLE_FREQ_SECTION5*/, 2427 0x00, 0x01/*ADC_TABLE_FREQ_SECTION6*/, 2428 0x00, 0x01/*ADC_TABLE_FREQ_SECTION7*/, 2429 0x00, 0x02/*ADC_TABLE_FREQ_SECTION8*/, 2430 0x00, 0x02/*ADC_TABLE_FREQ_SECTION9*/, 2431 0x00, 0x02/*ADC_TABLE_FREQ_SECTION10*/, 2432 0x00, 0x02/*ADC_TABLE_FREQ_SECTION11*/, 2433 0x00, 0x04/*ADC_TABLE_FREQ_SECTION12*/, 2434 0x00, 0x04/*ADC_TABLE_FREQ_SECTION13*/, 2435 0x00, 0x04/*ADC_TABLE_FREQ_SECTION14*/, 2436 0x00, 0x06/*ADC_TABLE_FREQ_SECTION15*/, 2437 0x00, 0x06/*ADC_TABLE_FREQ_SECTION16*/, 2438 0x00, 0x06/*ADC_TABLE_FREQ_SECTION17*/,}, 2439 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 2440 }; 2441 2442 MS_U8 MST_ADCSetModeYUV_Y_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_SetMode_NUMS*REG_DATA_SIZE]= 2443 { // Reg Mask Ignore Value 2444 { DRV_ADC_REG(REG_ADC_ATOP_34_H), 0x0F, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2445 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2446 0x00, 0x01/*ADC_TABLE_FREQ_SECTION3*/, 2447 0x00, 0x01/*ADC_TABLE_FREQ_SECTION4*/, 2448 0x00, 0x02/*ADC_TABLE_FREQ_SECTION5*/, 2449 0x00, 0x03/*ADC_TABLE_FREQ_SECTION6*/, 2450 0x00, 0x04/*ADC_TABLE_FREQ_SECTION7*/, 2451 0x00, 0x05/*ADC_TABLE_FREQ_SECTION8*/, 2452 0x00, 0x06/*ADC_TABLE_FREQ_SECTION9*/, 2453 0x00, 0x07/*ADC_TABLE_FREQ_SECTION10*/, 2454 0x00, 0x08/*ADC_TABLE_FREQ_SECTION11*/, 2455 0x00, 0x09/*ADC_TABLE_FREQ_SECTION12*/, 2456 0x00, 0x0A/*ADC_TABLE_FREQ_SECTION13*/, 2457 0x00, 0x0B/*ADC_TABLE_FREQ_SECTION14*/, 2458 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION15*/, 2459 0x00, 0x0C/*ADC_TABLE_FREQ_SECTION16*/, 2460 0x00, 0x0D/*ADC_TABLE_FREQ_SECTION17*/,}, 2461 { DRV_ADC_REG(REG_ADC_ATOP_34_H), 0xF0, 0x00, 0x00/*ADC_TABLE_FREQ_SECTION1*/, 2462 0x00, 0x00/*ADC_TABLE_FREQ_SECTION2*/, 2463 0x00, 0x10/*ADC_TABLE_FREQ_SECTION3*/, 2464 0x00, 0x10/*ADC_TABLE_FREQ_SECTION4*/, 2465 0x00, 0x20/*ADC_TABLE_FREQ_SECTION5*/, 2466 0x00, 0x30/*ADC_TABLE_FREQ_SECTION6*/, 2467 0x00, 0x40/*ADC_TABLE_FREQ_SECTION7*/, 2468 0x00, 0x50/*ADC_TABLE_FREQ_SECTION8*/, 2469 0x00, 0x60/*ADC_TABLE_FREQ_SECTION9*/, 2470 0x00, 0x70/*ADC_TABLE_FREQ_SECTION10*/, 2471 0x00, 0x80/*ADC_TABLE_FREQ_SECTION11*/, 2472 0x00, 0x90/*ADC_TABLE_FREQ_SECTION12*/, 2473 0x00, 0xA0/*ADC_TABLE_FREQ_SECTION13*/, 2474 0x00, 0xB0/*ADC_TABLE_FREQ_SECTION14*/, 2475 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION15*/, 2476 0x00, 0xC0/*ADC_TABLE_FREQ_SECTION16*/, 2477 0x00, 0xD0/*ADC_TABLE_FREQ_SECTION17*/,}, 2478 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 2479 }; 2480 2481 //**************************************************** 2482 // CVBSO 2483 //**************************************************** 2484 MS_U8 MST_ADCCVBSO_TBL1[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_CVBSO_NUMS*REG_DATA_SIZE]= 2485 { // Reg Mask Ignore Value 2486 { DRV_ADC_REG(REG_ADC_ATOP_4C_L), 0xFF, 0x01, 0x00/*$OFF*/, 2487 0x00, 0x21/*$SV_ON*/, 2488 0x00, 0x21/*$SV_OFF*/, 2489 0x01, 0x00/*$CVBS_ON*/, 2490 0x01, 0x00/*$CVBS_OFF*/, 2491 0x01, 0x00/*$VIF_DAC*/, 2492 0x01, 0x00/*$VIF_VIF*/, }, 2493 { DRV_ADC_REG(REG_ADC_ATOP_4C_H), 0x7F, 0x01, 0x00/*$OFF*/, 2494 0x00, 0x0A/*$SV_ON*/, 2495 0x00, 0x06/*$SV_OFF*/, 2496 0x01, 0x00/*$CVBS_ON*/, 2497 0x01, 0x00/*$CVBS_OFF*/, 2498 0x01, 0x00/*$VIF_DAC*/, 2499 0x01, 0x00/*$VIF_VIF*/, }, 2500 { DRV_ADC_REG(REG_ADC_ATOP_4D_L), 0x0F, 0x01, 0x00/*$OFF*/, 2501 0x00, 0x00/*$SV_ON*/, 2502 0x00, 0x00/*$SV_OFF*/, 2503 0x01, 0x00/*$CVBS_ON*/, 2504 0x01, 0x00/*$CVBS_OFF*/, 2505 0x01, 0x00/*$VIF_DAC*/, 2506 0x01, 0x00/*$VIF_VIF*/, }, 2507 { DRV_ADC_REG(REG_ADC_ATOP_48_L), 0x4F, 0x00, 0x40/*$OFF*/, 2508 0x00, 0x48/*$SV_ON*/, 2509 0x00, 0x48/*$SV_OFF*/, 2510 0x00, 0x48/*$CVBS_ON*/, 2511 0x00, 0x48/*$CVBS_OFF*/, 2512 0x00, 0x08/*$VIF_DAC*/, 2513 0x00, 0x48/*$VIF_VIF*/, }, 2514 { DRV_ADC_REG(REG_ADC_ATOPB_00_L), 0x10, 0x00, 0x00/*$OFF*/, 2515 0x00, 0x10/*$SV_ON*/, 2516 0x00, 0x10/*$SV_OFF*/, 2517 0x00, 0x10/*$CVBS_ON*/, 2518 0x00, 0x10/*$CVBS_OFF*/, 2519 0x00, 0x10/*$VIF_DAC*/, 2520 0x00, 0x10/*$VIF_VIF*/, }, 2521 { DRV_ADC_REG(REG_ADC_ATOP_51_H), 0x07, 0x01, 0x00/*$OFF*/, 2522 0x00, 0x04/*$SV_ON*/, 2523 0x00, 0x04/*$SV_OFF*/, 2524 0x00, 0x04/*$CVBS_ON*/, 2525 0x00, 0x04/*$CVBS_OFF*/, 2526 0x00, 0x04/*$VIF_DAC*/, 2527 0x00, 0x04/*$VIF_VIF*/, }, 2528 { DRV_ADC_REG(REG_ADC_ATOP_50_L), 0xEF, 0x01, 0x00/*$OFF*/, 2529 0x00, 0x82/*$SV_ON*/, 2530 0x00, 0x80/*$SV_OFF*/, 2531 0x00, 0x02/*$CVBS_ON*/, 2532 0x00, 0x00/*$CVBS_OFF*/, 2533 0x00, 0x02/*$VIF_DAC*/, 2534 0x00, 0x02/*$VIF_VIF*/, }, 2535 { DRV_ADC_REG(REG_ADC_ATOP_50_H), 0x01, 0x01, 0x00/*OFF*/, 2536 0x01, 0x00/*SV_ON*/, 2537 0x00, 0x01/*SV_OFF*/, 2538 0x01, 0x00/*CVBS_ON*/, 2539 0x00, 0x00/*CVBS_OFF*/, 2540 0x01, 0x00/*VIF_DAC*/, 2541 0x01, 0x00/*VIF_VIF*/, }, 2542 { DRV_ADC_REG(REG_ADC_ATOP_4E_L), 0x04, 0x01, 0x00/*OFF*/, 2543 0x00, 0x00/*SV_ON*/, 2544 0x00, 0x00/*SV_OFF*/, 2545 0x00, 0x00/*CVBS_ON*/, 2546 0x00, 0x00/*CVBS_OFF*/, 2547 0x00, 0x00/*VIF_DAC*/, 2548 0x00, 0x00/*VIF_VIF*/, }, 2549 { DRV_ADC_REG(REG_ADC_AFEC_7A_L), 0xE0, 0x01, 0x00/*$OFF*/, 2550 0x00, 0xE0/*$SV_ON*/, 2551 0x01, 0x00/*$SV_OFF*/, 2552 0x00, 0xA0/*$CVBS_ON*/, 2553 0x01, 0x00/*$CVBS_OFF*/, 2554 0x01, 0x00/*$VIF_DAC*/, 2555 0x01, 0x00/*$VIF_VIF*/, }, 2556 { DRV_ADC_REG(REG_ADC_COMB_47_L), 0xC0, 0x01, 0x00/*$OFF*/, 2557 0x00, 0xC0/*$SV_ON*/, 2558 0x01, 0x00/*$SV_OFF*/, 2559 0x00, 0xC0/*$CVBS_ON*/, 2560 0x01, 0x00/*$CVBS_OFF*/, 2561 0x01, 0x00/*$VIF_DAC*/, 2562 0x01, 0x00/*$VIF_VIF*/, }, 2563 { DRV_ADC_REG(REG_ADC_CHIPTOP_12_H), 0x01, 0x01, 0x00/*$OFF*/, 2564 0x00, 0x01/*$SV_ON*/, 2565 0x01, 0x00/*$SV_OFF*/, 2566 0x00, 0x01/*$CVBS_ON*/, 2567 0x01, 0x00/*$CVBS_OFF*/, 2568 0x01, 0x00/*$VIF_DAC*/, 2569 0x00, 0x00/*$VIF_VIF*/, }, 2570 { DRV_ADC_REG(REG_ADC_CLKGEN0_26_L), 0x1F, 0x01, 0x00/*$OFF*/, 2571 0x00, 0x0C/*$SV_ON*/, 2572 0x01, 0x00/*$SV_OFF*/, 2573 0x00, 0x0C/*$CVBS_ON*/, 2574 0x01, 0x00/*$CVBS_OFF*/, 2575 0x01, 0x00/*$VIF_DAC*/, 2576 0x00, 0x00/*$VIF_VIF*/, }, 2577 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 2578 }; 2579 2580 MS_U8 MST_ADCCVBSO_TBL2[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_CVBSO_NUMS*REG_DATA_SIZE]= 2581 { // Reg Mask Ignore Value 2582 { DRV_ADC_REG(REG_ADC_ATOP_4C_L), 0xFF, 0x01, 0x00/*$OFF*/, 2583 0x00, 0x21/*$SV_ON*/, 2584 0x00, 0x21/*$SV_OFF*/, 2585 0x01, 0x00/*$CVBS_ON*/, 2586 0x01, 0x00/*$CVBS_OFF*/, 2587 0x01, 0x00/*$VIF_DAC*/, 2588 0x01, 0x00/*$VIF_VIF*/, }, 2589 { DRV_ADC_REG(REG_ADC_ATOP_4C_H), 0x7F, 0x01, 0x00/*$OFF*/, 2590 0x00, 0x0A/*$SV_ON*/, 2591 0x00, 0x07/*$SV_OFF*/, 2592 0x01, 0x00/*$CVBS_ON*/, 2593 0x01, 0x00/*$CVBS_OFF*/, 2594 0x01, 0x00/*$VIF_DAC*/, 2595 0x01, 0x00/*$VIF_VIF*/, }, 2596 { DRV_ADC_REG(REG_ADC_ATOP_4D_L), 0x0F, 0x01, 0x00/*$OFF*/, 2597 0x00, 0x00/*$SV_ON*/, 2598 0x00, 0x00/*$SV_OFF*/, 2599 0x01, 0x00/*$CVBS_ON*/, 2600 0x01, 0x00/*$CVBS_OFF*/, 2601 0x01, 0x00/*$VIF_DAC*/, 2602 0x01, 0x00/*$VIF_VIF*/, }, 2603 { DRV_ADC_REG(REG_ADC_ATOP_49_L), 0x4F, 0x00, 0x40/*$OFF*/, 2604 0x00, 0x48/*$SV_ON*/, 2605 0x00, 0x48/*$SV_OFF*/, 2606 0x00, 0x48/*$CVBS_ON*/, 2607 0x00, 0x48/*$CVBS_OFF*/, 2608 0x00, 0x08/*$VIF_DAC*/, 2609 0x00, 0x48/*$VIF_VIF*/, }, 2610 { DRV_ADC_REG(REG_ADC_ATOP_53_H), 0x07, 0x01, 0x00/*$OFF*/, 2611 0x00, 0x40/*$SV_ON*/, 2612 0x00, 0x40/*$SV_OFF*/, 2613 0x00, 0x40/*$CVBS_ON*/, 2614 0x00, 0x40/*$CVBS_OFF*/, 2615 0x00, 0x00/*$VIF_DAC*/, 2616 0x00, 0x40/*$VIF_VIF*/, }, 2617 { DRV_ADC_REG(REG_ADC_ATOP_52_L), 0xEF, 0x01, 0x00/*$OFF*/, 2618 0x00, 0x82/*$SV_ON*/, 2619 0x00, 0x80/*$SV_OFF*/, 2620 0x00, 0x02/*$CVBS_ON*/, 2621 0x00, 0x00/*$CVBS_OFF*/, 2622 0x00, 0x02/*$VIF_DAC*/, 2623 0x00, 0x02/*$VIF_VIF*/, }, 2624 { DRV_ADC_REG(REG_ADC_ATOP_52_H), 0x01, 0x01, 0x00/*OFF*/, 2625 0x01, 0x00/*SV_ON*/, 2626 0x00, 0x01/*SV_OFF*/, 2627 0x01, 0x00/*CVBS_ON*/, 2628 0x00, 0x00/*CVBS_OFF*/, 2629 0x01, 0x00/*VIF_DAC*/, 2630 0x01, 0x00/*VIF_VIF*/, }, 2631 { DRV_ADC_REG(REG_ADC_ATOP_4F_L), 0x04, 0x01, 0x00/*OFF*/, 2632 0x00, 0x00/*SV_ON*/, 2633 0x00, 0x00/*SV_OFF*/, 2634 0x00, 0x00/*CVBS_ON*/, 2635 0x00, 0x00/*CVBS_OFF*/, 2636 0x00, 0x00/*VIF_DAC*/, 2637 0x00, 0x00/*VIF_VIF*/, }, 2638 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 2639 }; 2640 2641 //**************************************************** 2642 // CVBSOX 2643 //**************************************************** 2644 MS_U8 MST_ADCCVBSOX_TBL[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_CVBSOX_NUMS*REG_DATA_SIZE]= 2645 { // Reg Mask Ignore Value 2646 { DRV_ADC_REG(REG_ADC_ATOP_05_H), 0x30, 0x00, 0x00/*$ADCX_ON*/, 2647 0x00, 0x30/*$ADCX_OFF*/, }, 2648 { DRV_ADC_REG(REG_ADC_ATOP_03_L), 0x40, 0x00, 0x40/*ADCX_ON*/, 2649 0x01, 0x00/*ADCX_OFF*/, }, 2650 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x80, 0x00, 0x80/*ADCX_ON*/, 2651 0x00, 0x00/*ADCX_OFF*/, }, 2652 { DRV_ADC_REG(REG_ADC_ATOP_00_H), 0x30, 0x00, 0x10/*ADCX_ON*/, 2653 0x01, 0x00/*ADCX_OFF*/, }, 2654 { DRV_ADC_REG(REG_ADC_ATOP_05_L), 0xC0, 0x00, 0x00/*$ADCX_ON*/, 2655 0x00, 0xC0/*$ADCX_OFF*/, }, 2656 { DRV_ADC_REG(REG_ADC_ATOP_38_H), 0x01, 0x00, 0x01/*ADCX_ON*/, 2657 0x00, 0x00/*ADCX_OFF*/, }, 2658 { DRV_ADC_REG(REG_ADC_ATOP_03_H), 0x0C, 0x00, 0x0C/*$ADCX_ON*/, 2659 0x00, 0x00/*$ADCX_OFF*/, }, 2660 { DRV_ADC_REG(REG_ADC_ATOP_5E_L), 0x02, 0x00, 0x00/*ADCX_ON*/, 2661 0x00, 0x20/*ADCX_OFF*/, }, 2662 { DRV_ADC_REG(REG_ADC_DTOP_66_L), 0x0F, 0x00, 0x04/*ADCX_ON*/, 2663 0x01, 0x00/*ADCX_OFF*/, }, 2664 { DRV_ADC_REG(REG_ADC_ATOP_08_L), 0x01, 0x00, 0x00/*ADCX_ON*/, 2665 0x00, 0x01/*ADCX_OFF*/, }, 2666 { DRV_ADC_REG(REG_ADC_ATOPB_40_L), 0xFF, 0x00, 0x80/*ADCX_ON*/, 2667 0x01, 0x00/*ADCX_OFF*/, }, 2668 { DRV_ADC_REG(REG_ADC_ATOPB_40_H), 0x7F, 0x00, 0x00/*$ADCX_ON*/, 2669 0x01, 0x00/*$ADCX_OFF*/, }, 2670 { DRV_ADC_REG(REG_ADC_ATOPB_41_L), 0xFF, 0x00, 0x96/*ADCX_ON*/, 2671 0x01, 0x00/*ADCX_OFF*/, }, 2672 { DRV_ADC_REG(REG_ADC_ATOPB_41_H), 0x3F, 0x00, 0x17/*ADCX_ON*/, 2673 0x01, 0x00/*ADCX_OFF*/, }, 2674 { DRV_ADC_REG(REG_ADC_ATOPB_42_L), 0xFF, 0x00, 0x00/*ADCX_ON*/, 2675 0x00, 0x00/*ADCX_OFF*/, }, 2676 { DRV_ADC_REG(REG_ADC_ATOPB_42_H), 0x7F, 0x00, 0x00/*$ADCX_ON*/, 2677 0x00, 0x00/*$ADCX_OFF*/, }, 2678 { DRV_ADC_REG(REG_ADC_DTOP_67_L), 0xFF, 0x00, 0xD7/*$ADCX_ON*/, 2679 0x01, 0x00/*$ADCX_OFF*/, }, 2680 { DRV_ADC_REG(REG_ADC_DTOP_67_H), 0x03, 0x00, 0x03/*ADCX_ON*/, 2681 0x00, 0x00/*ADCX_OFF*/, }, 2682 { DRV_ADC_REG(REG_ADC_ATOP_6B_H), 0x0E, 0x00, 0x0C/*$ADCX_ON*/, 2683 0x00, 0x00/*$ADCX_OFF*/, }, 2684 { DRV_ADC_REG(REG_ADC_ATOP_48_H), 0x80, 0x00, 0x80/*ADCX_ON*/, 2685 0x00, 0x00/*ADCX_OFF*/, }, 2686 { DRV_ADC_REG(REG_ADC_ATOP_4A_H), 0x30, 0x00, 0x30/*$ADCX_ON*/, 2687 0x00, 0x00/*$ADCX_OFF*/, }, 2688 { DRV_ADC_REG(REG_ADC_ATOP_48_L), 0x4F, 0x00, 0x0E/*$ADCX_ON*/, 2689 0x00, 0x40/*$ADCX_OFF*/, }, 2690 { DRV_ADC_REG(REG_ADC_ATOPB_00_L), 0x10, 0x00, 0x10/*ADCX_ON*/, 2691 0x00, 0x00/*ADCX_OFF*/, }, 2692 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 2693 }; 2694 2695 //**************************************************** 2696 // CVBSO_MUX 2697 //**************************************************** 2698 MS_U8 MST_ADCCVBSO_MUX_TBL1[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_CVBSO_MUX_NUMS*REG_DATA_SIZE]= 2699 { // Reg Mask Ignore Value 2700 { DRV_ADC_REG(REG_ADC_ATOP_51_L), 0x0F, 0x00, 0x00/*CVBS0*/, 2701 0x00, 0x01/*CVBS1*/, 2702 0x00, 0x02/*CVBS2*/, 2703 0x00, 0x03/*CVBS3*/, 2704 0x00, 0x0B/*SV_ON*/, 2705 0x00, 0x0B/*SV_OFF*/, 2706 0x00, 0x0F/*DAC*/, 2707 0x00, 0x08/*R0*/, 2708 0x00, 0x09/*R1*/, 2709 0x00, 0x0A/*R2*/, 2710 0x00, 0x0C/*G0*/, 2711 0x00, 0x0D/*G1*/, 2712 0x00, 0x0E/*G2*/, }, 2713 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 2714 }; 2715 2716 MS_U8 MST_ADCCVBSO_MUX_TBL2[][REG_ADDR_SIZE+REG_MASK_SIZE+ADC_TABLE_CVBSO_MUX_NUMS*REG_DATA_SIZE]= 2717 { // Reg Mask Ignore Value 2718 { DRV_ADC_REG(REG_ADC_ATOP_53_L), 0x0F, 0x00, 0x00/*CVBS0*/, 2719 0x00, 0x01/*CVBS1*/, 2720 0x00, 0x02/*CVBS2*/, 2721 0x00, 0x03/*CVBS3*/, 2722 0x00, 0x0B/*SV_ON*/, 2723 0x00, 0x0B/*SV_OFF*/, 2724 0x00, 0x0F/*DAC*/, 2725 0x00, 0x08/*R0*/, 2726 0x00, 0x09/*R1*/, 2727 0x00, 0x0A/*R2*/, 2728 0x00, 0x0C/*G0*/, 2729 0x00, 0x0D/*G1*/, 2730 0x00, 0x0E/*G2*/, }, 2731 { DRV_ADC_REG(REG_TABLE_END), 0x00, 0x00, 0x00 } 2732 }; 2733 2734 //**************************************************** 2735 // PowerDown 2736 //**************************************************** 2737 2738 #endif 2739