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Searched refs:REG_ADC_ATOP_02_H (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0xF0, 0x00, 0x80/*$All*/, },
452 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
2650 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x80, 0x00, 0x80/*ADCX_ON*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0xF0, 0x00, 0x80/*$All*/, },
452 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
2650 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x80, 0x00, 0x80/*ADCX_ON*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0xF0, 0x00, 0x80/*$All*/, },
452 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
2650 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x80, 0x00, 0x80/*ADCX_ON*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0xF0, 0x00, 0x80/*$All*/, },
455 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
2699 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x80, 0x00, 0x80/*ADCX_ON*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0xF0, 0x00, 0x80/*$All*/, },
452 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
2650 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x80, 0x00, 0x80/*ADCX_ON*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0xF0, 0x00, 0x80/*$All*/, },
452 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
2650 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x80, 0x00, 0x80/*ADCX_ON*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0xF0, 0x00, 0x80/*$All*/, },
455 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
2699 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x80, 0x00, 0x80/*ADCX_ON*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x70, 0x00, 0x00/*$All*/, },
390 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x70, 0x00, 0x00/*$All*/, },
390 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x70, 0x00, 0x00/*$All*/, },
390 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_adctbl.c31 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x70, 0x00, 0x00/*$All*/, },
387 { DRV_ADC_REG(REG_ADC_ATOP_02_H), 0x0B, 0x00, 0x00/*$RGB*/,
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_adc_atop.h110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) macro

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