| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_frc.c | 509 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in MHal_FRC_get_miu1mask()
533 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in MHal_FRC_set_miu1mask()
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| H A D | mhal_sc.c | 2764 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in Hal_SC_get_miu1mask()
2804 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in Hal_SC_set_miu1mask()
2805 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG6Mask); in Hal_SC_set_miu1mask()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | mhal_xc_chip_config.h | 957 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | mhal_xc_chip_config.h | 963 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | mhal_xc_chip_config.h | 973 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | mhal_xc_chip_config.h | 967 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| H A D | mhal_xc_chip_config.h.0 | 966 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | mhal_xc_chip_config.h | 987 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | mhal_xc_chip_config.h | 1103 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | mhal_xc_chip_config.h | 1058 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | mhal_xc_chip_config.h | 1115 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | mhal_xc_chip_config.h | 1052 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | mhal_xc_chip_config.h | 1120 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | mhal_xc_chip_config.h | 1107 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_frc.c | 687 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in MHal_FRC_get_miu1mask()
711 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in MHal_FRC_set_miu1mask()
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| H A D | mhal_sc.c | 3125 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in Hal_SC_get_miu1mask()
3150 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in Hal_SC_set_miu1mask()
3151 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG6Mask); in Hal_SC_set_miu1mask()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_frc.c | 670 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in MHal_FRC_get_miu1mask()
694 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in MHal_FRC_set_miu1mask()
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| H A D | mhal_sc.c | 3105 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in Hal_SC_get_miu1mask()
3130 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in Hal_SC_set_miu1mask()
3131 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG6Mask); in Hal_SC_set_miu1mask()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_frc.c | 648 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in MHal_FRC_get_miu1mask()
672 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in MHal_FRC_set_miu1mask()
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| H A D | mhal_sc.c | 3148 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in Hal_SC_get_miu1mask()
3188 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in Hal_SC_set_miu1mask()
3189 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG6Mask); in Hal_SC_set_miu1mask()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_frc.c | 648 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in MHal_FRC_get_miu1mask()
672 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in MHal_FRC_set_miu1mask()
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| H A D | mhal_sc.c | 3148 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in Hal_SC_get_miu1mask()
3188 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in Hal_SC_set_miu1mask()
3189 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG6Mask); in Hal_SC_set_miu1mask()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_sc.c | 2484 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in Hal_SC_get_miu1mask()
2524 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in Hal_SC_set_miu1mask()
2525 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG6Mask); in Hal_SC_set_miu1mask()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_sc.c | 2401 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in Hal_SC_get_miu1mask()
2423 MDrv_Write2Byte(MIU1_G5_REQUEST_MASK, mask.u16MiuG5Mask); in Hal_SC_set_miu1mask()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_sc.c | 2236 mask.u16MiuG5Mask = MDrv_Read2Byte(MIU1_G5_REQUEST_MASK); in Hal_SC_get_miu1mask()
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