Home
last modified time | relevance | path

Searched refs:HVD_REG_RESET_SWRST (Results 1 – 25 of 68) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/hvd/
H A DhalHVD_sub.c656 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SVD_Release()
822 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SwCPURst()
2163 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_Sub_DeInit()
H A DhalHVD.c669 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_SVD_Release()
835 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_SwCPURst()
2372 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_DeInit()
H A DregHVD.h225 #define HVD_REG_RESET_SWRST BIT(0) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/hvd/
H A DhalHVD_sub.c656 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SVD_Release()
822 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SwCPURst()
2163 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_Sub_DeInit()
H A DhalHVD.c669 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_SVD_Release()
835 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_SwCPURst()
2372 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_DeInit()
H A DregHVD.h225 #define HVD_REG_RESET_SWRST BIT(0) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/hvd/
H A DhalHVD_sub.c656 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SVD_Release()
822 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SwCPURst()
2163 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_Sub_DeInit()
H A DhalHVD.c669 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_SVD_Release()
835 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_SwCPURst()
2372 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_DeInit()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/hvd/
H A DhalHVD_sub.c656 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SVD_Release()
822 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SwCPURst()
2163 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_Sub_DeInit()
H A DhalHVD.c669 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_SVD_Release()
835 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_SwCPURst()
2372 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_DeInit()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/hvd/
H A DhalHVD_sub.c656 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SVD_Release()
822 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SwCPURst()
2163 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_Sub_DeInit()
H A DhalHVD.c669 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_SVD_Release()
835 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_SwCPURst()
2372 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_DeInit()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/hvd/
H A DhalHVD_sub.c656 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SVD_Release()
822 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_Sub_SwCPURst()
2163 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_Sub_DeInit()
H A DhalHVD.c669 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in _HAL_SVD_Release()
835 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in _HAL_HVD_SwCPURst()
2372 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST , HVD_REG_RESET_SWRST); in HAL_HVD_DeInit()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/hvd_ex/
H A DhalHVD_EX.c2249 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2374 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2397 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/hvd_ex/
H A DhalHVD_EX.c2282 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2428 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2453 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/hvd_ex/
H A DhalHVD_EX.c2249 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2374 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2397 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/hvd_ex/
H A DhalHVD_EX.c2249 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2374 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2397 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/hvd_ex/
H A DhalHVD_EX.c2282 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2428 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2453 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/hvd_ex/
H A DhalHVD_EX.c2249 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2374 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2397 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/hvd_ex/
H A DhalHVD_EX.c2249 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2374 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2397 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/hvd_ex/
H A DhalHVD_EX.c2249 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2374 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2397 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/hvd_ex/
H A DhalHVD_EX.c2249 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2374 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2397 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/hvd_ex/
H A DhalHVD_EX.c2249 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2374 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
2397 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/hvd_v3/
H A DhalHVD_EX.c3344 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
3537 _HVD_WriteWordMask(HVD_REG_RESET, 0, HVD_REG_RESET_SWRST); in HAL_HVD_EX_InitHW()
3575 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_SWRST, HVD_REG_RESET_SWRST); in HAL_HVD_EX_DeinitHW()

123