Home
last modified time | relevance | path

Searched refs:HAL_MIU_WriteRegBit (Results 1 – 25 of 35) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/miu/hal/maldives/miu/
H A DhalMIU.h141 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
143 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
144 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
145 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
147 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
149 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
151 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
152 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
159 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
161 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
H A DhalMIU.c628 MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable) in HAL_MIU_WriteRegBit() function
1062 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_Protect()
1089 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_Protect()
/utopia/UTPA2-700.0.x/modules/miu/hal/mooney/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_Write…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_Write…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
/utopia/UTPA2-700.0.x/modules/miu/hal/kano/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
H A DhalMIU.c629 MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable) in HAL_MIU_WriteRegBit() function
1139 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_Protect()
1166 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_Protect()
1311 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_ProtectEx()
1338 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_ProtectEx()
/utopia/UTPA2-700.0.x/modules/miu/hal/k6/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
H A DhalMIU.c630 MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable) in HAL_MIU_WriteRegBit() function
1140 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_Protect()
1167 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_Protect()
1312 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_ProtectEx()
1339 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_ProtectEx()
/utopia/UTPA2-700.0.x/modules/miu/hal/macan/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
/utopia/UTPA2-700.0.x/modules/miu/hal/curry/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
H A DhalMIU.c473 MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable) in HAL_MIU_WriteRegBit() function
853 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_Protect()
880 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_Protect()
/utopia/UTPA2-700.0.x/modules/miu/hal/M7621/miu/
H A DhalMIU.h141 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
143 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
144 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
145 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
147 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
149 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
151 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
152 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
159 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
161 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
H A DhalMIU.c619 MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable) in HAL_MIU_WriteRegBit() function
1108 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_Protect()
1132 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_Protect()
/utopia/UTPA2-700.0.x/modules/miu/hal/manhattan/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
/utopia/UTPA2-700.0.x/modules/miu/hal/k6lite/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
H A DhalMIU.c629 MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable) in HAL_MIU_WriteRegBit() function
1139 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_Protect()
1166 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_Protect()
1311 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_ProtectEx()
1338 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_ProtectEx()
/utopia/UTPA2-700.0.x/modules/miu/hal/messi/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_Write…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_Write…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
/utopia/UTPA2-700.0.x/modules/miu/hal/M7821/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
/utopia/UTPA2-700.0.x/modules/miu/hal/k7u/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
H A DhalMIU.c630 MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable) in HAL_MIU_WriteRegBit() function
1140 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_Protect()
1167 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_Protect()
1312 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_ProtectEx()
1339 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_ProtectEx()
/utopia/UTPA2-700.0.x/modules/miu/hal/mustang/miu/
H A DhalMIU.h141 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
143 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
144 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
145 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
147 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
149 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
151 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
152 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
159 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
161 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
H A DhalMIU.c628 MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable) in HAL_MIU_WriteRegBit() function
1146 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_Protect()
1173 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_Protect()
1318 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_ProtectEx()
1345 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_ProtectEx()
/utopia/UTPA2-700.0.x/modules/miu/hal/mainz/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_Write…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_Write…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
/utopia/UTPA2-700.0.x/modules/miu/hal/maserati/miu/
H A DhalMIU.h143 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
145 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
146 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
147 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
149 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
151 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
153 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
154 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
161 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
163 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
/utopia/UTPA2-700.0.x/modules/miu/hal/maxim/miu/
H A DhalMIU.h141 #define _MaskMiuReq_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
143 #define _MaskMiuReq_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
144 #define _MaskMiuReq_DNRB_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT3)
145 #define _MaskMiuReq_DNRB_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2|BIT3)
147 #define _MaskMiuReq_SC_RW( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1|BIT2|BIT3)
149 #define _MaskMiuReq_MVOP_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1L_MASK, m, BIT3)
151 #define _MaskMiuReq_MVD_R( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
152 #define _MaskMiuReq_MVD_W( m ) do { HAL_MIU_WriteRegBit(MIU_RQ3L_MASK, m, BIT4); HAL_MIU_WriteR…
159 #define _MaskMiu1Req_OPM_R( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT1)
161 #define _MaskMiu1Req_DNRB_W( m ) HAL_MIU_WriteRegBit(MIU_RQ1H_MASK, m, BIT2)
[all …]
H A DhalMIU.c613 MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable) in HAL_MIU_WriteRegBit() function
1102 HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE); in HAL_MIU_Protect()
1126 HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE); in HAL_MIU_Protect()

12