xref: /utopia/UTPA2-700.0.x/modules/miu/hal/curry/miu/halMIU.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1*53ee8cc1Swenshuai.xi //<MStar Software>
2*53ee8cc1Swenshuai.xi //******************************************************************************
3*53ee8cc1Swenshuai.xi // MStar Software
4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are
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71*53ee8cc1Swenshuai.xi //    with the said Rules.
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73*53ee8cc1Swenshuai.xi //    be English.
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75*53ee8cc1Swenshuai.xi //
76*53ee8cc1Swenshuai.xi //******************************************************************************
77*53ee8cc1Swenshuai.xi //<MStar Software>
78*53ee8cc1Swenshuai.xi 
79*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
80*53ee8cc1Swenshuai.xi //  Include Files
81*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
82*53ee8cc1Swenshuai.xi #include "MsCommon.h"
83*53ee8cc1Swenshuai.xi #include "MsTypes.h"
84*53ee8cc1Swenshuai.xi #include "drvMIU.h"
85*53ee8cc1Swenshuai.xi #include "regMIU.h"
86*53ee8cc1Swenshuai.xi #include "halMIU.h"
87*53ee8cc1Swenshuai.xi #include "halCHIP.h"
88*53ee8cc1Swenshuai.xi 
89*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
90*53ee8cc1Swenshuai.xi //  Driver Compiler Options
91*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
92*53ee8cc1Swenshuai.xi 
93*53ee8cc1Swenshuai.xi 
94*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
95*53ee8cc1Swenshuai.xi //  Local Defines
96*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
97*53ee8cc1Swenshuai.xi #define MIU_HAL_ERR(x, args...)     {printf(x, ##args);}
98*53ee8cc1Swenshuai.xi #define HAL_MIU_SSC_DBG(x)          //x
99*53ee8cc1Swenshuai.xi 
100*53ee8cc1Swenshuai.xi #define MIU_CLIENT_GP0              \
101*53ee8cc1Swenshuai.xi /* 0 */    MIU_CLIENT_NONE,                \
102*53ee8cc1Swenshuai.xi /* 1 */    MIU_CLIENT_VIVALDI9_DECODER_RW, \
103*53ee8cc1Swenshuai.xi /* 2 */    MIU_CLIENT_AU_R2_RW,            \
104*53ee8cc1Swenshuai.xi /* 3 */    MIU_CLIENT_VD_R2I_R,            \
105*53ee8cc1Swenshuai.xi /* 4 */    MIU_CLIENT_SECURE_R2_RW,        \
106*53ee8cc1Swenshuai.xi /* 5 */    MIU_CLIENT_VD_R2D_RW,           \
107*53ee8cc1Swenshuai.xi /* 6 */    MIU_CLIENT_DUMMY,               \
108*53ee8cc1Swenshuai.xi /* 7 */    MIU_CLIENT_VD_R2_L_I_R,         \
109*53ee8cc1Swenshuai.xi /* 8 */    MIU_CLIENT_VD_R2_L_D_RW,        \
110*53ee8cc1Swenshuai.xi /* 9 */    MIU_CLIENT_TSP03_RW,            \
111*53ee8cc1Swenshuai.xi /* A */    MIU_CLIENT_MVD_BBU_RW,          \
112*53ee8cc1Swenshuai.xi /* B */    MIU_CLIENT_DUMMY,               \
113*53ee8cc1Swenshuai.xi /* C */    MIU_CLIENT_XD2MIU_RW,           \
114*53ee8cc1Swenshuai.xi /* D */    MIU_CLIENT_UART_DMA_RW,         \
115*53ee8cc1Swenshuai.xi /* E */    MIU_CLIENT_BDMA_RW,             \
116*53ee8cc1Swenshuai.xi /* F */    MIU_CLIENT_DUMMY
117*53ee8cc1Swenshuai.xi 
118*53ee8cc1Swenshuai.xi #define MIU_CLIENT_GP1              \
119*53ee8cc1Swenshuai.xi /* 0 */    MIU_CLIENT_VIVALDI9_DMA_RW,     \
120*53ee8cc1Swenshuai.xi /* 1 */    MIU_CLIENT_DUMMY,               \
121*53ee8cc1Swenshuai.xi /* 2 */    MIU_CLIENT_DUMMY,               \
122*53ee8cc1Swenshuai.xi /* 3 */    MIU_CLIENT_CA_MIU_CROSSBAR_2_RW,\
123*53ee8cc1Swenshuai.xi /* 4 */    MIU_CLIENT_TSP06_RW,            \
124*53ee8cc1Swenshuai.xi /* 5 */    MIU_CLIENT_TSP07_RW,            \
125*53ee8cc1Swenshuai.xi /* 6 */    MIU_CLIENT_TSP08_RW,            \
126*53ee8cc1Swenshuai.xi /* 7 */    MIU_CLIENT_DUMMY,               \
127*53ee8cc1Swenshuai.xi /* 8 */    MIU_CLIENT_DUMMY,               \
128*53ee8cc1Swenshuai.xi /* 9 */    MIU_CLIENT_USB_UHC1_RW,         \
129*53ee8cc1Swenshuai.xi /* A */    MIU_CLIENT_USB_UHC2_RW,         \
130*53ee8cc1Swenshuai.xi /* B */    MIU_CLIENT_DUMMY,               \
131*53ee8cc1Swenshuai.xi /* C */    MIU_CLIENT_DUMMY,               \
132*53ee8cc1Swenshuai.xi /* D */    MIU_CLIENT_TSP04_RW,            \
133*53ee8cc1Swenshuai.xi /* E */    MIU_CLIENT_TSP05_RW,            \
134*53ee8cc1Swenshuai.xi /* F */    MIU_CLIENT_DUMMY
135*53ee8cc1Swenshuai.xi 
136*53ee8cc1Swenshuai.xi #define MIU_CLIENT_GP2              \
137*53ee8cc1Swenshuai.xi /* 0 */    MIU_CLIENT_SDIO_RW,             \
138*53ee8cc1Swenshuai.xi /* 1 */    MIU_CLIENT_DUMMY,               \
139*53ee8cc1Swenshuai.xi /* 2 */    MIU_CLIENT_DUMMY,               \
140*53ee8cc1Swenshuai.xi /* 3 */    MIU_CLIENT_DUMMY,               \
141*53ee8cc1Swenshuai.xi /* 4 */    MIU_CLIENT_DUMMY,               \
142*53ee8cc1Swenshuai.xi /* 5 */    MIU_CLIENT_DUMMY,               \
143*53ee8cc1Swenshuai.xi /* 6 */    MIU_CLIENT_MVD_RW,              \
144*53ee8cc1Swenshuai.xi /* 7 */    MIU_CLIENT_JPD_RW,              \
145*53ee8cc1Swenshuai.xi /* 8 */    MIU_CLIENT_GMAC_RW,             \
146*53ee8cc1Swenshuai.xi /* 9 */    MIU_CLIENT_NAND_RW,             \
147*53ee8cc1Swenshuai.xi /* A */    MIU_CLIENT_EMAC_RW,             \
148*53ee8cc1Swenshuai.xi /* B */    MIU_CLIENT_GPD_RW,              \
149*53ee8cc1Swenshuai.xi /* C */    MIU_CLIENT_DUMMY,               \
150*53ee8cc1Swenshuai.xi /* D */    MIU_CLIENT_DUMMY,               \
151*53ee8cc1Swenshuai.xi /* E */    MIU_CLIENT_DUMMY,               \
152*53ee8cc1Swenshuai.xi /* F */    MIU_CLIENT_DUMMY
153*53ee8cc1Swenshuai.xi 
154*53ee8cc1Swenshuai.xi #define MIU_CLIENT_GP3              \
155*53ee8cc1Swenshuai.xi /* 0 */    MIU_CLIENT_DUMMY,               \
156*53ee8cc1Swenshuai.xi /* 1 */    MIU_CLIENT_DUMMY,               \
157*53ee8cc1Swenshuai.xi /* 2 */    MIU_CLIENT_CMD_QUEUE_R,         \
158*53ee8cc1Swenshuai.xi /* 3 */    MIU_CLIENT_USB_UHC0_RW,         \
159*53ee8cc1Swenshuai.xi /* 4 */    MIU_CLIENT_DUMMY,               \
160*53ee8cc1Swenshuai.xi /* 5 */    MIU_CLIENT_ZDEC_ACP_W,          \
161*53ee8cc1Swenshuai.xi /* 6 */    MIU_CLIENT_DUMMY,               \
162*53ee8cc1Swenshuai.xi /* 7 */    MIU_CLIENT_ZDEC_LZDMA_RW,       \
163*53ee8cc1Swenshuai.xi /* 8 */    MIU_CLIENT_MFE1_R,              \
164*53ee8cc1Swenshuai.xi /* 9 */    MIU_CLIENT_DUMMY,               \
165*53ee8cc1Swenshuai.xi /* A */    MIU_CLIENT_MFE0_W,              \
166*53ee8cc1Swenshuai.xi /* B */    MIU_CLIENT_DUMMY,               \
167*53ee8cc1Swenshuai.xi /* C */    MIU_CLIENT_DUMMY,               \
168*53ee8cc1Swenshuai.xi /* D */    MIU_CLIENT_DUMMY,               \
169*53ee8cc1Swenshuai.xi /* E */    MIU_CLIENT_DUMMY,               \
170*53ee8cc1Swenshuai.xi /* F */    MIU_CLIENT_DUMMY
171*53ee8cc1Swenshuai.xi 
172*53ee8cc1Swenshuai.xi #define MIU_CLIENT_GP4              \
173*53ee8cc1Swenshuai.xi /* 0 */    MIU_CLIENT_DUMMY,               \
174*53ee8cc1Swenshuai.xi /* 1 */    MIU_CLIENT_DUMMY,               \
175*53ee8cc1Swenshuai.xi /* 2 */    MIU_CLIENT_DUMMY,               \
176*53ee8cc1Swenshuai.xi /* 3 */    MIU_CLIENT_DUMMY,               \
177*53ee8cc1Swenshuai.xi /* 4 */    MIU_CLIENT_HVD_RW,              \
178*53ee8cc1Swenshuai.xi /* 5 */    MIU_CLIENT_DUMMY,               \
179*53ee8cc1Swenshuai.xi /* 6 */    MIU_CLIENT_EVD2_BBU_R,          \
180*53ee8cc1Swenshuai.xi /* 7 */    MIU_CLIENT_EVD_RW,              \
181*53ee8cc1Swenshuai.xi /* 8 */    MIU_CLIENT_DUMMY,               \
182*53ee8cc1Swenshuai.xi /* 9 */    MIU_CLIENT_MVD_RTO_RW,          \
183*53ee8cc1Swenshuai.xi /* A */    MIU_CLIENT_EVD_BBU_R,           \
184*53ee8cc1Swenshuai.xi /* B */    MIU_CLIENT_HVD_BBU_R,           \
185*53ee8cc1Swenshuai.xi /* C */    MIU_CLIENT_SC1_IPMAIN_RW,       \
186*53ee8cc1Swenshuai.xi /* D */    MIU_CLIENT_SC1_OPM_R,           \
187*53ee8cc1Swenshuai.xi /* E */    MIU_CLIENT_DUMMY,               \
188*53ee8cc1Swenshuai.xi /* F */    MIU_CLIENT_DUMMY
189*53ee8cc1Swenshuai.xi 
190*53ee8cc1Swenshuai.xi #define MIU_CLIENT_GP5              \
191*53ee8cc1Swenshuai.xi /* 0 */    MIU_CLIENT_GOP0_R,              \
192*53ee8cc1Swenshuai.xi /* 1 */    MIU_CLIENT_GOP1_R,              \
193*53ee8cc1Swenshuai.xi /* 2 */    MIU_CLIENT_GOP2_R,              \
194*53ee8cc1Swenshuai.xi /* 3 */    MIU_CLIENT_GOP3_DWIN_RW,        \
195*53ee8cc1Swenshuai.xi /* 4 */    MIU_CLIENT_MVOP_256BIT_R,       \
196*53ee8cc1Swenshuai.xi /* 5 */    MIU_CLIENT_DUMMY,               \
197*53ee8cc1Swenshuai.xi /* 6 */    MIU_CLIENT_SC_IPMAIN_RW,        \
198*53ee8cc1Swenshuai.xi /* 7 */    MIU_CLIENT_SC_IPSUB_RW,         \
199*53ee8cc1Swenshuai.xi /* 8 */    MIU_CLIENT_SC_OPM_R,            \
200*53ee8cc1Swenshuai.xi /* 9 */    MIU_CLIENT_SC_DIPW_RW,          \
201*53ee8cc1Swenshuai.xi /* A */    MIU_CLIENT_MFDEC_R,             \
202*53ee8cc1Swenshuai.xi /* B */    MIU_CLIENT_MFDEC1_R,            \
203*53ee8cc1Swenshuai.xi /* C */    MIU_CLIENT_SC_DYN_SCL_R,        \
204*53ee8cc1Swenshuai.xi /* D */    MIU_CLIENT_DUMMY,               \
205*53ee8cc1Swenshuai.xi /* E */    MIU_CLIENT_VE_R,                \
206*53ee8cc1Swenshuai.xi /* F */    MIU_CLIENT_GE_RW
207*53ee8cc1Swenshuai.xi 
208*53ee8cc1Swenshuai.xi #define MIU_CLIENT_GP6              \
209*53ee8cc1Swenshuai.xi /* 0 */    MIU_CLIENT_DUMMY,               \
210*53ee8cc1Swenshuai.xi /* 1 */    MIU_CLIENT_DUMMY,               \
211*53ee8cc1Swenshuai.xi /* 2 */    MIU_CLIENT_DUMMY,               \
212*53ee8cc1Swenshuai.xi /* 3 */    MIU_CLIENT_DUMMY,               \
213*53ee8cc1Swenshuai.xi /* 4 */    MIU_CLIENT_DUMMY,               \
214*53ee8cc1Swenshuai.xi /* 5 */    MIU_CLIENT_DUMMY,               \
215*53ee8cc1Swenshuai.xi /* 6 */    MIU_CLIENT_DUMMY,               \
216*53ee8cc1Swenshuai.xi /* 7 */    MIU_CLIENT_DUMMY,               \
217*53ee8cc1Swenshuai.xi /* 8 */    MIU_CLIENT_DUMMY,               \
218*53ee8cc1Swenshuai.xi /* 9 */    MIU_CLIENT_DUMMY,               \
219*53ee8cc1Swenshuai.xi /* A */    MIU_CLIENT_DUMMY,               \
220*53ee8cc1Swenshuai.xi /* B */    MIU_CLIENT_DUMMY,               \
221*53ee8cc1Swenshuai.xi /* C */    MIU_CLIENT_DUMMY,               \
222*53ee8cc1Swenshuai.xi /* D */    MIU_CLIENT_DUMMY,               \
223*53ee8cc1Swenshuai.xi /* E */    MIU_CLIENT_DUMMY,               \
224*53ee8cc1Swenshuai.xi /* F */    MIU_CLIENT_DUMMY
225*53ee8cc1Swenshuai.xi 
226*53ee8cc1Swenshuai.xi #define MIU_CLIENT_GP7              \
227*53ee8cc1Swenshuai.xi /* 0 */    MIU_CLIENT_MIPS_RW,             \
228*53ee8cc1Swenshuai.xi /* 1 */    MIU_CLIENT_G3D_RW,              \
229*53ee8cc1Swenshuai.xi /* 2 */    MIU_CLIENT_DUMMY,               \
230*53ee8cc1Swenshuai.xi /* 3 */    MIU_CLIENT_DUMMY,               \
231*53ee8cc1Swenshuai.xi /* 4 */    MIU_CLIENT_DUMMY,               \
232*53ee8cc1Swenshuai.xi /* 5 */    MIU_CLIENT_DUMMY,               \
233*53ee8cc1Swenshuai.xi /* 6 */    MIU_CLIENT_DUMMY,               \
234*53ee8cc1Swenshuai.xi /* 7 */    MIU_CLIENT_DUMMY,               \
235*53ee8cc1Swenshuai.xi /* 8 */    MIU_CLIENT_DUMMY,               \
236*53ee8cc1Swenshuai.xi /* 9 */    MIU_CLIENT_DUMMY,               \
237*53ee8cc1Swenshuai.xi /* A */    MIU_CLIENT_DUMMY,               \
238*53ee8cc1Swenshuai.xi /* B */    MIU_CLIENT_DUMMY,               \
239*53ee8cc1Swenshuai.xi /* C */    MIU_CLIENT_DUMMY,               \
240*53ee8cc1Swenshuai.xi /* D */    MIU_CLIENT_DUMMY,               \
241*53ee8cc1Swenshuai.xi /* E */    MIU_CLIENT_DUMMY,               \
242*53ee8cc1Swenshuai.xi /* F */    MIU_CLIENT_DUMMY
243*53ee8cc1Swenshuai.xi 
244*53ee8cc1Swenshuai.xi #define KHz                         (1000UL)
245*53ee8cc1Swenshuai.xi #define MHz                         (1000000UL)
246*53ee8cc1Swenshuai.xi #define MPPL                        (432)
247*53ee8cc1Swenshuai.xi #define DDR_FACTOR                  (524288)
248*53ee8cc1Swenshuai.xi #define DDFSPAN_FACTOR              (131072)
249*53ee8cc1Swenshuai.xi #define IDNUM_KERNELPROTECT         (8)
250*53ee8cc1Swenshuai.xi 
251*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
252*53ee8cc1Swenshuai.xi //  Local Structures
253*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
254*53ee8cc1Swenshuai.xi const eMIUClientID clientTbl[MIU_MAX_DEVICE][MIU_MAX_TBL_CLIENT] =
255*53ee8cc1Swenshuai.xi {
256*53ee8cc1Swenshuai.xi     {
257*53ee8cc1Swenshuai.xi         MIU_CLIENT_GP0,
258*53ee8cc1Swenshuai.xi         MIU_CLIENT_GP1,
259*53ee8cc1Swenshuai.xi         MIU_CLIENT_GP2,
260*53ee8cc1Swenshuai.xi         MIU_CLIENT_GP3,
261*53ee8cc1Swenshuai.xi         MIU_CLIENT_GP4,
262*53ee8cc1Swenshuai.xi         MIU_CLIENT_GP5,
263*53ee8cc1Swenshuai.xi         MIU_CLIENT_GP6,
264*53ee8cc1Swenshuai.xi         MIU_CLIENT_GP7
265*53ee8cc1Swenshuai.xi     }
266*53ee8cc1Swenshuai.xi };
267*53ee8cc1Swenshuai.xi 
268*53ee8cc1Swenshuai.xi MS_U8 clientId_KernelProtect[IDNUM_KERNELPROTECT] =
269*53ee8cc1Swenshuai.xi {
270*53ee8cc1Swenshuai.xi     MIU_CLIENT_MIPS_RW,
271*53ee8cc1Swenshuai.xi     MIU_CLIENT_NAND_RW,
272*53ee8cc1Swenshuai.xi     MIU_CLIENT_USB_UHC0_RW,
273*53ee8cc1Swenshuai.xi     MIU_CLIENT_USB_UHC1_RW,
274*53ee8cc1Swenshuai.xi     MIU_CLIENT_USB_UHC2_RW,
275*53ee8cc1Swenshuai.xi     MIU_CLIENT_USB3_RW,
276*53ee8cc1Swenshuai.xi     MIU_CLIENT_NONE,
277*53ee8cc1Swenshuai.xi     MIU_CLIENT_NONE
278*53ee8cc1Swenshuai.xi };
279*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
280*53ee8cc1Swenshuai.xi //  Global Variables
281*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
282*53ee8cc1Swenshuai.xi 
283*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
284*53ee8cc1Swenshuai.xi //  Local Variables
285*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
286*53ee8cc1Swenshuai.xi static MS_VIRT _gMIU_MapBase = 0x1f200000;
287*53ee8cc1Swenshuai.xi static MS_VIRT _gPM_MapBase = 0x1f000000;
288*53ee8cc1Swenshuai.xi 
289*53ee8cc1Swenshuai.xi MS_BOOL IDEnables[MIU_MAX_DEVICE][MIU_MAX_PROTECT_BLOCK][MIU_MAX_PROTECT_ID] =
290*53ee8cc1Swenshuai.xi         {
291*53ee8cc1Swenshuai.xi             {{0}, {0}, {0}, {0}}
292*53ee8cc1Swenshuai.xi         }; //ID enable for protect block 0~3
293*53ee8cc1Swenshuai.xi 
294*53ee8cc1Swenshuai.xi MS_U8   IDs[MIU_MAX_DEVICE][MIU_MAX_PROTECT_ID] =
295*53ee8cc1Swenshuai.xi         {
296*53ee8cc1Swenshuai.xi             {0}
297*53ee8cc1Swenshuai.xi         }; //IDs for protection
298*53ee8cc1Swenshuai.xi 
299*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
300*53ee8cc1Swenshuai.xi //  Debug Functions
301*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
302*53ee8cc1Swenshuai.xi 
303*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
304*53ee8cc1Swenshuai.xi //  Local Functions
305*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
306*53ee8cc1Swenshuai.xi 
307*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
308*53ee8cc1Swenshuai.xi // Type and Structure Declaration
309*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
310*53ee8cc1Swenshuai.xi 
311*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
312*53ee8cc1Swenshuai.xi //  Global Functions
313*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
HAL_MIU_SetIOMapBase(MS_VIRT virtBase)314*53ee8cc1Swenshuai.xi void HAL_MIU_SetIOMapBase(MS_VIRT virtBase)
315*53ee8cc1Swenshuai.xi {
316*53ee8cc1Swenshuai.xi     _gMIU_MapBase = virtBase;
317*53ee8cc1Swenshuai.xi     HAL_MIU_SSC_DBG(printf("MIU _gMIU_MapBase= %lx\n", _gMIU_MapBase));
318*53ee8cc1Swenshuai.xi }
319*53ee8cc1Swenshuai.xi 
HAL_MIU_SetPMIOMapBase(MS_VIRT virtBase)320*53ee8cc1Swenshuai.xi void HAL_MIU_SetPMIOMapBase(MS_VIRT virtBase)
321*53ee8cc1Swenshuai.xi {
322*53ee8cc1Swenshuai.xi     _gPM_MapBase = virtBase;
323*53ee8cc1Swenshuai.xi     HAL_MIU_SSC_DBG(printf("MIU _gPM_MapBase= %lx\n", _gPM_MapBase));
324*53ee8cc1Swenshuai.xi }
325*53ee8cc1Swenshuai.xi 
HAL_MIU_GetClientInfo(MS_U8 u8MiuDev,eMIUClientID eClientID)326*53ee8cc1Swenshuai.xi MS_S16 HAL_MIU_GetClientInfo(MS_U8 u8MiuDev, eMIUClientID eClientID)
327*53ee8cc1Swenshuai.xi {
328*53ee8cc1Swenshuai.xi     MS_U8 idx;
329*53ee8cc1Swenshuai.xi 
330*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuDev)
331*53ee8cc1Swenshuai.xi     {
332*53ee8cc1Swenshuai.xi         printf("Wrong MIU device:%u\n", u8MiuDev);
333*53ee8cc1Swenshuai.xi         return (-1);
334*53ee8cc1Swenshuai.xi     }
335*53ee8cc1Swenshuai.xi 
336*53ee8cc1Swenshuai.xi     for (idx = 0; idx < MIU_MAX_TBL_CLIENT; idx++)
337*53ee8cc1Swenshuai.xi         if (eClientID == clientTbl[u8MiuDev][idx])
338*53ee8cc1Swenshuai.xi             return idx;
339*53ee8cc1Swenshuai.xi     return (-1);
340*53ee8cc1Swenshuai.xi }
341*53ee8cc1Swenshuai.xi 
342*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
343*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_ReadByte
344*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: read 1 Byte data
345*53ee8cc1Swenshuai.xi /// @param <IN>         \b u32RegAddr: register address
346*53ee8cc1Swenshuai.xi /// @param <OUT>        \b None :
347*53ee8cc1Swenshuai.xi /// @param <RET>        \b MS_U8
348*53ee8cc1Swenshuai.xi /// @param <GLOBAL>     \b None :
349*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_ReadByte(MS_U32 u32RegAddr)350*53ee8cc1Swenshuai.xi MS_U8 HAL_MIU_ReadByte(MS_U32 u32RegAddr)
351*53ee8cc1Swenshuai.xi {
352*53ee8cc1Swenshuai.xi     return ((volatile MS_U8*)(_gMIU_MapBase))[(u32RegAddr << 1) - (u32RegAddr & 1)];
353*53ee8cc1Swenshuai.xi }
354*53ee8cc1Swenshuai.xi 
355*53ee8cc1Swenshuai.xi 
356*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
357*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_PM_ReadByte
358*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: read 1 Byte data
359*53ee8cc1Swenshuai.xi /// @param <IN>         \b u32RegAddr: register address
360*53ee8cc1Swenshuai.xi /// @param <OUT>        \b None :
361*53ee8cc1Swenshuai.xi /// @param <RET>        \b MS_U8
362*53ee8cc1Swenshuai.xi /// @param <GLOBAL>     \b None :
363*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_PM_ReadByte(MS_U32 u32RegAddr)364*53ee8cc1Swenshuai.xi MS_U8 HAL_MIU_PM_ReadByte(MS_U32 u32RegAddr)
365*53ee8cc1Swenshuai.xi {
366*53ee8cc1Swenshuai.xi     return ((volatile MS_U8*)(_gPM_MapBase))[(u32RegAddr << 1) - (u32RegAddr & 1)];
367*53ee8cc1Swenshuai.xi }
368*53ee8cc1Swenshuai.xi 
369*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
370*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_Read4Byte
371*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: read 2 Byte data
372*53ee8cc1Swenshuai.xi /// @param <IN>         \b u32RegAddr: register address
373*53ee8cc1Swenshuai.xi /// @param <OUT>        \b None :
374*53ee8cc1Swenshuai.xi /// @param <RET>        \b MS_U16
375*53ee8cc1Swenshuai.xi /// @param <GLOBAL>     \b None :
376*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Read2Byte(MS_U32 u32RegAddr)377*53ee8cc1Swenshuai.xi MS_U16 HAL_MIU_Read2Byte(MS_U32 u32RegAddr)
378*53ee8cc1Swenshuai.xi {
379*53ee8cc1Swenshuai.xi     return ((volatile MS_U16*)(_gMIU_MapBase))[u32RegAddr];
380*53ee8cc1Swenshuai.xi }
381*53ee8cc1Swenshuai.xi 
382*53ee8cc1Swenshuai.xi 
383*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
384*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_Read4Byte
385*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: read 4 Byte data
386*53ee8cc1Swenshuai.xi /// @param <IN>         \b u32RegAddr: register address
387*53ee8cc1Swenshuai.xi /// @param <OUT>        \b None :
388*53ee8cc1Swenshuai.xi /// @param <RET>        \b MS_U32
389*53ee8cc1Swenshuai.xi /// @param <GLOBAL>     \b None :
390*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Read4Byte(MS_U32 u32RegAddr)391*53ee8cc1Swenshuai.xi MS_U32 HAL_MIU_Read4Byte(MS_U32 u32RegAddr)
392*53ee8cc1Swenshuai.xi {
393*53ee8cc1Swenshuai.xi     return (HAL_MIU_Read2Byte(u32RegAddr) | HAL_MIU_Read2Byte(u32RegAddr+2) << 16);
394*53ee8cc1Swenshuai.xi }
395*53ee8cc1Swenshuai.xi 
396*53ee8cc1Swenshuai.xi 
397*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
398*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_WriteByte
399*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: write 1 Byte data
400*53ee8cc1Swenshuai.xi /// @param <IN>         \b u32RegAddr: register address
401*53ee8cc1Swenshuai.xi /// @param <IN>         \b u8Val : 1 byte data
402*53ee8cc1Swenshuai.xi /// @param <OUT>        \b None :
403*53ee8cc1Swenshuai.xi /// @param <RET>        \b TRUE: Ok FALSE: Fail
404*53ee8cc1Swenshuai.xi /// @param <GLOBAL>     \b None :
405*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_WriteByte(MS_U32 u32RegAddr,MS_U8 u8Val)406*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_WriteByte(MS_U32 u32RegAddr, MS_U8 u8Val)
407*53ee8cc1Swenshuai.xi {
408*53ee8cc1Swenshuai.xi     if (!u32RegAddr)
409*53ee8cc1Swenshuai.xi     {
410*53ee8cc1Swenshuai.xi         MIU_HAL_ERR("%s reg error!\n", __FUNCTION__);
411*53ee8cc1Swenshuai.xi         return FALSE;
412*53ee8cc1Swenshuai.xi     }
413*53ee8cc1Swenshuai.xi 
414*53ee8cc1Swenshuai.xi     ((volatile MS_U8*)(_gMIU_MapBase))[(u32RegAddr << 1) - (u32RegAddr & 1)] = u8Val;
415*53ee8cc1Swenshuai.xi     return TRUE;
416*53ee8cc1Swenshuai.xi }
417*53ee8cc1Swenshuai.xi 
418*53ee8cc1Swenshuai.xi 
419*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
420*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_Write2Byte
421*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: write 2 Byte data
422*53ee8cc1Swenshuai.xi /// @param <IN>         \b u32RegAddr: register address
423*53ee8cc1Swenshuai.xi /// @param <IN>         \b u16Val : 2 byte data
424*53ee8cc1Swenshuai.xi /// @param <OUT>        \b None :
425*53ee8cc1Swenshuai.xi /// @param <RET>        \b TRUE: Ok FALSE: Fail
426*53ee8cc1Swenshuai.xi /// @param <GLOBAL>     \b None :
427*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Write2Byte(MS_U32 u32RegAddr,MS_U16 u16Val)428*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_Write2Byte(MS_U32 u32RegAddr, MS_U16 u16Val)
429*53ee8cc1Swenshuai.xi {
430*53ee8cc1Swenshuai.xi     if (!u32RegAddr)
431*53ee8cc1Swenshuai.xi     {
432*53ee8cc1Swenshuai.xi         MIU_HAL_ERR("%s reg error!\n", __FUNCTION__);
433*53ee8cc1Swenshuai.xi         return FALSE;
434*53ee8cc1Swenshuai.xi     }
435*53ee8cc1Swenshuai.xi 
436*53ee8cc1Swenshuai.xi     ((volatile MS_U16*)(_gMIU_MapBase))[u32RegAddr] = u16Val;
437*53ee8cc1Swenshuai.xi     return TRUE;
438*53ee8cc1Swenshuai.xi }
439*53ee8cc1Swenshuai.xi 
440*53ee8cc1Swenshuai.xi 
441*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
442*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_BDMA_Write4Byte
443*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: write 4 Byte data
444*53ee8cc1Swenshuai.xi /// @param <IN>         \b u32RegAddr: register address
445*53ee8cc1Swenshuai.xi /// @param <IN>         \b u32Val : 4 byte data
446*53ee8cc1Swenshuai.xi /// @param <OUT>        \b None :
447*53ee8cc1Swenshuai.xi /// @param <RET>        \b TRUE: Ok FALSE: Fail
448*53ee8cc1Swenshuai.xi /// @param <GLOBAL>     \b None :
449*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Write4Byte(MS_U32 u32RegAddr,MS_U32 u32Val)450*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_Write4Byte(MS_U32 u32RegAddr, MS_U32 u32Val)
451*53ee8cc1Swenshuai.xi {
452*53ee8cc1Swenshuai.xi     if (!u32RegAddr)
453*53ee8cc1Swenshuai.xi     {
454*53ee8cc1Swenshuai.xi         MIU_HAL_ERR("%s reg error!\n", __FUNCTION__);
455*53ee8cc1Swenshuai.xi         return FALSE;
456*53ee8cc1Swenshuai.xi     }
457*53ee8cc1Swenshuai.xi 
458*53ee8cc1Swenshuai.xi     HAL_MIU_Write2Byte(u32RegAddr, u32Val & 0x0000FFFF);
459*53ee8cc1Swenshuai.xi     HAL_MIU_Write2Byte(u32RegAddr+2, u32Val >> 16);
460*53ee8cc1Swenshuai.xi     return TRUE;
461*53ee8cc1Swenshuai.xi }
462*53ee8cc1Swenshuai.xi 
463*53ee8cc1Swenshuai.xi 
464*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
465*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_BDMA_WriteByte
466*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: write 1 Byte data
467*53ee8cc1Swenshuai.xi /// @param <IN>         \b u32RegAddr: register address
468*53ee8cc1Swenshuai.xi /// @param <IN>         \b u8Val : 1 byte data
469*53ee8cc1Swenshuai.xi /// @param <OUT>        \b None :
470*53ee8cc1Swenshuai.xi /// @param <RET>        \b TRUE: Ok FALSE: Fail
471*53ee8cc1Swenshuai.xi /// @param <GLOBAL>     \b None :
472*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_WriteRegBit(MS_U32 u32RegAddr,MS_U8 u8Mask,MS_BOOL bEnable)473*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_WriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable)
474*53ee8cc1Swenshuai.xi {
475*53ee8cc1Swenshuai.xi     MS_U8 u8Val = HAL_MIU_ReadByte(u32RegAddr);
476*53ee8cc1Swenshuai.xi     if (!u32RegAddr)
477*53ee8cc1Swenshuai.xi     {
478*53ee8cc1Swenshuai.xi         MIU_HAL_ERR("%s reg error!\n", __FUNCTION__);
479*53ee8cc1Swenshuai.xi         return FALSE;
480*53ee8cc1Swenshuai.xi     }
481*53ee8cc1Swenshuai.xi 
482*53ee8cc1Swenshuai.xi     u8Val = HAL_MIU_ReadByte(u32RegAddr);
483*53ee8cc1Swenshuai.xi     u8Val = (bEnable) ? (u8Val | u8Mask) : (u8Val & ~u8Mask);
484*53ee8cc1Swenshuai.xi     HAL_MIU_WriteByte(u32RegAddr, u8Val);
485*53ee8cc1Swenshuai.xi     return TRUE;
486*53ee8cc1Swenshuai.xi }
487*53ee8cc1Swenshuai.xi 
HAL_MIU_Write2BytesBit(MS_U32 u32RegOffset,MS_BOOL bEnable,MS_U16 u16Mask)488*53ee8cc1Swenshuai.xi void HAL_MIU_Write2BytesBit(MS_U32 u32RegOffset, MS_BOOL bEnable, MS_U16 u16Mask)
489*53ee8cc1Swenshuai.xi {
490*53ee8cc1Swenshuai.xi     MS_U16 val = HAL_MIU_Read2Byte(u32RegOffset);
491*53ee8cc1Swenshuai.xi     val = (bEnable) ? (val | u16Mask) : (val & ~u16Mask);
492*53ee8cc1Swenshuai.xi     HAL_MIU_Write2Byte(u32RegOffset, val);
493*53ee8cc1Swenshuai.xi }
494*53ee8cc1Swenshuai.xi 
HAL_MIU_SetProtectID(MS_U32 u32Reg,MS_U8 u8MiuDev,MS_U8 u8ClientID)495*53ee8cc1Swenshuai.xi void HAL_MIU_SetProtectID(MS_U32 u32Reg, MS_U8 u8MiuDev, MS_U8 u8ClientID)
496*53ee8cc1Swenshuai.xi {
497*53ee8cc1Swenshuai.xi     MS_S16 sVal;
498*53ee8cc1Swenshuai.xi     MS_S16 sIDVal;
499*53ee8cc1Swenshuai.xi 
500*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuDev)
501*53ee8cc1Swenshuai.xi         return;
502*53ee8cc1Swenshuai.xi 
503*53ee8cc1Swenshuai.xi     sVal = HAL_MIU_GetClientInfo(u8MiuDev, (eMIUClientID)u8ClientID);
504*53ee8cc1Swenshuai.xi 
505*53ee8cc1Swenshuai.xi     if (0 > sVal)
506*53ee8cc1Swenshuai.xi         sVal = 0;
507*53ee8cc1Swenshuai.xi 
508*53ee8cc1Swenshuai.xi     sIDVal = HAL_MIU_ReadByte(u32Reg);
509*53ee8cc1Swenshuai.xi     sIDVal &= 0x80;
510*53ee8cc1Swenshuai.xi     sIDVal |= sVal;
511*53ee8cc1Swenshuai.xi     HAL_MIU_WriteByte(u32Reg, sIDVal);
512*53ee8cc1Swenshuai.xi }
513*53ee8cc1Swenshuai.xi 
HAL_MIU_SetGroupID(MS_U8 u8MiuSel,MS_U8 u8Blockx,MS_U8 * pu8ProtectId,MS_U32 u32RegAddrID,MS_U32 u32RegAddrIDenable)514*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_SetGroupID(MS_U8 u8MiuSel, MS_U8 u8Blockx, MS_U8 *pu8ProtectId, MS_U32 u32RegAddrID, MS_U32 u32RegAddrIDenable)
515*53ee8cc1Swenshuai.xi {
516*53ee8cc1Swenshuai.xi     MS_U32 u32index0, u32index1;
517*53ee8cc1Swenshuai.xi     MS_U8 u8ID;
518*53ee8cc1Swenshuai.xi     MS_U8 u8isfound0, u8isfound1;
519*53ee8cc1Swenshuai.xi     MS_U16 u16idenable;
520*53ee8cc1Swenshuai.xi 
521*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuSel)
522*53ee8cc1Swenshuai.xi         return FALSE;
523*53ee8cc1Swenshuai.xi 
524*53ee8cc1Swenshuai.xi     //reset IDenables for protect u8Blockx
525*53ee8cc1Swenshuai.xi     for(u32index0 = 0; u32index0 < MIU_MAX_PROTECT_ID; u32index0++)
526*53ee8cc1Swenshuai.xi     {
527*53ee8cc1Swenshuai.xi         IDEnables[u8MiuSel][u8Blockx][u32index0] = 0;
528*53ee8cc1Swenshuai.xi     }
529*53ee8cc1Swenshuai.xi 
530*53ee8cc1Swenshuai.xi     for(u32index0 = 0; u32index0 < MIU_MAX_PROTECT_ID; u32index0++)
531*53ee8cc1Swenshuai.xi     {
532*53ee8cc1Swenshuai.xi         u8ID = pu8ProtectId[u32index0];
533*53ee8cc1Swenshuai.xi 
534*53ee8cc1Swenshuai.xi         //Unused ID
535*53ee8cc1Swenshuai.xi         if(u8ID == 0)
536*53ee8cc1Swenshuai.xi            continue;
537*53ee8cc1Swenshuai.xi 
538*53ee8cc1Swenshuai.xi         u8isfound0 = FALSE;
539*53ee8cc1Swenshuai.xi 
540*53ee8cc1Swenshuai.xi         for(u32index1 = 0; u32index1 < MIU_MAX_PROTECT_ID; u32index1++)
541*53ee8cc1Swenshuai.xi         {
542*53ee8cc1Swenshuai.xi             if(IDs[u8MiuSel][u32index1] == u8ID)
543*53ee8cc1Swenshuai.xi             {
544*53ee8cc1Swenshuai.xi                 //ID reused former setting
545*53ee8cc1Swenshuai.xi                 IDEnables[u8MiuSel][u8Blockx][u32index1] = 1;
546*53ee8cc1Swenshuai.xi                 u8isfound0 = TRUE;
547*53ee8cc1Swenshuai.xi                 break;
548*53ee8cc1Swenshuai.xi             }
549*53ee8cc1Swenshuai.xi         }
550*53ee8cc1Swenshuai.xi 
551*53ee8cc1Swenshuai.xi 
552*53ee8cc1Swenshuai.xi         //Need to create new ID in IDs
553*53ee8cc1Swenshuai.xi         if(u8isfound0 != TRUE)
554*53ee8cc1Swenshuai.xi         {
555*53ee8cc1Swenshuai.xi             u8isfound1 = FALSE;
556*53ee8cc1Swenshuai.xi 
557*53ee8cc1Swenshuai.xi             for(u32index1 = 0; u32index1 < MIU_MAX_PROTECT_ID; u32index1++)
558*53ee8cc1Swenshuai.xi             {
559*53ee8cc1Swenshuai.xi                 if(IDs[u8MiuSel][u32index1] == 0)
560*53ee8cc1Swenshuai.xi                 {
561*53ee8cc1Swenshuai.xi                     IDs[u8MiuSel][u32index1] = u8ID;
562*53ee8cc1Swenshuai.xi                     IDEnables[u8MiuSel][u8Blockx][u32index1] = 1;
563*53ee8cc1Swenshuai.xi                     u8isfound1 = TRUE;
564*53ee8cc1Swenshuai.xi                     break;
565*53ee8cc1Swenshuai.xi                 }
566*53ee8cc1Swenshuai.xi             }
567*53ee8cc1Swenshuai.xi 
568*53ee8cc1Swenshuai.xi             //ID overflow
569*53ee8cc1Swenshuai.xi             if(u8isfound1 == FALSE)
570*53ee8cc1Swenshuai.xi                 return FALSE;
571*53ee8cc1Swenshuai.xi         }
572*53ee8cc1Swenshuai.xi     }
573*53ee8cc1Swenshuai.xi 
574*53ee8cc1Swenshuai.xi     u16idenable = 0;
575*53ee8cc1Swenshuai.xi 
576*53ee8cc1Swenshuai.xi     for(u32index0 = 0; u32index0 < MIU_MAX_PROTECT_ID; u32index0++)
577*53ee8cc1Swenshuai.xi     {
578*53ee8cc1Swenshuai.xi         if(IDEnables[u8MiuSel][u8Blockx][u32index0] == 1)
579*53ee8cc1Swenshuai.xi             u16idenable |= (1<<u32index0);
580*53ee8cc1Swenshuai.xi     }
581*53ee8cc1Swenshuai.xi 
582*53ee8cc1Swenshuai.xi     HAL_MIU_Write2Byte(u32RegAddrIDenable, u16idenable);
583*53ee8cc1Swenshuai.xi 
584*53ee8cc1Swenshuai.xi     for(u32index0 = 0; u32index0 < MIU_MAX_PROTECT_ID; u32index0++)
585*53ee8cc1Swenshuai.xi     {
586*53ee8cc1Swenshuai.xi          HAL_MIU_SetProtectID(u32RegAddrID + u32index0, (u8MiuSel== E_MIU_1), IDs[u8MiuSel][u32index0]);
587*53ee8cc1Swenshuai.xi     }
588*53ee8cc1Swenshuai.xi 
589*53ee8cc1Swenshuai.xi     return TRUE;
590*53ee8cc1Swenshuai.xi }
591*53ee8cc1Swenshuai.xi 
HAL_MIU_ResetGroupID(MS_U8 u8MiuSel,MS_U8 u8Blockx,MS_U8 * pu8ProtectId,MS_U32 u32RegAddrID,MS_U32 u32RegAddrIDenable)592*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_ResetGroupID(MS_U8 u8MiuSel, MS_U8 u8Blockx, MS_U8 *pu8ProtectId, MS_U32 u32RegAddrID, MS_U32 u32RegAddrIDenable)
593*53ee8cc1Swenshuai.xi {
594*53ee8cc1Swenshuai.xi     MS_U32 u32index0, u32index1;
595*53ee8cc1Swenshuai.xi     MS_U8 u8isIDNoUse;
596*53ee8cc1Swenshuai.xi     MS_U16 u16idenable;
597*53ee8cc1Swenshuai.xi 
598*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuSel)
599*53ee8cc1Swenshuai.xi         return FALSE;
600*53ee8cc1Swenshuai.xi 
601*53ee8cc1Swenshuai.xi     //reset IDenables for protect u8Blockx
602*53ee8cc1Swenshuai.xi     for(u32index0 = 0; u32index0 < MIU_MAX_PROTECT_ID; u32index0++)
603*53ee8cc1Swenshuai.xi     {
604*53ee8cc1Swenshuai.xi         IDEnables[u8MiuSel][u8Blockx][u32index0] = 0;
605*53ee8cc1Swenshuai.xi     }
606*53ee8cc1Swenshuai.xi 
607*53ee8cc1Swenshuai.xi     u16idenable = 0x0;
608*53ee8cc1Swenshuai.xi 
609*53ee8cc1Swenshuai.xi     HAL_MIU_Write2Byte(u32RegAddrIDenable, u16idenable);
610*53ee8cc1Swenshuai.xi 
611*53ee8cc1Swenshuai.xi     for(u32index0 = 0; u32index0 < MIU_MAX_PROTECT_ID; u32index0++)
612*53ee8cc1Swenshuai.xi     {
613*53ee8cc1Swenshuai.xi         u8isIDNoUse  = FALSE;
614*53ee8cc1Swenshuai.xi 
615*53ee8cc1Swenshuai.xi         for(u32index1 = 0; u32index1 < MIU_MAX_PROTECT_BLOCK; u32index1++)
616*53ee8cc1Swenshuai.xi         {
617*53ee8cc1Swenshuai.xi             if(IDEnables[u8MiuSel][u32index1][u32index0] == 1)
618*53ee8cc1Swenshuai.xi             {
619*53ee8cc1Swenshuai.xi                 //protect ID is still be used
620*53ee8cc1Swenshuai.xi                 u8isIDNoUse  = FALSE;
621*53ee8cc1Swenshuai.xi                 break;
622*53ee8cc1Swenshuai.xi             }
623*53ee8cc1Swenshuai.xi             u8isIDNoUse  = TRUE;
624*53ee8cc1Swenshuai.xi         }
625*53ee8cc1Swenshuai.xi 
626*53ee8cc1Swenshuai.xi         if(u8isIDNoUse == TRUE)
627*53ee8cc1Swenshuai.xi             IDs[u8MiuSel][u32index0] = 0;
628*53ee8cc1Swenshuai.xi     }
629*53ee8cc1Swenshuai.xi 
630*53ee8cc1Swenshuai.xi     for(u32index0 = 0; u32index0 < MIU_MAX_PROTECT_ID; u32index0++)
631*53ee8cc1Swenshuai.xi     {
632*53ee8cc1Swenshuai.xi          HAL_MIU_SetProtectID(u32RegAddrID + u32index0, (u8MiuSel== E_MIU_1), IDs[u8MiuSel][u32index0]);
633*53ee8cc1Swenshuai.xi     }
634*53ee8cc1Swenshuai.xi 
635*53ee8cc1Swenshuai.xi     return TRUE;
636*53ee8cc1Swenshuai.xi }
637*53ee8cc1Swenshuai.xi 
638*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
639*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_GetDefaultClientID_KernelProtect()
640*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description:  Get default client id array pointer for protect kernel
641*53ee8cc1Swenshuai.xi /// @param <RET>           \b     : The pointer of Array of client IDs
642*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_GetDefaultClientID_KernelProtect()643*53ee8cc1Swenshuai.xi MS_U8* HAL_MIU_GetDefaultClientID_KernelProtect()
644*53ee8cc1Swenshuai.xi {
645*53ee8cc1Swenshuai.xi      if(IDNUM_KERNELPROTECT > 0)
646*53ee8cc1Swenshuai.xi          return  (MS_U8 *)&clientId_KernelProtect[0];
647*53ee8cc1Swenshuai.xi 
648*53ee8cc1Swenshuai.xi      return NULL;
649*53ee8cc1Swenshuai.xi }
650*53ee8cc1Swenshuai.xi 
651*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
652*53ee8cc1Swenshuai.xi /// @brief \b Function    \b Name: HAL_MIU_ProtectAlign()
653*53ee8cc1Swenshuai.xi /// @brief \b Function    \b Description:  Get the page shift for MIU protect
654*53ee8cc1Swenshuai.xi /// @param <*u32PageShift>\b IN: Page shift
655*53ee8cc1Swenshuai.xi /// @param <RET>          \b OUT: None
656*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_ProtectAlign(void)657*53ee8cc1Swenshuai.xi MS_U32 HAL_MIU_ProtectAlign(void)
658*53ee8cc1Swenshuai.xi {
659*53ee8cc1Swenshuai.xi     MS_U32 u32PageShift;
660*53ee8cc1Swenshuai.xi 
661*53ee8cc1Swenshuai.xi     u32PageShift = MIU_PAGE_SHIFT;
662*53ee8cc1Swenshuai.xi     return u32PageShift;
663*53ee8cc1Swenshuai.xi }
664*53ee8cc1Swenshuai.xi 
665*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
666*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Dram_Size()
667*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set up Dram size for MIU protect
668*53ee8cc1Swenshuai.xi /// @param MiuID        \b IN     : MIU ID
669*53ee8cc1Swenshuai.xi /// @param DramSize     \b IN     : Specified Dram size for MIU protect
670*53ee8cc1Swenshuai.xi /// @param <OUT>           \b None    :
671*53ee8cc1Swenshuai.xi /// @param <RET>           \b None    :
672*53ee8cc1Swenshuai.xi /// @param <GLOBAL>        \b None    :
673*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Dram_Size(MS_U8 MiuID,MS_U8 DramSize)674*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_Dram_Size(MS_U8 MiuID, MS_U8 DramSize)
675*53ee8cc1Swenshuai.xi {
676*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddr;
677*53ee8cc1Swenshuai.xi 
678*53ee8cc1Swenshuai.xi     if(E_MIU_0 == (MIU_ID)MiuID)
679*53ee8cc1Swenshuai.xi     {
680*53ee8cc1Swenshuai.xi         u32RegAddr = MIU_PROTECT_DDR_SIZE;
681*53ee8cc1Swenshuai.xi         switch (DramSize)
682*53ee8cc1Swenshuai.xi         {
683*53ee8cc1Swenshuai.xi             case E_MIU_DDR_32MB:
684*53ee8cc1Swenshuai.xi                 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_32MB);
685*53ee8cc1Swenshuai.xi                 break;
686*53ee8cc1Swenshuai.xi             case E_MIU_DDR_64MB:
687*53ee8cc1Swenshuai.xi                 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_64MB);
688*53ee8cc1Swenshuai.xi                 break;
689*53ee8cc1Swenshuai.xi             case E_MIU_DDR_128MB:
690*53ee8cc1Swenshuai.xi                 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_128MB);
691*53ee8cc1Swenshuai.xi                 break;
692*53ee8cc1Swenshuai.xi             case E_MIU_DDR_256MB:
693*53ee8cc1Swenshuai.xi                 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_256MB);
694*53ee8cc1Swenshuai.xi                 break;
695*53ee8cc1Swenshuai.xi             case E_MIU_DDR_512MB:
696*53ee8cc1Swenshuai.xi                 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_512MB);
697*53ee8cc1Swenshuai.xi                 break;
698*53ee8cc1Swenshuai.xi             case E_MIU_DDR_1024MB:
699*53ee8cc1Swenshuai.xi                 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_1024MB);
700*53ee8cc1Swenshuai.xi                 break;
701*53ee8cc1Swenshuai.xi             case E_MIU_DDR_2048MB:
702*53ee8cc1Swenshuai.xi                 HAL_MIU_WriteByte(u32RegAddr, MIU_PROTECT_DDR_2048MB);
703*53ee8cc1Swenshuai.xi                 break;
704*53ee8cc1Swenshuai.xi             default:
705*53ee8cc1Swenshuai.xi                 return FALSE;
706*53ee8cc1Swenshuai.xi         }
707*53ee8cc1Swenshuai.xi     }
708*53ee8cc1Swenshuai.xi     else
709*53ee8cc1Swenshuai.xi     {
710*53ee8cc1Swenshuai.xi         return FALSE;
711*53ee8cc1Swenshuai.xi     }
712*53ee8cc1Swenshuai.xi     return TRUE;
713*53ee8cc1Swenshuai.xi }
714*53ee8cc1Swenshuai.xi 
715*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
716*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Dram_ReadSize()
717*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set up Dram size for MIU protect
718*53ee8cc1Swenshuai.xi /// @param MiuID        \b IN     : MIU ID
719*53ee8cc1Swenshuai.xi /// @param DramSize     \b IN     : Specified Dram size for MIU protect
720*53ee8cc1Swenshuai.xi /// @param <OUT>           \b None    :
721*53ee8cc1Swenshuai.xi /// @param <RET>           \b None    :
722*53ee8cc1Swenshuai.xi /// @param <GLOBAL>        \b None    :
723*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Dram_ReadSize(MS_U8 MiuID,MIU_DDR_SIZE * pDramSize)724*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_Dram_ReadSize(MS_U8 MiuID, MIU_DDR_SIZE *pDramSize)
725*53ee8cc1Swenshuai.xi {
726*53ee8cc1Swenshuai.xi     return FALSE;
727*53ee8cc1Swenshuai.xi }
728*53ee8cc1Swenshuai.xi 
729*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
730*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: MDrv_MIU_GetClinetNumber()
731*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description:  Get the number of clients for specific MIU block
732*53ee8cc1Swenshuai.xi /// @param DramSize     \b IN     : MIU Block to protect (0 ~ 3)
733*53ee8cc1Swenshuai.xi /// @param <OUT>           \b None    :
734*53ee8cc1Swenshuai.xi /// @param <RET>           \b None    :
735*53ee8cc1Swenshuai.xi /// @param <GLOBAL>        \b None    :
736*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_ClinetNumber(MS_U8 u8Blockx)737*53ee8cc1Swenshuai.xi MS_U8 HAL_MIU_ClinetNumber(MS_U8 u8Blockx)
738*53ee8cc1Swenshuai.xi {
739*53ee8cc1Swenshuai.xi     MS_U8 u8ClientNumber;
740*53ee8cc1Swenshuai.xi 
741*53ee8cc1Swenshuai.xi     switch (u8Blockx)
742*53ee8cc1Swenshuai.xi     {
743*53ee8cc1Swenshuai.xi         case E_MIU_BLOCK_0:
744*53ee8cc1Swenshuai.xi             u8ClientNumber = MIU_BLOCK0_CLIENT_NUMBER;
745*53ee8cc1Swenshuai.xi             break;
746*53ee8cc1Swenshuai.xi         case E_MIU_BLOCK_1:
747*53ee8cc1Swenshuai.xi             u8ClientNumber = MIU_BLOCK1_CLIENT_NUMBER;
748*53ee8cc1Swenshuai.xi             break;
749*53ee8cc1Swenshuai.xi         case E_MIU_BLOCK_2:
750*53ee8cc1Swenshuai.xi             u8ClientNumber = MIU_BLOCK2_CLIENT_NUMBER;
751*53ee8cc1Swenshuai.xi             break;
752*53ee8cc1Swenshuai.xi         case E_MIU_BLOCK_3:
753*53ee8cc1Swenshuai.xi             u8ClientNumber = MIU_BLOCK3_CLIENT_NUMBER;
754*53ee8cc1Swenshuai.xi             break;
755*53ee8cc1Swenshuai.xi         default:
756*53ee8cc1Swenshuai.xi             u8ClientNumber = 0;
757*53ee8cc1Swenshuai.xi     }
758*53ee8cc1Swenshuai.xi 
759*53ee8cc1Swenshuai.xi     return u8ClientNumber;
760*53ee8cc1Swenshuai.xi }
761*53ee8cc1Swenshuai.xi 
762*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
763*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Protect()
764*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description:  Enable/Disable MIU Protection mode
765*53ee8cc1Swenshuai.xi /// @param u8Blockx        \b IN     : MIU Block to protect (0 ~ 4)
766*53ee8cc1Swenshuai.xi /// @param *pu8ProtectId   \b IN     : Allow specified client IDs to write
767*53ee8cc1Swenshuai.xi /// @param u32Start        \b IN     : Starting address
768*53ee8cc1Swenshuai.xi /// @param u32End          \b IN     : End address
769*53ee8cc1Swenshuai.xi /// @param bSetFlag        \b IN     : Disable or Enable MIU protection
770*53ee8cc1Swenshuai.xi ///                                      - -Disable(0)
771*53ee8cc1Swenshuai.xi ///                                      - -Enable(1)
772*53ee8cc1Swenshuai.xi /// @param <OUT>           \b None    :
773*53ee8cc1Swenshuai.xi /// @param <RET>           \b None    :
774*53ee8cc1Swenshuai.xi /// @param <GLOBAL>        \b None    :
775*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Protect(MS_U8 u8Blockx,MS_U8 * pu8ProtectId,MS_PHY u32Start,MS_PHY u32End,MS_BOOL bSetFlag)776*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_Protect(
777*53ee8cc1Swenshuai.xi                           MS_U8    u8Blockx,
778*53ee8cc1Swenshuai.xi                           MS_U8    *pu8ProtectId,
779*53ee8cc1Swenshuai.xi                           MS_PHY   u32Start,
780*53ee8cc1Swenshuai.xi                           MS_PHY   u32End,
781*53ee8cc1Swenshuai.xi                           MS_BOOL  bSetFlag
782*53ee8cc1Swenshuai.xi                          )
783*53ee8cc1Swenshuai.xi {
784*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddr;
785*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddrStar;
786*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddrMSB;
787*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddrIDenable;
788*53ee8cc1Swenshuai.xi     MS_U32 u32MiuProtectEn;
789*53ee8cc1Swenshuai.xi     MS_U32 u32Reg;
790*53ee8cc1Swenshuai.xi     MS_U16 u16Data;
791*53ee8cc1Swenshuai.xi     MS_U16 u16Data1;
792*53ee8cc1Swenshuai.xi     MS_U8  u8Data;
793*53ee8cc1Swenshuai.xi     MS_U8  u8MiuSel;
794*53ee8cc1Swenshuai.xi 
795*53ee8cc1Swenshuai.xi     u8MiuSel = E_MIU_0;
796*53ee8cc1Swenshuai.xi     // Incorrect Block ID
797*53ee8cc1Swenshuai.xi     if(u8Blockx > 3)
798*53ee8cc1Swenshuai.xi     {
799*53ee8cc1Swenshuai.xi         MIU_HAL_ERR("Err: Out of the number of protect device\n")
800*53ee8cc1Swenshuai.xi         return false;
801*53ee8cc1Swenshuai.xi     }
802*53ee8cc1Swenshuai.xi     else if(((u32Start & ((1 << MIU_PAGE_SHIFT) -1)) != 0) || ((u32End & ((1 << MIU_PAGE_SHIFT) -1)) != 0))
803*53ee8cc1Swenshuai.xi     {
804*53ee8cc1Swenshuai.xi         MIU_HAL_ERR("Err: Protected address should be aligned to 8KB\n")
805*53ee8cc1Swenshuai.xi         return false;
806*53ee8cc1Swenshuai.xi     }
807*53ee8cc1Swenshuai.xi     else if(u32Start >= u32End)
808*53ee8cc1Swenshuai.xi     {
809*53ee8cc1Swenshuai.xi         MIU_HAL_ERR("Err: Start address is equal to or more than end address\n")
810*53ee8cc1Swenshuai.xi         return false;
811*53ee8cc1Swenshuai.xi     }
812*53ee8cc1Swenshuai.xi 
813*53ee8cc1Swenshuai.xi     //write_enable
814*53ee8cc1Swenshuai.xi     u8Data = 1 << u8Blockx;
815*53ee8cc1Swenshuai.xi 
816*53ee8cc1Swenshuai.xi //    if( u32Start < HAL_MIU1_BASE)
817*53ee8cc1Swenshuai.xi     {
818*53ee8cc1Swenshuai.xi         u32MiuProtectEn = MIU_PROTECT_EN;
819*53ee8cc1Swenshuai.xi         u32Reg = MIU_REG_BASE;
820*53ee8cc1Swenshuai.xi 
821*53ee8cc1Swenshuai.xi         switch (u8Blockx)
822*53ee8cc1Swenshuai.xi         {
823*53ee8cc1Swenshuai.xi             case E_MIU_BLOCK_0:
824*53ee8cc1Swenshuai.xi                 u32RegAddr = MIU_PROTECT0_ID0;
825*53ee8cc1Swenshuai.xi                 u32RegAddrMSB = MIU_PROTECT0_MSB;
826*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU_PROTECT0_START;
827*53ee8cc1Swenshuai.xi                 u32RegAddrIDenable = MIU_PROTECT0_ID_ENABLE;
828*53ee8cc1Swenshuai.xi                 break;
829*53ee8cc1Swenshuai.xi             case E_MIU_BLOCK_1:
830*53ee8cc1Swenshuai.xi                 u32RegAddr = MIU_PROTECT0_ID0;
831*53ee8cc1Swenshuai.xi                 u32RegAddrMSB = MIU_PROTECT1_MSB;
832*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU_PROTECT1_START;
833*53ee8cc1Swenshuai.xi                 u32RegAddrIDenable = MIU_PROTECT1_ID_ENABLE;
834*53ee8cc1Swenshuai.xi                 break;
835*53ee8cc1Swenshuai.xi             case E_MIU_BLOCK_2:
836*53ee8cc1Swenshuai.xi                 u32RegAddr = MIU_PROTECT0_ID0;
837*53ee8cc1Swenshuai.xi                 u32RegAddrMSB = MIU_PROTECT2_MSB;
838*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU_PROTECT2_START;
839*53ee8cc1Swenshuai.xi                 u32RegAddrIDenable = MIU_PROTECT2_ID_ENABLE;
840*53ee8cc1Swenshuai.xi                 break;
841*53ee8cc1Swenshuai.xi             case E_MIU_BLOCK_3:
842*53ee8cc1Swenshuai.xi                 u32RegAddr = MIU_PROTECT0_ID0;
843*53ee8cc1Swenshuai.xi                 u32RegAddrMSB = MIU_PROTECT3_MSB;
844*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU_PROTECT3_START;
845*53ee8cc1Swenshuai.xi                 u32RegAddrIDenable = MIU_PROTECT3_ID_ENABLE;
846*53ee8cc1Swenshuai.xi                 break;
847*53ee8cc1Swenshuai.xi             default:
848*53ee8cc1Swenshuai.xi                 return false;
849*53ee8cc1Swenshuai.xi         }
850*53ee8cc1Swenshuai.xi     }
851*53ee8cc1Swenshuai.xi 
852*53ee8cc1Swenshuai.xi     // Disable MIU protect
853*53ee8cc1Swenshuai.xi     HAL_MIU_WriteRegBit(u32MiuProtectEn,u8Data,DISABLE);
854*53ee8cc1Swenshuai.xi 
855*53ee8cc1Swenshuai.xi     if ( bSetFlag )
856*53ee8cc1Swenshuai.xi     {
857*53ee8cc1Swenshuai.xi         // Set Protect IDs
858*53ee8cc1Swenshuai.xi         if(HAL_MIU_SetGroupID(u8MiuSel, u8Blockx, pu8ProtectId, u32RegAddr, u32RegAddrIDenable) == FALSE)
859*53ee8cc1Swenshuai.xi         {
860*53ee8cc1Swenshuai.xi             return FALSE;
861*53ee8cc1Swenshuai.xi         }
862*53ee8cc1Swenshuai.xi 
863*53ee8cc1Swenshuai.xi         // Set BIT29,30 of start/end address
864*53ee8cc1Swenshuai.xi         u16Data1 = HAL_MIU_Read2Byte(u32RegAddrMSB);
865*53ee8cc1Swenshuai.xi         u16Data1 &= ~(0x0003 << (u8Blockx * 4));
866*53ee8cc1Swenshuai.xi         u16Data1 |= (MS_U16)((u32Start >> 29) << (u8Blockx * 4));
867*53ee8cc1Swenshuai.xi         u16Data1 &= ~(0x0003 << (u8Blockx * 4 + 2));
868*53ee8cc1Swenshuai.xi         u16Data1 |= (MS_U16)(((u32End -1) >> 29) << (u8Blockx * 4 + 2));
869*53ee8cc1Swenshuai.xi         HAL_MIU_Write2Byte(u32RegAddrMSB, u16Data1);
870*53ee8cc1Swenshuai.xi 
871*53ee8cc1Swenshuai.xi         // Start Address
872*53ee8cc1Swenshuai.xi         u16Data = (MS_U16)(u32Start >> MIU_PAGE_SHIFT);   //8k/unit
873*53ee8cc1Swenshuai.xi         HAL_MIU_Write2Byte(u32RegAddrStar , u16Data);
874*53ee8cc1Swenshuai.xi 
875*53ee8cc1Swenshuai.xi         // End Address
876*53ee8cc1Swenshuai.xi         u16Data = (MS_U16)((u32End >> MIU_PAGE_SHIFT)-1);   //8k/unit;
877*53ee8cc1Swenshuai.xi         HAL_MIU_Write2Byte(u32RegAddrStar + 2, u16Data);
878*53ee8cc1Swenshuai.xi 
879*53ee8cc1Swenshuai.xi         // Enable MIU protect
880*53ee8cc1Swenshuai.xi         HAL_MIU_WriteRegBit(u32MiuProtectEn, u8Data, ENABLE);
881*53ee8cc1Swenshuai.xi     }
882*53ee8cc1Swenshuai.xi     else
883*53ee8cc1Swenshuai.xi     {
884*53ee8cc1Swenshuai.xi         // Reset Protect IDs
885*53ee8cc1Swenshuai.xi         HAL_MIU_ResetGroupID(u8MiuSel, u8Blockx, pu8ProtectId, u32RegAddr, u32RegAddrIDenable);
886*53ee8cc1Swenshuai.xi     }
887*53ee8cc1Swenshuai.xi 
888*53ee8cc1Swenshuai.xi     // clear log
889*53ee8cc1Swenshuai.xi     HAL_MIU_Write2BytesBit(u32Reg+REG_MIU_PROTECT_STATUS, TRUE, REG_MIU_PROTECT_LOG_CLR);
890*53ee8cc1Swenshuai.xi     HAL_MIU_Write2BytesBit(u32Reg+REG_MIU_PROTECT_STATUS, FALSE, REG_MIU_PROTECT_LOG_CLR);
891*53ee8cc1Swenshuai.xi 
892*53ee8cc1Swenshuai.xi     return TRUE;
893*53ee8cc1Swenshuai.xi }
894*53ee8cc1Swenshuai.xi 
895*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
896*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_ProtectEx()
897*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description:  Enable/Disable MIU Protection mode
898*53ee8cc1Swenshuai.xi /// @param u8Blockx        \b IN     : MIU Block to protect (0 ~ 4)
899*53ee8cc1Swenshuai.xi /// @param *pu8ProtectId   \b IN     : Allow specified client IDs to write
900*53ee8cc1Swenshuai.xi /// @param u32Start        \b IN     : Starting address
901*53ee8cc1Swenshuai.xi /// @param u32End          \b IN     : End address
902*53ee8cc1Swenshuai.xi /// @param bSetFlag        \b IN     : Disable or Enable MIU protection
903*53ee8cc1Swenshuai.xi ///                                      - -Disable(0)
904*53ee8cc1Swenshuai.xi ///                                      - -Enable(1)
905*53ee8cc1Swenshuai.xi /// @param <OUT>           \b None    :
906*53ee8cc1Swenshuai.xi /// @param <RET>           \b None    :
907*53ee8cc1Swenshuai.xi /// @param <GLOBAL>        \b None    :
908*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_ProtectEx(MS_U8 u8Blockx,MS_U32 * pu32ProtectId,MS_PHY u32Start,MS_PHY u32End,MS_BOOL bSetFlag)909*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_ProtectEx(
910*53ee8cc1Swenshuai.xi                           MS_U8    u8Blockx,
911*53ee8cc1Swenshuai.xi                           MS_U32    *pu32ProtectId,
912*53ee8cc1Swenshuai.xi                           MS_PHY   u32Start,
913*53ee8cc1Swenshuai.xi                           MS_PHY   u32End,
914*53ee8cc1Swenshuai.xi                           MS_BOOL  bSetFlag
915*53ee8cc1Swenshuai.xi                          )
916*53ee8cc1Swenshuai.xi {
917*53ee8cc1Swenshuai.xi     return FALSE;
918*53ee8cc1Swenshuai.xi }
919*53ee8cc1Swenshuai.xi 
920*53ee8cc1Swenshuai.xi #define GET_HIT_BLOCK(regval)       BITS_RANGE_VAL(regval, REG_MIU_PROTECT_HIT_NO)
921*53ee8cc1Swenshuai.xi #define GET_HIT_CLIENT(regval)      BITS_RANGE_VAL(regval, REG_MIU_PROTECT_HIT_ID)
922*53ee8cc1Swenshuai.xi 
HAL_MIU_GetProtectInfo(MS_U8 u8MiuDev,MIU_PortectInfo * pInfo)923*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_GetProtectInfo(MS_U8 u8MiuDev, MIU_PortectInfo *pInfo)
924*53ee8cc1Swenshuai.xi {
925*53ee8cc1Swenshuai.xi     MS_U16 ret = 0;
926*53ee8cc1Swenshuai.xi     MS_U16 loaddr = 0;
927*53ee8cc1Swenshuai.xi     MS_U16 hiaddr = 0;
928*53ee8cc1Swenshuai.xi     MS_U32 u32Address = 0;
929*53ee8cc1Swenshuai.xi     MS_U32 u32Reg = (u8MiuDev) ? MIU1_REG_BASE : MIU_REG_BASE;
930*53ee8cc1Swenshuai.xi 
931*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuDev)
932*53ee8cc1Swenshuai.xi         return FALSE;
933*53ee8cc1Swenshuai.xi 
934*53ee8cc1Swenshuai.xi     if (!pInfo)
935*53ee8cc1Swenshuai.xi         return FALSE;
936*53ee8cc1Swenshuai.xi 
937*53ee8cc1Swenshuai.xi     ret = HAL_MIU_Read2Byte(u32Reg+REG_MIU_PROTECT_STATUS);
938*53ee8cc1Swenshuai.xi     loaddr = HAL_MIU_Read2Byte(u32Reg+REG_MIU_PROTECT_LOADDR);
939*53ee8cc1Swenshuai.xi     hiaddr = HAL_MIU_Read2Byte(u32Reg+REG_MIU_PROTECT_HIADDR);
940*53ee8cc1Swenshuai.xi 
941*53ee8cc1Swenshuai.xi     pInfo->bHit = false;
942*53ee8cc1Swenshuai.xi 
943*53ee8cc1Swenshuai.xi     if (REG_MIU_PROTECT_HIT_FALG & ret)
944*53ee8cc1Swenshuai.xi     {
945*53ee8cc1Swenshuai.xi         pInfo->bHit = TRUE;
946*53ee8cc1Swenshuai.xi 
947*53ee8cc1Swenshuai.xi         pInfo->u8Block = (MS_U8)GET_HIT_BLOCK(ret);
948*53ee8cc1Swenshuai.xi         pInfo->u8Group = (MS_U8)(GET_HIT_CLIENT(ret) >> 4);
949*53ee8cc1Swenshuai.xi         pInfo->u8ClientID = (MS_U8)(GET_HIT_CLIENT(ret) & 0x0F);
950*53ee8cc1Swenshuai.xi         u32Address = (MS_U32)((hiaddr << 16) | loaddr) ;
951*53ee8cc1Swenshuai.xi         u32Address = u32Address * MIU_PROTECT_ADDRESS_UNIT;
952*53ee8cc1Swenshuai.xi 
953*53ee8cc1Swenshuai.xi         printf("MIU%u Block:%u Group:%u ClientID:%u Hitted_Address:0x%x<->0x%x\n", u8MiuDev, pInfo->u8Block, pInfo->u8Group, pInfo->u8ClientID, (unsigned int)u32Address, (unsigned int)(u32Address + MIU_PROTECT_ADDRESS_UNIT - 1));
954*53ee8cc1Swenshuai.xi 
955*53ee8cc1Swenshuai.xi         //clear log
956*53ee8cc1Swenshuai.xi         HAL_MIU_Write2BytesBit(u32Reg+REG_MIU_PROTECT_STATUS, TRUE, REG_MIU_PROTECT_LOG_CLR);
957*53ee8cc1Swenshuai.xi         HAL_MIU_Write2BytesBit(u32Reg+REG_MIU_PROTECT_STATUS, FALSE, REG_MIU_PROTECT_LOG_CLR);
958*53ee8cc1Swenshuai.xi     }
959*53ee8cc1Swenshuai.xi 
960*53ee8cc1Swenshuai.xi     return TRUE;
961*53ee8cc1Swenshuai.xi }
962*53ee8cc1Swenshuai.xi 
963*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
964*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_SetSsc()
965*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: MDrv_MIU_SetSsc, @Step & Span
966*53ee8cc1Swenshuai.xi /// @param u16Fmodulation   \b IN : 20KHz ~ 40KHz (Input Value = 20 ~ 40)
967*53ee8cc1Swenshuai.xi /// @param u16FDeviation    \b IN  : under 0.1% ~ 2% (Input Value = 1 ~ 20)
968*53ee8cc1Swenshuai.xi /// @param bEnable          \b IN    :
969*53ee8cc1Swenshuai.xi /// @param None             \b OUT  :
970*53ee8cc1Swenshuai.xi /// @param None             \b RET  :
971*53ee8cc1Swenshuai.xi /// @param None             \b GLOBAL :
972*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_SetSsc(MS_U8 u8MiuDev,MS_U16 u16Fmodulation,MS_U16 u16FDeviation,MS_BOOL bEnable)973*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_SetSsc(MS_U8 u8MiuDev, MS_U16 u16Fmodulation, MS_U16 u16FDeviation, MS_BOOL bEnable)
974*53ee8cc1Swenshuai.xi {
975*53ee8cc1Swenshuai.xi     MS_U32 uDDFSET, uDDR_MHz, uDDFStep, uRegBase = MIU_ATOP_BASE;
976*53ee8cc1Swenshuai.xi     MS_U16 u16DDFSpan;
977*53ee8cc1Swenshuai.xi     MS_U16 u16Input_DIV_First,u16Input_DIV_Second,u16Loop_DIV_First,u16Loop_DIV_Second;
978*53ee8cc1Swenshuai.xi     MS_U8  u8Temp,i;
979*53ee8cc1Swenshuai.xi 
980*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuDev)
981*53ee8cc1Swenshuai.xi         return FALSE;
982*53ee8cc1Swenshuai.xi 
983*53ee8cc1Swenshuai.xi     //Pre check the input
984*53ee8cc1Swenshuai.xi         if (u8MiuDev == 1)
985*53ee8cc1Swenshuai.xi         {
986*53ee8cc1Swenshuai.xi            if((HAL_MIU_Read2Byte(MIU1_REG_BASE)&BIT15))
987*53ee8cc1Swenshuai.xi            {
988*53ee8cc1Swenshuai.xi                uRegBase = MIU_ATOP_BASE+0x80;
989*53ee8cc1Swenshuai.xi            }
990*53ee8cc1Swenshuai.xi            else
991*53ee8cc1Swenshuai.xi            {
992*53ee8cc1Swenshuai.xi                printf("there is no MIU1\n");
993*53ee8cc1Swenshuai.xi                return 0;
994*53ee8cc1Swenshuai.xi            }
995*53ee8cc1Swenshuai.xi         }
996*53ee8cc1Swenshuai.xi         else
997*53ee8cc1Swenshuai.xi         {
998*53ee8cc1Swenshuai.xi            uRegBase = MIU_ATOP_BASE;
999*53ee8cc1Swenshuai.xi         }
1000*53ee8cc1Swenshuai.xi 
1001*53ee8cc1Swenshuai.xi         HAL_MIU_SSC_DBG(printf("MMIO base:%lx uRegBase:%lx\n", _gMIU_MapBase, uRegBase));
1002*53ee8cc1Swenshuai.xi 
1003*53ee8cc1Swenshuai.xi         if ((u16Fmodulation<20)||(u16Fmodulation>40))
1004*53ee8cc1Swenshuai.xi         {
1005*53ee8cc1Swenshuai.xi             MIU_HAL_ERR("SSC u16Fmodulation Error...(20KHz - 40KHz)\n");
1006*53ee8cc1Swenshuai.xi             return 0;
1007*53ee8cc1Swenshuai.xi         }
1008*53ee8cc1Swenshuai.xi 
1009*53ee8cc1Swenshuai.xi         if ((u16FDeviation<1)||(u16FDeviation>20))
1010*53ee8cc1Swenshuai.xi         {
1011*53ee8cc1Swenshuai.xi             MIU_HAL_ERR("SSC u16FDeviation Error...(0.1%% - 2%% ==> 1 ~20)\n");
1012*53ee8cc1Swenshuai.xi             return 0;
1013*53ee8cc1Swenshuai.xi         }
1014*53ee8cc1Swenshuai.xi 
1015*53ee8cc1Swenshuai.xi         HAL_MIU_SSC_DBG(printf("---> u16Fmodulation = %d u16FDeviation = %d \n",(int)u16Fmodulation,(int)u16FDeviation));
1016*53ee8cc1Swenshuai.xi     //<1>.Caculate DDFM = (Loop_DIV_First * Loop_DIV_Second)/(Input_DIV_First * Input_DIV_Second);
1017*53ee8cc1Swenshuai.xi         //Prepare Input_DIV_First
1018*53ee8cc1Swenshuai.xi         u8Temp = ((MS_U16)(HAL_MIU_Read2Byte(uRegBase+MIU_DDRPLL_DIV_FIRST)&0x30)>>4);       //Bit 13,12 (0x110D36)
1019*53ee8cc1Swenshuai.xi         u16Input_DIV_First = 0x01;
1020*53ee8cc1Swenshuai.xi         for (i=0;i<u8Temp;i++)
1021*53ee8cc1Swenshuai.xi             u16Input_DIV_First = u16Input_DIV_First << 1;
1022*53ee8cc1Swenshuai.xi         //Prepare Input_DIV_Second
1023*53ee8cc1Swenshuai.xi         u16Input_DIV_Second = (HAL_MIU_ReadByte(uRegBase+MIU_PLL_INPUT_DIV_2ND));     //Bit 0~7 (0x101222)
1024*53ee8cc1Swenshuai.xi         if (u16Input_DIV_Second == 0)
1025*53ee8cc1Swenshuai.xi             u16Input_DIV_Second = 1;
1026*53ee8cc1Swenshuai.xi         //Prepare Loop_DIV_First
1027*53ee8cc1Swenshuai.xi         u8Temp = ((HAL_MIU_ReadByte(uRegBase+MIU_DDRPLL_DIV_FIRST)&0xC0)>>6);         //Bit 15,14 (0x110D36)
1028*53ee8cc1Swenshuai.xi         u16Loop_DIV_First = 0x01;
1029*53ee8cc1Swenshuai.xi          for (i=0;i<u8Temp;i++)
1030*53ee8cc1Swenshuai.xi             u16Loop_DIV_First = u16Loop_DIV_First << 1;
1031*53ee8cc1Swenshuai.xi 
1032*53ee8cc1Swenshuai.xi         //Prepare Loop_DIV_Second
1033*53ee8cc1Swenshuai.xi         u16Loop_DIV_Second = (HAL_MIU_ReadByte(uRegBase+MIU_PLL_LOOP_DIV_2ND));      //Bit 0~7 (0x101223)
1034*53ee8cc1Swenshuai.xi         if (u16Loop_DIV_Second == 0)
1035*53ee8cc1Swenshuai.xi             u16Loop_DIV_Second = 1;
1036*53ee8cc1Swenshuai.xi 
1037*53ee8cc1Swenshuai.xi     //<2>.From DDFSET register to get DDRPLL
1038*53ee8cc1Swenshuai.xi         uDDFSET = HAL_MIU_Read4Byte(uRegBase+MIU_DDFSET) & 0x00ffffff;
1039*53ee8cc1Swenshuai.xi         //DDRPLL = MPPL * DDR_FACTOR * Loop_First * Loop_Second / DDFSET * Input_First * Input_Second
1040*53ee8cc1Swenshuai.xi         HAL_MIU_SSC_DBG(printf("---> Loop_First:%u Loop_Second:%u\n", u16Loop_DIV_First, u16Loop_DIV_Second));
1041*53ee8cc1Swenshuai.xi         HAL_MIU_SSC_DBG(printf("---> Input_first:%u Input_second:%u\n", u16Input_DIV_First, u16Input_DIV_Second));
1042*53ee8cc1Swenshuai.xi         uDDR_MHz = (MPPL * DDR_FACTOR * u16Loop_DIV_First * u16Loop_DIV_Second)/ (uDDFSET*u16Input_DIV_First*u16Input_DIV_Second);
1043*53ee8cc1Swenshuai.xi         HAL_MIU_SSC_DBG(printf("---> uDDFSET = 0x%lx\n",uDDFSET));
1044*53ee8cc1Swenshuai.xi         HAL_MIU_SSC_DBG(printf("---> DDR_MHZ = 0x%lx (%d MHz)\n",uDDR_MHz,(int)uDDR_MHz));
1045*53ee8cc1Swenshuai.xi 
1046*53ee8cc1Swenshuai.xi     //<3>.Caculate DDFSPAN = (MPLL * DDFSPAN_FACTOR * MHz) / (DDFSET * Fmodulation * KHz)
1047*53ee8cc1Swenshuai.xi         u16DDFSpan = (MS_U32)((DDFSPAN_FACTOR * MPPL/u16Fmodulation)* 1000/uDDFSET);
1048*53ee8cc1Swenshuai.xi         HAL_MIU_SSC_DBG(printf("---> DDFSPAN = 0x%x (%d)\n",u16DDFSpan,(int)u16DDFSpan));
1049*53ee8cc1Swenshuai.xi         if (u16DDFSpan > 0x3FFF)
1050*53ee8cc1Swenshuai.xi         {
1051*53ee8cc1Swenshuai.xi             u16DDFSpan = 0x3FFF;
1052*53ee8cc1Swenshuai.xi             HAL_MIU_SSC_DBG(printf("??? DDFSPAN overflow > 0x3FFF, Fource set to 0x03FF\n"));
1053*53ee8cc1Swenshuai.xi         }
1054*53ee8cc1Swenshuai.xi 
1055*53ee8cc1Swenshuai.xi         //Write to Register
1056*53ee8cc1Swenshuai.xi         HAL_MIU_Write2Byte(uRegBase+MIU_DDFSPAN,u16DDFSpan);
1057*53ee8cc1Swenshuai.xi     //<4>.Caculate DDFSTEP = (FDeviation*DDFSET/10)/(DDFSPAN*100)
1058*53ee8cc1Swenshuai.xi         uDDFStep = (MS_U32)((u16FDeviation * (uDDFSET/10))/(u16DDFSpan*100));
1059*53ee8cc1Swenshuai.xi         HAL_MIU_SSC_DBG(printf("---> DDFSTEP = 0x%lx (%lu)\n",uDDFStep,uDDFStep));
1060*53ee8cc1Swenshuai.xi         //Write to Register
1061*53ee8cc1Swenshuai.xi         uDDFStep &= (0x03FF);
1062*53ee8cc1Swenshuai.xi         HAL_MIU_Write2Byte(uRegBase+MIU_DDFSTEP,(HAL_MIU_Read2Byte(uRegBase+MIU_DDFSTEP) & (~0x03FF))|uDDFStep);
1063*53ee8cc1Swenshuai.xi 
1064*53ee8cc1Swenshuai.xi     //<5>.Set ENABLE
1065*53ee8cc1Swenshuai.xi         if(bEnable == ENABLE)
1066*53ee8cc1Swenshuai.xi             HAL_MIU_WriteByte(uRegBase+MIU_SSC_EN,(HAL_MIU_ReadByte(uRegBase+MIU_SSC_EN)|0xC0));
1067*53ee8cc1Swenshuai.xi         else
1068*53ee8cc1Swenshuai.xi             HAL_MIU_WriteByte(uRegBase+MIU_SSC_EN,(HAL_MIU_ReadByte(uRegBase+MIU_SSC_EN)&(~0xC0))|0x80);
1069*53ee8cc1Swenshuai.xi     return 1;
1070*53ee8cc1Swenshuai.xi }
1071*53ee8cc1Swenshuai.xi 
1072*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1073*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_MaskReq()
1074*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Mask MIU request
1075*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1076*53ee8cc1Swenshuai.xi /// @param eClientID IN     \b  : client ID
1077*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1078*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1079*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1080*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_MaskReq(MS_U8 u8Miu,eMIUClientID eClientID)1081*53ee8cc1Swenshuai.xi void HAL_MIU_MaskReq(MS_U8 u8Miu, eMIUClientID eClientID)
1082*53ee8cc1Swenshuai.xi {
1083*53ee8cc1Swenshuai.xi     MS_S16 sVal;
1084*53ee8cc1Swenshuai.xi     MS_U32 u32Reg;
1085*53ee8cc1Swenshuai.xi 
1086*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8Miu)
1087*53ee8cc1Swenshuai.xi         return;
1088*53ee8cc1Swenshuai.xi 
1089*53ee8cc1Swenshuai.xi     sVal = HAL_MIU_GetClientInfo(u8Miu, eClientID);
1090*53ee8cc1Swenshuai.xi     if (sVal < 0)
1091*53ee8cc1Swenshuai.xi         printf("%s not support client ID:%u!\n", __FUNCTION__, eClientID);
1092*53ee8cc1Swenshuai.xi     else
1093*53ee8cc1Swenshuai.xi     {
1094*53ee8cc1Swenshuai.xi         if(u8Miu == E_MIU_0)
1095*53ee8cc1Swenshuai.xi         {
1096*53ee8cc1Swenshuai.xi             MIU_RQX_MASK(u32Reg, MIU_GET_CLIENT_GROUP(sVal));
1097*53ee8cc1Swenshuai.xi         }
1098*53ee8cc1Swenshuai.xi         else if(u8Miu == E_MIU_1)
1099*53ee8cc1Swenshuai.xi         {
1100*53ee8cc1Swenshuai.xi             MIU1_RQX_MASK(u32Reg, MIU_GET_CLIENT_GROUP(sVal));
1101*53ee8cc1Swenshuai.xi         }
1102*53ee8cc1Swenshuai.xi         else
1103*53ee8cc1Swenshuai.xi         {
1104*53ee8cc1Swenshuai.xi  	       printf("%s not support MIU%u!\n", __FUNCTION__, u8Miu );
1105*53ee8cc1Swenshuai.xi  	       return;
1106*53ee8cc1Swenshuai.xi         }
1107*53ee8cc1Swenshuai.xi 
1108*53ee8cc1Swenshuai.xi         HAL_MIU_Write2BytesBit(u32Reg, TRUE, BIT(MIU_GET_CLIENT_POS(sVal)));
1109*53ee8cc1Swenshuai.xi     }
1110*53ee8cc1Swenshuai.xi }
1111*53ee8cc1Swenshuai.xi 
1112*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1113*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_UnMaskReq()
1114*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Mask MIU request
1115*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1116*53ee8cc1Swenshuai.xi /// @param eClientID IN      \b  : client ID
1117*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1118*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1119*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1120*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_UnMaskReq(MS_U8 u8Miu,eMIUClientID eClientID)1121*53ee8cc1Swenshuai.xi void HAL_MIU_UnMaskReq(MS_U8 u8Miu, eMIUClientID eClientID)
1122*53ee8cc1Swenshuai.xi {
1123*53ee8cc1Swenshuai.xi     MS_S16 sVal;
1124*53ee8cc1Swenshuai.xi     MS_U32 u32Reg;
1125*53ee8cc1Swenshuai.xi 
1126*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8Miu)
1127*53ee8cc1Swenshuai.xi         return;
1128*53ee8cc1Swenshuai.xi 
1129*53ee8cc1Swenshuai.xi     sVal = HAL_MIU_GetClientInfo(u8Miu, eClientID);
1130*53ee8cc1Swenshuai.xi     if (sVal < 0)
1131*53ee8cc1Swenshuai.xi         printf("%s not support client ID:%u!\n", __FUNCTION__, eClientID);
1132*53ee8cc1Swenshuai.xi     else
1133*53ee8cc1Swenshuai.xi     {
1134*53ee8cc1Swenshuai.xi         if(u8Miu == E_MIU_0)
1135*53ee8cc1Swenshuai.xi         {
1136*53ee8cc1Swenshuai.xi             MIU_RQX_MASK(u32Reg, MIU_GET_CLIENT_GROUP(sVal));
1137*53ee8cc1Swenshuai.xi         }
1138*53ee8cc1Swenshuai.xi         else if(u8Miu == E_MIU_1)
1139*53ee8cc1Swenshuai.xi         {
1140*53ee8cc1Swenshuai.xi             MIU1_RQX_MASK(u32Reg, MIU_GET_CLIENT_GROUP(sVal));
1141*53ee8cc1Swenshuai.xi         }
1142*53ee8cc1Swenshuai.xi         else
1143*53ee8cc1Swenshuai.xi         {
1144*53ee8cc1Swenshuai.xi  	       printf("%s not support MIU%u!\n", __FUNCTION__, u8Miu );
1145*53ee8cc1Swenshuai.xi  	       return;
1146*53ee8cc1Swenshuai.xi         }
1147*53ee8cc1Swenshuai.xi 
1148*53ee8cc1Swenshuai.xi         HAL_MIU_Write2BytesBit(u32Reg, FALSE, BIT(MIU_GET_CLIENT_POS(sVal)));
1149*53ee8cc1Swenshuai.xi     }
1150*53ee8cc1Swenshuai.xi }
1151*53ee8cc1Swenshuai.xi 
1152*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1153*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_SelMIU()
1154*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: MIU selection
1155*53ee8cc1Swenshuai.xi /// @param u8MiuDev    IN   \b  : miu device
1156*53ee8cc1Swenshuai.xi /// @param u16ClientID IN   \b  : client ID
1157*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1158*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1159*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1160*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_SelMIU(eMIU_SelType eType,eMIUClientID eClientID)1161*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_SelMIU(eMIU_SelType eType, eMIUClientID eClientID)
1162*53ee8cc1Swenshuai.xi {
1163*53ee8cc1Swenshuai.xi     MS_S16 sVal;
1164*53ee8cc1Swenshuai.xi     MS_U32 u32Reg = 0;
1165*53ee8cc1Swenshuai.xi 
1166*53ee8cc1Swenshuai.xi     //MIU 0
1167*53ee8cc1Swenshuai.xi     sVal = HAL_MIU_GetClientInfo(0, eClientID);
1168*53ee8cc1Swenshuai.xi     if (sVal < 0)
1169*53ee8cc1Swenshuai.xi         goto fail;
1170*53ee8cc1Swenshuai.xi 
1171*53ee8cc1Swenshuai.xi     u32Reg = MIU_REG_BASE + REG_MIU_SELX(MIU_GET_CLIENT_GROUP(sVal));
1172*53ee8cc1Swenshuai.xi     HAL_MIU_Write2BytesBit(u32Reg, (MIU_SELTYPE_MIU1 == eType), BIT(MIU_GET_CLIENT_POS(sVal)));
1173*53ee8cc1Swenshuai.xi 
1174*53ee8cc1Swenshuai.xi     //MIU 1
1175*53ee8cc1Swenshuai.xi     sVal = HAL_MIU_GetClientInfo(1, eClientID);
1176*53ee8cc1Swenshuai.xi     if (sVal < 0)
1177*53ee8cc1Swenshuai.xi         goto fail;
1178*53ee8cc1Swenshuai.xi     u32Reg = MIU1_REG_BASE + REG_MIU_SELX(MIU_GET_CLIENT_GROUP(sVal));
1179*53ee8cc1Swenshuai.xi     HAL_MIU_Write2BytesBit(u32Reg, (MIU_SELTYPE_MIU_ALL == eType), BIT(MIU_GET_CLIENT_POS(sVal)));
1180*53ee8cc1Swenshuai.xi 
1181*53ee8cc1Swenshuai.xi     return TRUE;
1182*53ee8cc1Swenshuai.xi 
1183*53ee8cc1Swenshuai.xi fail:
1184*53ee8cc1Swenshuai.xi     printf("%s not support client ID:%u!\n", __FUNCTION__, eClientID);
1185*53ee8cc1Swenshuai.xi     return FALSE;
1186*53ee8cc1Swenshuai.xi }
1187*53ee8cc1Swenshuai.xi 
1188*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1189*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: MDrv_MIU_Mask_Req_OPM_R()
1190*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1191*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1192*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1193*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1194*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1195*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1196*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_OPM_R(MS_U8 u8Mask,MS_U8 u8Miu)1197*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_OPM_R(MS_U8 u8Mask, MS_U8 u8Miu)
1198*53ee8cc1Swenshuai.xi {
1199*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8Miu)
1200*53ee8cc1Swenshuai.xi         return;
1201*53ee8cc1Swenshuai.xi 
1202*53ee8cc1Swenshuai.xi     if(u8Miu == 0)
1203*53ee8cc1Swenshuai.xi         _MaskMiuReq_OPM_R(u8Mask);
1204*53ee8cc1Swenshuai.xi     else
1205*53ee8cc1Swenshuai.xi        _MaskMiu1Req_OPM_R(u8Mask);
1206*53ee8cc1Swenshuai.xi 
1207*53ee8cc1Swenshuai.xi }
1208*53ee8cc1Swenshuai.xi 
1209*53ee8cc1Swenshuai.xi 
1210*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1211*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Mask_Req_DNRB_R()
1212*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1213*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1214*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1215*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1216*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1217*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1218*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_DNRB_R(MS_U8 u8Mask,MS_U8 u8Miu)1219*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_DNRB_R(MS_U8 u8Mask, MS_U8 u8Miu)
1220*53ee8cc1Swenshuai.xi {
1221*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8Miu)
1222*53ee8cc1Swenshuai.xi         return;
1223*53ee8cc1Swenshuai.xi 
1224*53ee8cc1Swenshuai.xi     if (u8Miu == 0)
1225*53ee8cc1Swenshuai.xi         _MaskMiuReq_DNRB_R(u8Mask);
1226*53ee8cc1Swenshuai.xi     else
1227*53ee8cc1Swenshuai.xi        _MaskMiu1Req_DNRB_R(u8Mask);
1228*53ee8cc1Swenshuai.xi }
1229*53ee8cc1Swenshuai.xi 
1230*53ee8cc1Swenshuai.xi 
1231*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1232*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Mask_Req_DNRB_W()
1233*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1234*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1235*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1236*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1237*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1238*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1239*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_DNRB_W(MS_U8 u8Mask,MS_U8 u8Miu)1240*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_DNRB_W(MS_U8 u8Mask, MS_U8 u8Miu)
1241*53ee8cc1Swenshuai.xi {
1242*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8Miu)
1243*53ee8cc1Swenshuai.xi         return;
1244*53ee8cc1Swenshuai.xi 
1245*53ee8cc1Swenshuai.xi     if (u8Miu == 0)
1246*53ee8cc1Swenshuai.xi         _MaskMiuReq_DNRB_W(u8Mask);
1247*53ee8cc1Swenshuai.xi     else
1248*53ee8cc1Swenshuai.xi        _MaskMiu1Req_DNRB_W(u8Mask);
1249*53ee8cc1Swenshuai.xi }
1250*53ee8cc1Swenshuai.xi 
1251*53ee8cc1Swenshuai.xi 
1252*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1253*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Mask_Req_DNRB_RW()
1254*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1255*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1256*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1257*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1258*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1259*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1260*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_DNRB_RW(MS_U8 u8Mask,MS_U8 u8Miu)1261*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_DNRB_RW(MS_U8 u8Mask, MS_U8 u8Miu)
1262*53ee8cc1Swenshuai.xi {
1263*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8Miu)
1264*53ee8cc1Swenshuai.xi         return;
1265*53ee8cc1Swenshuai.xi 
1266*53ee8cc1Swenshuai.xi     if (u8Miu == 0)
1267*53ee8cc1Swenshuai.xi         _MaskMiuReq_DNRB_RW(u8Mask);
1268*53ee8cc1Swenshuai.xi     else
1269*53ee8cc1Swenshuai.xi        _MaskMiu1Req_DNRB_RW(u8Mask);
1270*53ee8cc1Swenshuai.xi }
1271*53ee8cc1Swenshuai.xi 
1272*53ee8cc1Swenshuai.xi 
1273*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1274*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Mask_Req_SC_RW()
1275*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1276*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1277*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1278*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1279*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1280*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1281*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_SC_RW(MS_U8 u8Mask,MS_U8 u8Miu)1282*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_SC_RW(MS_U8 u8Mask, MS_U8 u8Miu)
1283*53ee8cc1Swenshuai.xi {
1284*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8Miu)
1285*53ee8cc1Swenshuai.xi         return;
1286*53ee8cc1Swenshuai.xi 
1287*53ee8cc1Swenshuai.xi     if (u8Miu == 0)
1288*53ee8cc1Swenshuai.xi         _MaskMiuReq_SC_RW(u8Mask);
1289*53ee8cc1Swenshuai.xi     else
1290*53ee8cc1Swenshuai.xi         _MaskMiu1Req_SC_RW(u8Mask);
1291*53ee8cc1Swenshuai.xi }
1292*53ee8cc1Swenshuai.xi 
1293*53ee8cc1Swenshuai.xi 
1294*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1295*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Mask_Req_MVOP_R()
1296*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1297*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1298*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1299*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1300*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1301*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1302*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_MVOP_R(MS_U8 u8Mask,MS_U8 u8Miu)1303*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_MVOP_R(MS_U8 u8Mask, MS_U8 u8Miu)
1304*53ee8cc1Swenshuai.xi {
1305*53ee8cc1Swenshuai.xi     HAL_MIU_MaskReq(u8Miu, MIU_CLIENT_MVOP_64BIT_R);
1306*53ee8cc1Swenshuai.xi }
1307*53ee8cc1Swenshuai.xi 
1308*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1309*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Mask_Req_MVD_R()
1310*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1311*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1312*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1313*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1314*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1315*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1316*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_MVD_R(MS_U8 u8Mask,MS_U8 u8Miu)1317*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_MVD_R(MS_U8 u8Mask, MS_U8 u8Miu)
1318*53ee8cc1Swenshuai.xi {
1319*53ee8cc1Swenshuai.xi     _FUNC_NOT_USED();
1320*53ee8cc1Swenshuai.xi }
1321*53ee8cc1Swenshuai.xi 
1322*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1323*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Mask_Req_MVD_W()
1324*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1325*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1326*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1327*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1328*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1329*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1330*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_MVD_W(MS_U8 u8Mask,MS_U8 u8Miu)1331*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_MVD_W(MS_U8 u8Mask, MS_U8 u8Miu)
1332*53ee8cc1Swenshuai.xi {
1333*53ee8cc1Swenshuai.xi     _FUNC_NOT_USED();
1334*53ee8cc1Swenshuai.xi }
1335*53ee8cc1Swenshuai.xi 
1336*53ee8cc1Swenshuai.xi 
1337*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1338*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Mask_Req_MVD_RW()
1339*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1340*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1341*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1342*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1343*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1344*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1345*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_MVD_RW(MS_U8 u8Mask,MS_U8 u8Miu)1346*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_MVD_RW(MS_U8 u8Mask, MS_U8 u8Miu)
1347*53ee8cc1Swenshuai.xi {
1348*53ee8cc1Swenshuai.xi     HAL_MIU_MaskReq(u8Miu, MIU_CLIENT_MVD_RW);
1349*53ee8cc1Swenshuai.xi }
1350*53ee8cc1Swenshuai.xi 
1351*53ee8cc1Swenshuai.xi 
1352*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1353*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_Mask_Req_AUDIO_RW()
1354*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description: Set OPM MIU mask
1355*53ee8cc1Swenshuai.xi /// @param u8Mask IN        \b  : miu mask
1356*53ee8cc1Swenshuai.xi /// @param u8Miu  IN        \b  : miu0 or miu1
1357*53ee8cc1Swenshuai.xi /// @param None   OUT       \b  :
1358*53ee8cc1Swenshuai.xi /// @param None   RET       \b  :
1359*53ee8cc1Swenshuai.xi /// @param None   GLOBAL    \b  :
1360*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_Mask_Req_AUDIO_RW(MS_U8 u8Mask,MS_U8 u8Miu)1361*53ee8cc1Swenshuai.xi void HAL_MIU_Mask_Req_AUDIO_RW(MS_U8 u8Mask, MS_U8 u8Miu)
1362*53ee8cc1Swenshuai.xi {
1363*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8Miu)
1364*53ee8cc1Swenshuai.xi         return;
1365*53ee8cc1Swenshuai.xi 
1366*53ee8cc1Swenshuai.xi     if (u8Miu == 0)
1367*53ee8cc1Swenshuai.xi         _MaskMiuReq_AUDIO_RW(u8Mask);
1368*53ee8cc1Swenshuai.xi     else
1369*53ee8cc1Swenshuai.xi         _MaskMiu1Req_AUDIO_RW(u8Mask);
1370*53ee8cc1Swenshuai.xi 
1371*53ee8cc1Swenshuai.xi }
1372*53ee8cc1Swenshuai.xi 
1373*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1374*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_GET_MUX()
1375*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description:
1376*53ee8cc1Swenshuai.xi /// @param None IN        \b  :
1377*53ee8cc1Swenshuai.xi /// @param None IN        \b  :
1378*53ee8cc1Swenshuai.xi /// @param None OUT       \b  :
1379*53ee8cc1Swenshuai.xi /// @param None RET       \b  :
1380*53ee8cc1Swenshuai.xi /// @param None GLOBAL    \b  :
1381*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_GET_MUX(void)1382*53ee8cc1Swenshuai.xi MS_U16 HAL_MIU_GET_MUX(void)
1383*53ee8cc1Swenshuai.xi {
1384*53ee8cc1Swenshuai.xi     return 0x0000;
1385*53ee8cc1Swenshuai.xi }
1386*53ee8cc1Swenshuai.xi 
1387*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1388*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_SwitchMIU()
1389*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description:
1390*53ee8cc1Swenshuai.xi /// @param u8MiuID        \b IN     : select MIU0 or MIU1
1391*53ee8cc1Swenshuai.xi /// @param None \b RET:
1392*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_VOP_SwitchMIU(MS_U8 u8MiuID)1393*53ee8cc1Swenshuai.xi void HAL_MIU_VOP_SwitchMIU(MS_U8 u8MiuID)
1394*53ee8cc1Swenshuai.xi {
1395*53ee8cc1Swenshuai.xi     HAL_MIU_SelMIU((eMIU_SelType)u8MiuID, MIU_CLIENT_MVOP_64BIT_R);
1396*53ee8cc1Swenshuai.xi }
1397*53ee8cc1Swenshuai.xi 
1398*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1399*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_IsI64Mode()
1400*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description:
1401*53ee8cc1Swenshuai.xi /// @param None \b RET: 0: not support, 64 or 128 bits
1402*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_IsI64Mode(void)1403*53ee8cc1Swenshuai.xi MS_U16 HAL_MIU_IsI64Mode(void)
1404*53ee8cc1Swenshuai.xi {
1405*53ee8cc1Swenshuai.xi     return (HAL_MIU_ReadByte(MIU_REG_BASE+0x04) & REG_MIU_I64_MODE) ? (64) : (128);
1406*53ee8cc1Swenshuai.xi }
1407*53ee8cc1Swenshuai.xi 
1408*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1409*53ee8cc1Swenshuai.xi /// @brief \b Function \b Name: HAL_MIU_IsInitMiu1()
1410*53ee8cc1Swenshuai.xi /// @brief \b Function \b Description:
1411*53ee8cc1Swenshuai.xi /// @param None \b RET:
1412*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_IsInitMiu1(void)1413*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_IsInitMiu1(void)
1414*53ee8cc1Swenshuai.xi {
1415*53ee8cc1Swenshuai.xi     return (HAL_MIU_Read2Byte(MIU1_REG_BASE) & REG_MIU_INIT_DONE) ? TRUE : FALSE;
1416*53ee8cc1Swenshuai.xi }
1417*53ee8cc1Swenshuai.xi 
1418*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1419*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_SetGroupPriority()
1420*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description:  This function for set each group priority
1421*53ee8cc1Swenshuai.xi /// @param u8MiuDev     \b IN   : select MIU0 or MIU1
1422*53ee8cc1Swenshuai.xi /// @param sPriority    \b IN   : gropu priority
1423*53ee8cc1Swenshuai.xi /// @param None \b RET:   0: Fail 1: Ok
1424*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_SetGroupPriority(MS_U8 u8MiuDev,MIU_GroupPriority sPriority)1425*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_SetGroupPriority(MS_U8 u8MiuDev, MIU_GroupPriority sPriority)
1426*53ee8cc1Swenshuai.xi {
1427*53ee8cc1Swenshuai.xi     MS_U8 u8Val = 0;
1428*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddr = REG_MIU_GROUP_PRIORITY;
1429*53ee8cc1Swenshuai.xi 
1430*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuDev)
1431*53ee8cc1Swenshuai.xi         return FALSE;
1432*53ee8cc1Swenshuai.xi 
1433*53ee8cc1Swenshuai.xi     u8Val = (sPriority.u84th << 6 | sPriority.u83rd << 4 | sPriority.u82nd << 2 | sPriority.u81st);
1434*53ee8cc1Swenshuai.xi     printf("Change miu%u group priority:%x\n", u8MiuDev, u8Val);
1435*53ee8cc1Swenshuai.xi 
1436*53ee8cc1Swenshuai.xi     u32RegAddr += (u8MiuDev) ? MIU1_REG_BASE : MIU_REG_BASE;
1437*53ee8cc1Swenshuai.xi     HAL_MIU_Write2BytesBit(u32RegAddr,DISABLE, BIT8);
1438*53ee8cc1Swenshuai.xi     HAL_MIU_WriteByte(u32RegAddr, u8Val);
1439*53ee8cc1Swenshuai.xi     HAL_MIU_Write2BytesBit(u32RegAddr,ENABLE, BIT8);
1440*53ee8cc1Swenshuai.xi     return TRUE;
1441*53ee8cc1Swenshuai.xi }
1442*53ee8cc1Swenshuai.xi 
1443*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1444*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_SetGroupPriority()
1445*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description:  This function for set each group priority
1446*53ee8cc1Swenshuai.xi /// @param u8MiuDev     \b IN   : select MIU0 or MIU1
1447*53ee8cc1Swenshuai.xi /// @param eClientID    \b IN   : client ID
1448*53ee8cc1Swenshuai.xi /// @param bMask        \b IN   : TRUE: Mask high priority FALSE: Unmask hih priority
1449*53ee8cc1Swenshuai.xi /// @param None \b RET:   0: Fail 1: Ok
1450*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_SetHPriorityMask(MS_U8 u8MiuDev,eMIUClientID eClientID,MS_BOOL bMask)1451*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_SetHPriorityMask(MS_U8 u8MiuDev, eMIUClientID eClientID, MS_BOOL bMask)
1452*53ee8cc1Swenshuai.xi {
1453*53ee8cc1Swenshuai.xi     MS_S16 sVal;
1454*53ee8cc1Swenshuai.xi     MS_U32 u32Reg;
1455*53ee8cc1Swenshuai.xi 
1456*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuDev)
1457*53ee8cc1Swenshuai.xi         return FALSE;
1458*53ee8cc1Swenshuai.xi 
1459*53ee8cc1Swenshuai.xi     sVal = HAL_MIU_GetClientInfo(u8MiuDev, eClientID);
1460*53ee8cc1Swenshuai.xi     if (sVal < 0)
1461*53ee8cc1Swenshuai.xi     {
1462*53ee8cc1Swenshuai.xi         printf("%s not support client ID:%u!\n", __FUNCTION__, eClientID);
1463*53ee8cc1Swenshuai.xi         return FALSE;
1464*53ee8cc1Swenshuai.xi     }
1465*53ee8cc1Swenshuai.xi     else
1466*53ee8cc1Swenshuai.xi     {
1467*53ee8cc1Swenshuai.xi         if(u8MiuDev == E_MIU_0)
1468*53ee8cc1Swenshuai.xi         {
1469*53ee8cc1Swenshuai.xi             MIU_RQX_HPMASK(u32Reg, MIU_GET_CLIENT_GROUP(sVal));
1470*53ee8cc1Swenshuai.xi         }
1471*53ee8cc1Swenshuai.xi         else if(u8MiuDev == E_MIU_1)
1472*53ee8cc1Swenshuai.xi         {
1473*53ee8cc1Swenshuai.xi             MIU1_RQX_HPMASK(u32Reg, MIU_GET_CLIENT_GROUP(sVal));
1474*53ee8cc1Swenshuai.xi         }
1475*53ee8cc1Swenshuai.xi         else
1476*53ee8cc1Swenshuai.xi         {
1477*53ee8cc1Swenshuai.xi  	       printf("%s not support MIU%u!\n", __FUNCTION__, u8MiuDev );
1478*53ee8cc1Swenshuai.xi                return FALSE;
1479*53ee8cc1Swenshuai.xi         }
1480*53ee8cc1Swenshuai.xi 
1481*53ee8cc1Swenshuai.xi         HAL_MIU_Write2BytesBit(u32Reg, bMask, BIT(MIU_GET_CLIENT_POS(sVal)));
1482*53ee8cc1Swenshuai.xi     }
1483*53ee8cc1Swenshuai.xi     return TRUE;
1484*53ee8cc1Swenshuai.xi }
1485*53ee8cc1Swenshuai.xi 
HAL_MIU_GetAutoPhaseResult(MS_U32 * miu0,MS_U32 * miu1)1486*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_GetAutoPhaseResult(MS_U32 *miu0, MS_U32 *miu1)
1487*53ee8cc1Swenshuai.xi {
1488*53ee8cc1Swenshuai.xi     static MS_U32 u32Miu0 = 0, u32Miu1 = 0;
1489*53ee8cc1Swenshuai.xi 
1490*53ee8cc1Swenshuai.xi     if (!u32Miu0)
1491*53ee8cc1Swenshuai.xi     {
1492*53ee8cc1Swenshuai.xi         u32Miu0 = HAL_MIU_Read4Byte(0x3390);    //miu0 result
1493*53ee8cc1Swenshuai.xi         u32Miu1 = HAL_MIU_Read4Byte(0x3394);    //miu1 result
1494*53ee8cc1Swenshuai.xi         *miu0 = u32Miu0;
1495*53ee8cc1Swenshuai.xi         *miu1 = u32Miu1;
1496*53ee8cc1Swenshuai.xi     }
1497*53ee8cc1Swenshuai.xi     else
1498*53ee8cc1Swenshuai.xi     {
1499*53ee8cc1Swenshuai.xi         *miu0 = u32Miu0;
1500*53ee8cc1Swenshuai.xi         *miu1 = u32Miu1;
1501*53ee8cc1Swenshuai.xi     }
1502*53ee8cc1Swenshuai.xi     return TRUE;
1503*53ee8cc1Swenshuai.xi }
1504*53ee8cc1Swenshuai.xi 
HAL_MIU_EnableScramble(MS_BOOL bEnable)1505*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_EnableScramble(MS_BOOL bEnable)
1506*53ee8cc1Swenshuai.xi {
1507*53ee8cc1Swenshuai.xi     return FALSE; // not implemented yet
1508*53ee8cc1Swenshuai.xi }
1509*53ee8cc1Swenshuai.xi 
HAL_MIU_IsScrambleEnabled(void)1510*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_IsScrambleEnabled(void)
1511*53ee8cc1Swenshuai.xi {
1512*53ee8cc1Swenshuai.xi     return FALSE; // not implemented yet
1513*53ee8cc1Swenshuai.xi }
1514*53ee8cc1Swenshuai.xi 
1515*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1516*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_SetLoadingRequest
1517*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: Set loading request
1518*53ee8cc1Swenshuai.xi /// @param u8MiuDev     \b IN   : select MIU0 or MIU1
1519*53ee8cc1Swenshuai.xi /// @return             \b 0: Fail 1: OK
1520*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_SetLoadingRequest(MS_U8 u8MiuDev)1521*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_SetLoadingRequest(MS_U8 u8MiuDev)
1522*53ee8cc1Swenshuai.xi {
1523*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddr;
1524*53ee8cc1Swenshuai.xi 
1525*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuDev)
1526*53ee8cc1Swenshuai.xi         return FALSE;
1527*53ee8cc1Swenshuai.xi 
1528*53ee8cc1Swenshuai.xi     if (u8MiuDev == 1)
1529*53ee8cc1Swenshuai.xi     {
1530*53ee8cc1Swenshuai.xi         u32RegAddr = MIU1_BW_REQUEST;
1531*53ee8cc1Swenshuai.xi     }
1532*53ee8cc1Swenshuai.xi     else
1533*53ee8cc1Swenshuai.xi     {
1534*53ee8cc1Swenshuai.xi         u32RegAddr = MIU_BW_REQUEST;
1535*53ee8cc1Swenshuai.xi     }
1536*53ee8cc1Swenshuai.xi 
1537*53ee8cc1Swenshuai.xi     HAL_MIU_Write2Byte(u32RegAddr, 0x0050);
1538*53ee8cc1Swenshuai.xi     HAL_MIU_Write2Byte(u32RegAddr, 0x0051);
1539*53ee8cc1Swenshuai.xi 
1540*53ee8cc1Swenshuai.xi     return TRUE;
1541*53ee8cc1Swenshuai.xi }
1542*53ee8cc1Swenshuai.xi 
1543*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1544*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_GetLoadingRequest
1545*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: Get loading request
1546*53ee8cc1Swenshuai.xi /// @param u8MiuDev     \b IN   : select MIU0 or MIU1
1547*53ee8cc1Swenshuai.xi /// @param *u32Loading  \b IN   : percentage of MIU loading
1548*53ee8cc1Swenshuai.xi /// @return             \b 0: Fail 1: OK
1549*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_GetLoadingRequest(MS_U8 u8MiuDev,MS_U32 * u32Loading)1550*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_GetLoadingRequest(MS_U8 u8MiuDev, MS_U32 *u32Loading)
1551*53ee8cc1Swenshuai.xi {
1552*53ee8cc1Swenshuai.xi     MS_U16 u16Reg;
1553*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddr;
1554*53ee8cc1Swenshuai.xi 
1555*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuDev)
1556*53ee8cc1Swenshuai.xi         return FALSE;
1557*53ee8cc1Swenshuai.xi 
1558*53ee8cc1Swenshuai.xi     if (u8MiuDev == 1)
1559*53ee8cc1Swenshuai.xi     {
1560*53ee8cc1Swenshuai.xi         u32RegAddr = MIU1_BW_RESULT;
1561*53ee8cc1Swenshuai.xi     }
1562*53ee8cc1Swenshuai.xi     else
1563*53ee8cc1Swenshuai.xi     {
1564*53ee8cc1Swenshuai.xi         u32RegAddr = MIU_BW_RESULT;
1565*53ee8cc1Swenshuai.xi     }
1566*53ee8cc1Swenshuai.xi 
1567*53ee8cc1Swenshuai.xi     u16Reg = HAL_MIU_Read2Byte(u32RegAddr);
1568*53ee8cc1Swenshuai.xi     *u32Loading =(MS_U32)((float)u16Reg * 100 / 0x400);
1569*53ee8cc1Swenshuai.xi 
1570*53ee8cc1Swenshuai.xi     printf("MIU%d loading: %d%%\n", u8MiuDev, (int)(*u32Loading));
1571*53ee8cc1Swenshuai.xi 
1572*53ee8cc1Swenshuai.xi     return TRUE;
1573*53ee8cc1Swenshuai.xi }
1574*53ee8cc1Swenshuai.xi 
1575*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1576*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_ParseOccupiedResource
1577*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: Parse occupied resource to software structure
1578*53ee8cc1Swenshuai.xi /// @return             \b 0: Fail 1: OK
1579*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_ParseOccupiedResource(void)1580*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_ParseOccupiedResource(void)
1581*53ee8cc1Swenshuai.xi {
1582*53ee8cc1Swenshuai.xi     MS_U8  u8MiuSel;
1583*53ee8cc1Swenshuai.xi     MS_U8  u8Blockx;
1584*53ee8cc1Swenshuai.xi     MS_U8  u8ClientID;
1585*53ee8cc1Swenshuai.xi     MS_U16 u16idenable;
1586*53ee8cc1Swenshuai.xi     MS_U32 u32index;
1587*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddr;
1588*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddrIDenable;
1589*53ee8cc1Swenshuai.xi 
1590*53ee8cc1Swenshuai.xi     for(u8MiuSel = E_MIU_0; u8MiuSel < MIU_MAX_DEVICE; u8MiuSel++)
1591*53ee8cc1Swenshuai.xi     {
1592*53ee8cc1Swenshuai.xi         for(u8Blockx = E_MIU_BLOCK_0; u8Blockx < E_MIU_BLOCK_NUM; u8Blockx++)
1593*53ee8cc1Swenshuai.xi         {
1594*53ee8cc1Swenshuai.xi             if(u8MiuSel == E_MIU_0)
1595*53ee8cc1Swenshuai.xi             {
1596*53ee8cc1Swenshuai.xi                 u32RegAddr = MIU_PROTECT0_ID0;
1597*53ee8cc1Swenshuai.xi 
1598*53ee8cc1Swenshuai.xi                 switch (u8Blockx)
1599*53ee8cc1Swenshuai.xi                 {
1600*53ee8cc1Swenshuai.xi                     case E_MIU_BLOCK_0:
1601*53ee8cc1Swenshuai.xi                         u32RegAddrIDenable = MIU_PROTECT0_ID_ENABLE;
1602*53ee8cc1Swenshuai.xi                         break;
1603*53ee8cc1Swenshuai.xi                     case E_MIU_BLOCK_1:
1604*53ee8cc1Swenshuai.xi                         u32RegAddrIDenable = MIU_PROTECT1_ID_ENABLE;
1605*53ee8cc1Swenshuai.xi                         break;
1606*53ee8cc1Swenshuai.xi                     case E_MIU_BLOCK_2:
1607*53ee8cc1Swenshuai.xi                         u32RegAddrIDenable = MIU_PROTECT2_ID_ENABLE;
1608*53ee8cc1Swenshuai.xi                         break;
1609*53ee8cc1Swenshuai.xi                     case E_MIU_BLOCK_3:
1610*53ee8cc1Swenshuai.xi                         u32RegAddrIDenable = MIU_PROTECT3_ID_ENABLE;
1611*53ee8cc1Swenshuai.xi                         break;
1612*53ee8cc1Swenshuai.xi                     default:
1613*53ee8cc1Swenshuai.xi                         return false;
1614*53ee8cc1Swenshuai.xi                 }
1615*53ee8cc1Swenshuai.xi             }// if(u8MiuSel == E_MIU_0)
1616*53ee8cc1Swenshuai.xi             else
1617*53ee8cc1Swenshuai.xi             {
1618*53ee8cc1Swenshuai.xi                 u32RegAddr = MIU1_PROTECT0_ID0;
1619*53ee8cc1Swenshuai.xi 
1620*53ee8cc1Swenshuai.xi                 switch (u8Blockx)
1621*53ee8cc1Swenshuai.xi                 {
1622*53ee8cc1Swenshuai.xi                 case E_MIU_BLOCK_0:
1623*53ee8cc1Swenshuai.xi                      u32RegAddrIDenable = MIU1_PROTECT0_ID_ENABLE;
1624*53ee8cc1Swenshuai.xi                      break;
1625*53ee8cc1Swenshuai.xi                  case E_MIU_BLOCK_1:
1626*53ee8cc1Swenshuai.xi                      u32RegAddrIDenable = MIU1_PROTECT1_ID_ENABLE;
1627*53ee8cc1Swenshuai.xi                      break;
1628*53ee8cc1Swenshuai.xi                  case E_MIU_BLOCK_2:
1629*53ee8cc1Swenshuai.xi                      u32RegAddrIDenable = MIU1_PROTECT2_ID_ENABLE;
1630*53ee8cc1Swenshuai.xi                      break;
1631*53ee8cc1Swenshuai.xi                  case E_MIU_BLOCK_3:
1632*53ee8cc1Swenshuai.xi                      u32RegAddrIDenable = MIU1_PROTECT3_ID_ENABLE;
1633*53ee8cc1Swenshuai.xi                      break;
1634*53ee8cc1Swenshuai.xi                  default:
1635*53ee8cc1Swenshuai.xi                     return false;
1636*53ee8cc1Swenshuai.xi                 }
1637*53ee8cc1Swenshuai.xi             }// if(u8MiuSel == E_MIU_0)
1638*53ee8cc1Swenshuai.xi 
1639*53ee8cc1Swenshuai.xi             u16idenable = HAL_MIU_Read2Byte(u32RegAddrIDenable);
1640*53ee8cc1Swenshuai.xi             for(u32index = 0; u32index < MIU_MAX_PROTECT_ID; u32index++)
1641*53ee8cc1Swenshuai.xi             {
1642*53ee8cc1Swenshuai.xi                 IDEnables[u8MiuSel][u8Blockx][u32index] = ((u16idenable >> u32index) & 0x1)? 1: 0;
1643*53ee8cc1Swenshuai.xi             }
1644*53ee8cc1Swenshuai.xi         }//for(u8Blockx = E_MIU_BLOCK_0; u8Blockx < E_MIU_BLOCK_NUM; u8Blockx++)
1645*53ee8cc1Swenshuai.xi 
1646*53ee8cc1Swenshuai.xi         for(u32index = 0; u32index < MIU_MAX_PROTECT_ID; u32index++)
1647*53ee8cc1Swenshuai.xi         {
1648*53ee8cc1Swenshuai.xi             u8ClientID = HAL_MIU_ReadByte(u32RegAddr + u32index);
1649*53ee8cc1Swenshuai.xi             IDs[u8MiuSel][u32index] = clientTbl[u8MiuSel][u8ClientID];
1650*53ee8cc1Swenshuai.xi         }
1651*53ee8cc1Swenshuai.xi     }//for(u8MiuSel = E_MIU_0; u8MiuSel < E_MIU_NUM; u8MiuSel++)
1652*53ee8cc1Swenshuai.xi 
1653*53ee8cc1Swenshuai.xi     return TRUE;
1654*53ee8cc1Swenshuai.xi }
1655*53ee8cc1Swenshuai.xi 
1656*53ee8cc1Swenshuai.xi 
HAL_MIU_PrintMIUProtectArea(MS_U8 u8Blockx,MS_U8 miu_dev)1657*53ee8cc1Swenshuai.xi void HAL_MIU_PrintMIUProtectArea(MS_U8 u8Blockx,MS_U8 miu_dev)
1658*53ee8cc1Swenshuai.xi {
1659*53ee8cc1Swenshuai.xi 
1660*53ee8cc1Swenshuai.xi     MS_U16 val_16,val1_16,val2_16;
1661*53ee8cc1Swenshuai.xi     MS_U32 val_32;
1662*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddrMSB;
1663*53ee8cc1Swenshuai.xi     MS_U32 u32RegAddrStar;
1664*53ee8cc1Swenshuai.xi 
1665*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= miu_dev)
1666*53ee8cc1Swenshuai.xi         return;
1667*53ee8cc1Swenshuai.xi 
1668*53ee8cc1Swenshuai.xi     if( miu_dev == 0 )
1669*53ee8cc1Swenshuai.xi     {
1670*53ee8cc1Swenshuai.xi         u32RegAddrMSB =  MIU_PROTECT0_MSB;
1671*53ee8cc1Swenshuai.xi         switch (u8Blockx)
1672*53ee8cc1Swenshuai.xi         {
1673*53ee8cc1Swenshuai.xi             case 0:
1674*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU_PROTECT0_START;
1675*53ee8cc1Swenshuai.xi                 val1_16 = HAL_MIU_Read2Byte(u32RegAddrMSB);
1676*53ee8cc1Swenshuai.xi                 val1_16 = ( val1_16 & 0x1 );
1677*53ee8cc1Swenshuai.xi                 val2_16 = ( val1_16 & 0xC );
1678*53ee8cc1Swenshuai.xi                 break;
1679*53ee8cc1Swenshuai.xi 
1680*53ee8cc1Swenshuai.xi             case 1:
1681*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU_PROTECT1_START;
1682*53ee8cc1Swenshuai.xi                 val1_16 = HAL_MIU_Read2Byte(u32RegAddrMSB);
1683*53ee8cc1Swenshuai.xi                 val1_16 = ( val1_16 & 0x10 );
1684*53ee8cc1Swenshuai.xi                 val2_16 = ( val1_16 & 0xC0 );
1685*53ee8cc1Swenshuai.xi                 break;
1686*53ee8cc1Swenshuai.xi 
1687*53ee8cc1Swenshuai.xi             case 2:
1688*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU_PROTECT2_START;
1689*53ee8cc1Swenshuai.xi                 val1_16 = HAL_MIU_Read2Byte(u32RegAddrMSB);
1690*53ee8cc1Swenshuai.xi                 val1_16 = ( val1_16 & 0x100 );
1691*53ee8cc1Swenshuai.xi                 val2_16 = ( val1_16 & 0xC00 );
1692*53ee8cc1Swenshuai.xi                 break;
1693*53ee8cc1Swenshuai.xi 
1694*53ee8cc1Swenshuai.xi             case 3:
1695*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU_PROTECT3_START;
1696*53ee8cc1Swenshuai.xi                 val1_16 = HAL_MIU_Read2Byte(u32RegAddrMSB);
1697*53ee8cc1Swenshuai.xi                 val1_16 = ( val1_16 & 0x1000 );
1698*53ee8cc1Swenshuai.xi                 val2_16 = ( val1_16 & 0xC000 );
1699*53ee8cc1Swenshuai.xi                 break;
1700*53ee8cc1Swenshuai.xi 
1701*53ee8cc1Swenshuai.xi             default:
1702*53ee8cc1Swenshuai.xi                 printf("error miu protect block number\n");
1703*53ee8cc1Swenshuai.xi                 return ;
1704*53ee8cc1Swenshuai.xi         }
1705*53ee8cc1Swenshuai.xi 
1706*53ee8cc1Swenshuai.xi         //protect start address
1707*53ee8cc1Swenshuai.xi         val_16 = HAL_MIU_Read2Byte(u32RegAddrStar);
1708*53ee8cc1Swenshuai.xi         val_32 = (  ( val_16 ) | (( val1_16  ) << 4 )) << MIU_PAGE_SHIFT;
1709*53ee8cc1Swenshuai.xi         printf("miu0 protect%d startaddr is 0x%x\n",u8Blockx, (unsigned int)val_32);
1710*53ee8cc1Swenshuai.xi 
1711*53ee8cc1Swenshuai.xi         //protect end address
1712*53ee8cc1Swenshuai.xi         val_16 = HAL_MIU_Read2Byte(u32RegAddrStar+0x2);
1713*53ee8cc1Swenshuai.xi 
1714*53ee8cc1Swenshuai.xi         val_32 = ((( val_16 + 1 ) | (( val1_16  ) << 4 ) ) << MIU_PAGE_SHIFT ) - 1;
1715*53ee8cc1Swenshuai.xi         printf("miu0 protect%d endaddr   is 0x%x\n",u8Blockx, (unsigned int)val_32);
1716*53ee8cc1Swenshuai.xi 
1717*53ee8cc1Swenshuai.xi     }
1718*53ee8cc1Swenshuai.xi 
1719*53ee8cc1Swenshuai.xi 
1720*53ee8cc1Swenshuai.xi     if( miu_dev == 1 )
1721*53ee8cc1Swenshuai.xi     {
1722*53ee8cc1Swenshuai.xi         u32RegAddrMSB =  MIU1_PROTECT0_MSB;
1723*53ee8cc1Swenshuai.xi         switch (u8Blockx)
1724*53ee8cc1Swenshuai.xi         {
1725*53ee8cc1Swenshuai.xi             case 0:
1726*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU1_PROTECT0_START;
1727*53ee8cc1Swenshuai.xi                 val1_16 = HAL_MIU_Read2Byte(u32RegAddrMSB);
1728*53ee8cc1Swenshuai.xi                 val1_16 = ( val1_16 & 0x1 );
1729*53ee8cc1Swenshuai.xi                 val2_16 = ( val1_16 & 0xC );
1730*53ee8cc1Swenshuai.xi                 break;
1731*53ee8cc1Swenshuai.xi 
1732*53ee8cc1Swenshuai.xi             case 1:
1733*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU1_PROTECT1_START;
1734*53ee8cc1Swenshuai.xi                 val1_16 = HAL_MIU_Read2Byte(u32RegAddrMSB);
1735*53ee8cc1Swenshuai.xi                 val1_16 = ( val1_16 & 0x10 );
1736*53ee8cc1Swenshuai.xi                 val2_16 = ( val1_16 & 0xC0 );
1737*53ee8cc1Swenshuai.xi                 break;
1738*53ee8cc1Swenshuai.xi 
1739*53ee8cc1Swenshuai.xi             case 2:
1740*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU1_PROTECT2_START;
1741*53ee8cc1Swenshuai.xi                 val1_16 = HAL_MIU_Read2Byte(u32RegAddrMSB);
1742*53ee8cc1Swenshuai.xi                 val1_16 = ( val1_16 & 0x100 );
1743*53ee8cc1Swenshuai.xi                 val2_16 = ( val1_16 & 0xC00 );
1744*53ee8cc1Swenshuai.xi                 break;
1745*53ee8cc1Swenshuai.xi 
1746*53ee8cc1Swenshuai.xi             case 3:
1747*53ee8cc1Swenshuai.xi                 u32RegAddrStar = MIU1_PROTECT3_START;
1748*53ee8cc1Swenshuai.xi                 val1_16 = HAL_MIU_Read2Byte(u32RegAddrMSB);
1749*53ee8cc1Swenshuai.xi                 val1_16 = ( val1_16 & 0x1000 );
1750*53ee8cc1Swenshuai.xi                 val2_16 = ( val1_16 & 0xC000 );
1751*53ee8cc1Swenshuai.xi                 break;
1752*53ee8cc1Swenshuai.xi 
1753*53ee8cc1Swenshuai.xi             default:
1754*53ee8cc1Swenshuai.xi                 printf("error miu protect block number\n");
1755*53ee8cc1Swenshuai.xi                 return ;
1756*53ee8cc1Swenshuai.xi         }
1757*53ee8cc1Swenshuai.xi 
1758*53ee8cc1Swenshuai.xi         //protect start address
1759*53ee8cc1Swenshuai.xi         val_16 = HAL_MIU_Read2Byte(u32RegAddrStar);
1760*53ee8cc1Swenshuai.xi         val_32 = (  ( val_16 ) | (( val1_16  ) << 4 )) << MIU_PAGE_SHIFT;
1761*53ee8cc1Swenshuai.xi         printf("miu1 protect%d startaddr is 0x%x\n",u8Blockx, (unsigned int)val_32);
1762*53ee8cc1Swenshuai.xi 
1763*53ee8cc1Swenshuai.xi         //protect end address
1764*53ee8cc1Swenshuai.xi         val_16 = HAL_MIU_Read2Byte(u32RegAddrStar+0x2);
1765*53ee8cc1Swenshuai.xi 
1766*53ee8cc1Swenshuai.xi         val_32 = ((( val_16 + 1 ) | (( val1_16  ) << 4 ) ) << MIU_PAGE_SHIFT ) - 1;
1767*53ee8cc1Swenshuai.xi         printf("miu1 protect%d endaddr   is 0x%x\n",u8Blockx, (unsigned int)val_32);
1768*53ee8cc1Swenshuai.xi 
1769*53ee8cc1Swenshuai.xi     }
1770*53ee8cc1Swenshuai.xi 
1771*53ee8cc1Swenshuai.xi 
1772*53ee8cc1Swenshuai.xi }
1773*53ee8cc1Swenshuai.xi 
HAL_MIU_PrintMIUProtectInfo(void)1774*53ee8cc1Swenshuai.xi void HAL_MIU_PrintMIUProtectInfo(void)
1775*53ee8cc1Swenshuai.xi {
1776*53ee8cc1Swenshuai.xi     MS_U32 u32MiuProtectEn;
1777*53ee8cc1Swenshuai.xi     MS_U32 u32MiuProtectIdEn;
1778*53ee8cc1Swenshuai.xi 
1779*53ee8cc1Swenshuai.xi     MS_U8 val_8;
1780*53ee8cc1Swenshuai.xi     MS_U16 val_16;
1781*53ee8cc1Swenshuai.xi 
1782*53ee8cc1Swenshuai.xi     u32MiuProtectEn = MIU_PROTECT_EN;
1783*53ee8cc1Swenshuai.xi 
1784*53ee8cc1Swenshuai.xi     u32MiuProtectIdEn= MIU_PROTECT0_ID_ENABLE;
1785*53ee8cc1Swenshuai.xi 
1786*53ee8cc1Swenshuai.xi     val_8 = HAL_MIU_ReadByte(u32MiuProtectEn);
1787*53ee8cc1Swenshuai.xi 
1788*53ee8cc1Swenshuai.xi     //printf("val=%d\n",val);
1789*53ee8cc1Swenshuai.xi 
1790*53ee8cc1Swenshuai.xi     if ( (val_8 & 0xf) != 0 )
1791*53ee8cc1Swenshuai.xi     {
1792*53ee8cc1Swenshuai.xi         printf("miu0 protect is enabled\n");
1793*53ee8cc1Swenshuai.xi 
1794*53ee8cc1Swenshuai.xi         //protect_ID_enable information
1795*53ee8cc1Swenshuai.xi         val_16 =HAL_MIU_Read2Byte(u32MiuProtectIdEn);
1796*53ee8cc1Swenshuai.xi         if ( val_16 != 0 )
1797*53ee8cc1Swenshuai.xi         {
1798*53ee8cc1Swenshuai.xi             printf("miu0 protect0_ID_enable is 0x%x\n",val_16);
1799*53ee8cc1Swenshuai.xi             HAL_MIU_PrintMIUProtectArea(0,0);
1800*53ee8cc1Swenshuai.xi         }
1801*53ee8cc1Swenshuai.xi 
1802*53ee8cc1Swenshuai.xi         u32MiuProtectIdEn= MIU_PROTECT1_ID_ENABLE;
1803*53ee8cc1Swenshuai.xi         val_16 =HAL_MIU_Read2Byte(u32MiuProtectIdEn);
1804*53ee8cc1Swenshuai.xi         if ( val_16 != 0 )
1805*53ee8cc1Swenshuai.xi         {
1806*53ee8cc1Swenshuai.xi             printf("miu0 protect1_ID_enable is 0x%x\n",val_16);
1807*53ee8cc1Swenshuai.xi             HAL_MIU_PrintMIUProtectArea(1,0);
1808*53ee8cc1Swenshuai.xi         }
1809*53ee8cc1Swenshuai.xi 
1810*53ee8cc1Swenshuai.xi         u32MiuProtectIdEn= MIU_PROTECT2_ID_ENABLE;
1811*53ee8cc1Swenshuai.xi         val_16 =HAL_MIU_Read2Byte(u32MiuProtectIdEn);
1812*53ee8cc1Swenshuai.xi         if ( val_16 != 0 )
1813*53ee8cc1Swenshuai.xi         {
1814*53ee8cc1Swenshuai.xi             printf("miu0 protect2_ID_enable is 0x%x\n",val_16);
1815*53ee8cc1Swenshuai.xi             HAL_MIU_PrintMIUProtectArea(2,0);
1816*53ee8cc1Swenshuai.xi         }
1817*53ee8cc1Swenshuai.xi 
1818*53ee8cc1Swenshuai.xi         u32MiuProtectIdEn= MIU_PROTECT3_ID_ENABLE;
1819*53ee8cc1Swenshuai.xi         val_16 =HAL_MIU_Read2Byte(u32MiuProtectIdEn);
1820*53ee8cc1Swenshuai.xi         if ( val_16 != 0 )
1821*53ee8cc1Swenshuai.xi         {
1822*53ee8cc1Swenshuai.xi             printf("miu0 protect3_ID_enable is 0x%x\n",val_16);
1823*53ee8cc1Swenshuai.xi             HAL_MIU_PrintMIUProtectArea(3,0);
1824*53ee8cc1Swenshuai.xi         }
1825*53ee8cc1Swenshuai.xi 
1826*53ee8cc1Swenshuai.xi     }
1827*53ee8cc1Swenshuai.xi     else
1828*53ee8cc1Swenshuai.xi     {
1829*53ee8cc1Swenshuai.xi         printf("miu0 protect is not enabled\n");
1830*53ee8cc1Swenshuai.xi     }
1831*53ee8cc1Swenshuai.xi 
1832*53ee8cc1Swenshuai.xi     u32MiuProtectEn=MIU1_PROTECT_EN;
1833*53ee8cc1Swenshuai.xi 
1834*53ee8cc1Swenshuai.xi     val_8 = HAL_MIU_ReadByte(u32MiuProtectEn);
1835*53ee8cc1Swenshuai.xi 
1836*53ee8cc1Swenshuai.xi     //printf("val=%d\n",val);
1837*53ee8cc1Swenshuai.xi 
1838*53ee8cc1Swenshuai.xi     if ( (val_8 & 0xf) != 0x0 )
1839*53ee8cc1Swenshuai.xi     {
1840*53ee8cc1Swenshuai.xi         printf("miu1 protect is enabled\n");
1841*53ee8cc1Swenshuai.xi 
1842*53ee8cc1Swenshuai.xi         //protect_ID_enable information
1843*53ee8cc1Swenshuai.xi         u32MiuProtectIdEn= MIU1_PROTECT0_ID_ENABLE;
1844*53ee8cc1Swenshuai.xi         val_16 =HAL_MIU_Read2Byte(u32MiuProtectIdEn);
1845*53ee8cc1Swenshuai.xi         if ( val_16 != 0 )
1846*53ee8cc1Swenshuai.xi         {
1847*53ee8cc1Swenshuai.xi             printf("miu1 protect0_ID_enable is 0x%x\n",val_16);
1848*53ee8cc1Swenshuai.xi             HAL_MIU_PrintMIUProtectArea(0,1);
1849*53ee8cc1Swenshuai.xi         }
1850*53ee8cc1Swenshuai.xi 
1851*53ee8cc1Swenshuai.xi         u32MiuProtectIdEn= MIU1_PROTECT1_ID_ENABLE;
1852*53ee8cc1Swenshuai.xi         val_16 =HAL_MIU_Read2Byte(u32MiuProtectIdEn);
1853*53ee8cc1Swenshuai.xi         if ( val_16 != 0 )
1854*53ee8cc1Swenshuai.xi         {
1855*53ee8cc1Swenshuai.xi             printf("miu1 protect1_ID_enable is 0x%x\n",val_16);
1856*53ee8cc1Swenshuai.xi             HAL_MIU_PrintMIUProtectArea(1,1);
1857*53ee8cc1Swenshuai.xi         }
1858*53ee8cc1Swenshuai.xi 
1859*53ee8cc1Swenshuai.xi         u32MiuProtectIdEn= MIU1_PROTECT2_ID_ENABLE;
1860*53ee8cc1Swenshuai.xi         val_16 =HAL_MIU_Read2Byte(u32MiuProtectIdEn);
1861*53ee8cc1Swenshuai.xi         if ( val_16 != 0 )
1862*53ee8cc1Swenshuai.xi         {
1863*53ee8cc1Swenshuai.xi             printf("miu1 protect2_ID_enable is 0x%x\n",val_16);
1864*53ee8cc1Swenshuai.xi             HAL_MIU_PrintMIUProtectArea(2,1);
1865*53ee8cc1Swenshuai.xi         }
1866*53ee8cc1Swenshuai.xi 
1867*53ee8cc1Swenshuai.xi         u32MiuProtectIdEn= MIU1_PROTECT3_ID_ENABLE;
1868*53ee8cc1Swenshuai.xi         val_16 =HAL_MIU_Read2Byte(u32MiuProtectIdEn);
1869*53ee8cc1Swenshuai.xi         if ( val_16 != 0 )
1870*53ee8cc1Swenshuai.xi         {
1871*53ee8cc1Swenshuai.xi             printf("miu1 protect3_ID_enable is 0x%x\n",val_16);
1872*53ee8cc1Swenshuai.xi             HAL_MIU_PrintMIUProtectArea(3,1);
1873*53ee8cc1Swenshuai.xi         }
1874*53ee8cc1Swenshuai.xi 
1875*53ee8cc1Swenshuai.xi 
1876*53ee8cc1Swenshuai.xi     }
1877*53ee8cc1Swenshuai.xi     else
1878*53ee8cc1Swenshuai.xi     {
1879*53ee8cc1Swenshuai.xi         printf("miu1 protect is not enabled\n");
1880*53ee8cc1Swenshuai.xi 
1881*53ee8cc1Swenshuai.xi     }
1882*53ee8cc1Swenshuai.xi }
1883*53ee8cc1Swenshuai.xi 
1884*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1885*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_MIU_GetClientWidth
1886*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: Get MIU client bus width
1887*53ee8cc1Swenshuai.xi /// @param u8MiuDev     \b IN   : select MIU0 or MIU1
1888*53ee8cc1Swenshuai.xi /// @param eClientID    \b IN   : client ID
1889*53ee8cc1Swenshuai.xi /// @param pClientWidth \b IN   : client bus width
1890*53ee8cc1Swenshuai.xi /// @return             \b 0 : Fail  1: OK
1891*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_MIU_GetClientWidth(MS_U8 u8MiuDevi,eMIUClientID eClientID,eMIU_ClientWidth * pClientWidth)1892*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_GetClientWidth(MS_U8 u8MiuDevi, eMIUClientID eClientID, eMIU_ClientWidth *pClientWidth)
1893*53ee8cc1Swenshuai.xi {
1894*53ee8cc1Swenshuai.xi     MS_U32 u32Reg;
1895*53ee8cc1Swenshuai.xi     MS_S16 sVal;
1896*53ee8cc1Swenshuai.xi     MS_U16 u16Group;
1897*53ee8cc1Swenshuai.xi     MS_U16 u16Client;
1898*53ee8cc1Swenshuai.xi     MS_U16 u16RegVal;
1899*53ee8cc1Swenshuai.xi 
1900*53ee8cc1Swenshuai.xi     if (MIU_MAX_DEVICE <= u8MiuDevi)
1901*53ee8cc1Swenshuai.xi         return FALSE;
1902*53ee8cc1Swenshuai.xi 
1903*53ee8cc1Swenshuai.xi     sVal = HAL_MIU_GetClientInfo(u8MiuDevi, eClientID);
1904*53ee8cc1Swenshuai.xi 
1905*53ee8cc1Swenshuai.xi     if (sVal < 0)
1906*53ee8cc1Swenshuai.xi     {
1907*53ee8cc1Swenshuai.xi         printf("%s not support client ID:%u!\n", __FUNCTION__, eClientID);
1908*53ee8cc1Swenshuai.xi         return FALSE;
1909*53ee8cc1Swenshuai.xi     }
1910*53ee8cc1Swenshuai.xi     else
1911*53ee8cc1Swenshuai.xi     {
1912*53ee8cc1Swenshuai.xi         u16Group = MIU_GET_CLIENT_GROUP(sVal);
1913*53ee8cc1Swenshuai.xi         u16Client = MIU_GET_CLIENT_POS(sVal);
1914*53ee8cc1Swenshuai.xi 
1915*53ee8cc1Swenshuai.xi         if(u16Group >= 3)
1916*53ee8cc1Swenshuai.xi         {
1917*53ee8cc1Swenshuai.xi             *pClientWidth = E_MIU_CLIENT_256BIT;
1918*53ee8cc1Swenshuai.xi             return TRUE;
1919*53ee8cc1Swenshuai.xi         }
1920*53ee8cc1Swenshuai.xi 
1921*53ee8cc1Swenshuai.xi         u32Reg = REG_MI64_FORCE + (MIU_GET_CLIENT_GROUP(sVal) << 1);
1922*53ee8cc1Swenshuai.xi         u16RegVal = HAL_MIU_Read2Byte(u32Reg);
1923*53ee8cc1Swenshuai.xi 
1924*53ee8cc1Swenshuai.xi         if(u16RegVal & (1 << u16Client))
1925*53ee8cc1Swenshuai.xi             *pClientWidth = E_MIU_CLIENT_64BIT;
1926*53ee8cc1Swenshuai.xi         else
1927*53ee8cc1Swenshuai.xi             *pClientWidth = E_MIU_CLIENT_128BIT;
1928*53ee8cc1Swenshuai.xi 
1929*53ee8cc1Swenshuai.xi         return TRUE;
1930*53ee8cc1Swenshuai.xi     }
1931*53ee8cc1Swenshuai.xi }
1932*53ee8cc1Swenshuai.xi 
1933*53ee8cc1Swenshuai.xi 
HAL_MIU_GetDramType(MS_U32 eMiu,MIU_DDR_TYPE * pType)1934*53ee8cc1Swenshuai.xi MS_BOOL HAL_MIU_GetDramType(MS_U32 eMiu, MIU_DDR_TYPE* pType)
1935*53ee8cc1Swenshuai.xi {
1936*53ee8cc1Swenshuai.xi     MS_U32 u32Reg;
1937*53ee8cc1Swenshuai.xi 
1938*53ee8cc1Swenshuai.xi     if (eMiu >= MIU_MAX_DEVICE)
1939*53ee8cc1Swenshuai.xi         return FALSE;
1940*53ee8cc1Swenshuai.xi 
1941*53ee8cc1Swenshuai.xi     switch (eMiu)
1942*53ee8cc1Swenshuai.xi     {
1943*53ee8cc1Swenshuai.xi         case 0:
1944*53ee8cc1Swenshuai.xi             u32Reg = REG_MIU_DDR_STATUS;
1945*53ee8cc1Swenshuai.xi             break;
1946*53ee8cc1Swenshuai.xi         default:
1947*53ee8cc1Swenshuai.xi             return FALSE;
1948*53ee8cc1Swenshuai.xi     }
1949*53ee8cc1Swenshuai.xi 
1950*53ee8cc1Swenshuai.xi     if (HAL_MIU_Read2Byte(u32Reg)& REG_MIU_DDR4)
1951*53ee8cc1Swenshuai.xi     {
1952*53ee8cc1Swenshuai.xi         *pType = E_MIU_DDR4;
1953*53ee8cc1Swenshuai.xi     }
1954*53ee8cc1Swenshuai.xi     else
1955*53ee8cc1Swenshuai.xi     {
1956*53ee8cc1Swenshuai.xi         *pType = E_MIU_DDR3;
1957*53ee8cc1Swenshuai.xi     }
1958*53ee8cc1Swenshuai.xi 
1959*53ee8cc1Swenshuai.xi     return TRUE;
1960*53ee8cc1Swenshuai.xi }
1961