| /utopia/UTPA2-700.0.x/modules/irq/hal/macan/irq/ |
| H A D | halIRQ.c | 564 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
610 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
654 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/k6/irq/ |
| H A D | halIRQ.c | 525 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
561 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
598 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/k6lite/irq/ |
| H A D | halIRQ.c | 525 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
561 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
598 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/kano/irq/ |
| H A D | halIRQ.c | 525 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
561 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
598 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/k7u/irq/ |
| H A D | halIRQ.c | 525 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
561 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
598 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/curry/irq/ |
| H A D | halIRQ.c | 525 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
561 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
598 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/M7821/irq/ |
| H A D | halIRQ.c | 570 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
616 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
660 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/M7621/irq/ |
| H A D | halIRQ.c | 568 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
614 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
658 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/maxim/irq/ |
| H A D | halIRQ.c | 568 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
614 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
658 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/manhattan/irq/ |
| H A D | halIRQ.c | 564 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
610 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
654 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/maserati/irq/ |
| H A D | halIRQ.c | 568 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_IRQHnd()
614 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
658 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/mustang/irq/ |
| H A D | halIRQ.c | 419 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
447 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/maldives/irq/ |
| H A D | halIRQ.c | 419 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
447 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/mainz/irq/ |
| H A D | halIRQ.c | 419 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
446 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/messi/irq/ |
| H A D | halIRQ.c | 419 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
446 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/modules/irq/hal/mooney/irq/ |
| H A D | halIRQ.c | 419 MS_U32 reg = E_IRQ_FIQ_INVALID; in _HAL_IRQ_Enable()
446 if( E_IRQ_FIQ_INVALID == reg ) in _HAL_IRQ_Enable()
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| /utopia/UTPA2-700.0.x/projects/tmplib/include/ |
| H A D | MsIRQ.h | 119 #define E_IRQ_FIQ_INVALID 0xFFFF macro
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| /utopia/UTPA2-700.0.x/mxlib/include/ |
| H A D | MsIRQ.h | 119 #define E_IRQ_FIQ_INVALID 0xFFFF macro
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| /utopia/UTPA2-700.0.x/projects/build/ |
| H A D | preprocess.txt | 31262 #define E_IRQ_FIQ_INVALID 0xFFFF
|