| /utopia/UTPA2-700.0.x/modules/mbx/hal/k6/mbx/ |
| H A D | halMBXINT.c | 202 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 204 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 261 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 263 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/k6lite/mbx/ |
| H A D | halMBXINT.c | 202 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 204 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 261 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 263 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/kano/mbx/ |
| H A D | halMBXINT.c | 202 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 204 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 261 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 263 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/mooney/mbx/ |
| H A D | halMBXINT.c | 183 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 185 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 251 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 253 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/macan/mbx/ |
| H A D | halMBXINT.c | 202 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 204 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 262 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 264 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/messi/mbx/ |
| H A D | halMBXINT.c | 185 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 187 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 253 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 255 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/mainz/mbx/ |
| H A D | halMBXINT.c | 185 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 187 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 253 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 255 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/M7821/mbx/ |
| H A D | halMBXINT.c | 215 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 217 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 291 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 293 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/manhattan/mbx/ |
| H A D | halMBXINT.c | 215 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 217 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 291 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 293 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/maxim/mbx/ |
| H A D | halMBXINT.c | 215 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 217 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 291 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 293 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/maserati/mbx/ |
| H A D | halMBXINT.c | 215 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 217 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 291 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 293 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/M7621/mbx/ |
| H A D | halMBXINT.c | 215 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 217 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU() 291 MsOS_DisableInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit() 293 MsOS_DetachInterrupt(E_INT_FIQ_BEON_TO_AEON); in MHAL_MBXINT_DeInit()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/maldives/mbx/ |
| H A D | halMBXINT.c | 183 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 185 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU()
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| /utopia/UTPA2-700.0.x/modules/mbx/hal/mustang/mbx/ |
| H A D | halMBXINT.c | 183 MsOS_AttachInterrupt(E_INT_FIQ_BEON_TO_AEON, (InterruptCb)_MHAL_MBXINT_INTHandler); in _MHAL_MBXINT_SetHostCPU() 185 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); in _MHAL_MBXINT_SetHostCPU()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/maldives/cpu/ |
| H A D | halCPU.c | 572 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/mustang/cpu/ |
| H A D | halCPU.c | 572 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/k6lite/cpu/ |
| H A D | halCPU.c | 579 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/kano/cpu/ |
| H A D | halCPU.c | 579 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/k7u/cpu/ |
| H A D | halCPU.c | 579 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/k6/cpu/ |
| H A D | halCPU.c | 579 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/mooney/cpu/ |
| H A D | halCPU.c | 628 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/messi/cpu/ |
| H A D | halCPU.c | 626 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/mainz/cpu/ |
| H A D | halCPU.c | 626 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/modules/cpu/hal/curry/cpu/ |
| H A D | halCPU.c | 580 MsOS_EnableInterrupt(E_INT_FIQ_BEON_TO_AEON); //should be secure-R2 in HAL_COPRO_Init_End()
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| /utopia/UTPA2-700.0.x/mxlib/hal/mustang/ |
| H A D | halIRQTBL.h | 492 HAL_UpdateIrqTable(E_FIQ_45, E_INT_FIQ_BEON_TO_AEON); //reg_hst2to1_int in HAL_InitIrqTable()
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