| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/ |
| H A D | halMVOP.c | 4335 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x40, CKG_DC1_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x… in HAL_MVOP_SubSetOutputInterlace()
4932 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x4, CKG_DC1_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x4… in HAL_MVOP_SubSetDCSRAMClk()
4936 HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC1_SRAM); in HAL_MVOP_SubSetDCSRAMClk()
4943 HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC1_SRAM); in HAL_MVOP_SubSetDCSRAMClk()
5057 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC1_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x4… in HAL_MVOP_SubSetH264HardwireMode()
5085 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x40, CKG_DC1_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x… in HAL_MVOP_SubSetRMHardwireMode()
5145 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC1_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x4… in HAL_MVOP_SubSetEVDHardwireMode()
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| H A D | regMVOP.h | 491 #define CKG_DC1_SRAM (BIT7 | BIT6 | BIT5 | BIT4) macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/ |
| H A D | regMVOP.h | 386 #define CKG_DC1_SRAM BIT4 macro
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| H A D | halMVOP.c | 3827 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC1_SRAM); in HAL_MVOP_SubSetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/ |
| H A D | regMVOP.h | 405 #define CKG_DC1_SRAM BIT4 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/ |
| H A D | regMVOP.h | 406 #define CKG_DC1_SRAM BIT4 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/ |
| H A D | regMVOP.h | 399 #define CKG_DC1_SRAM BIT4 macro
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| H A D | halMVOP.c | 4343 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC1_SRAM); in HAL_MVOP_SubSetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/ |
| H A D | regMVOP.h | 408 #define CKG_DC1_SRAM BIT4 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/ |
| H A D | regMVOP.h | 406 #define CKG_DC1_SRAM BIT4 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/ |
| H A D | regMVOP.h | 424 #define CKG_DC1_SRAM BIT4 macro
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| H A D | halMVOP.c | 4451 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC1_SRAM); in HAL_MVOP_SubSetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/ |
| H A D | regMVOP.h | 409 #define CKG_DC1_SRAM BIT4 macro
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| H A D | halMVOP.c | 4808 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC1_SRAM); in HAL_MVOP_SubSetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/ |
| H A D | regMVOP.h | 421 #define CKG_DC1_SRAM BIT4 macro
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| H A D | halMVOP.c | 4787 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC1_SRAM); in HAL_MVOP_SubSetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/ |
| H A D | regMVOP.h | 415 #define CKG_DC1_SRAM BIT4 macro
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| H A D | halMVOP.c | 4333 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC1_SRAM); in HAL_MVOP_SubSetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/ |
| H A D | regMVOP.h | 438 #define CKG_DC1_SRAM BIT4 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/ |
| H A D | regMVOP.h | 435 #define CKG_DC1_SRAM BIT4 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/ |
| H A D | regMVOP.h | 436 #define CKG_DC1_SRAM BIT4 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/ |
| H A D | regMVOP.h | 428 #define CKG_DC1_SRAM (BIT7 | BIT6 | BIT5 | BIT4) macro
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| H A D | halMVOP.c | 4704 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x40, CKG_DC1_SRAM); //Dc1 enable & dc1_mfdec_en =0 57[7:4]= 0… in HAL_MVOP_SubSetDCSRAMClk()
4706 HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC1_SRAM); in HAL_MVOP_SubSetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/ |
| H A D | regMVOP.h | 421 #define CKG_DC1_SRAM BIT4 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/ |
| H A D | regMVOP.h | 450 #define CKG_DC1_SRAM (BIT7 | BIT6 | BIT5 | BIT4) macro
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