Searched refs:CFG8_41 (Results 1 – 6 of 6) sorted by relevance
4183 …REG16_MSK_W(&_RegCtrl8_1->CFG8_41, CFG8_41_REG_VID4_SRC_MASK, ((MS_U16)pktDmxId) << CFG8_41_REG_VI… in HAL_TSP_FIFO_SetSrc()4216 …*pktDmxId = ((REG16_R(&_RegCtrl8_1->CFG8_41)) & CFG8_41_REG_VID4_SRC_MASK) >> CFG8_41_REG_VID4_SRC… in HAL_TSP_FIFO_GetSrc()4241 REG16_CLR(&_RegCtrl8_1->CFG8_41, CFG8_41_PS_VID4_EN); in HAL_TSP_FIFO_ClearAll()4397 REG16_SET(&_RegCtrl8_1->CFG8_41, CFG8_41_PS_VID4_EN); in HAL_TSP_FIFO_Bypass()4429 REG16_CLR(&_RegCtrl8_1->CFG8_41, CFG8_41_PS_VID4_EN); in HAL_TSP_FIFO_Bypass()4526 REG16_SET(&_RegCtrl8_1->CFG8_41, CFG8_41_RESET_VFIFO_4); in HAL_TSP_FIFO_Reset()4558 REG16_CLR(&_RegCtrl8_1->CFG8_41, CFG8_41_RESET_VFIFO_4); in HAL_TSP_FIFO_Reset()4666 REG16_SET(&_RegCtrl8_1->CFG8_41, CFG8_41_V4_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()4698 REG16_CLR(&_RegCtrl8_1->CFG8_41, CFG8_41_V4_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()4733 u32Matched = REG16_R(&_RegCtrl8_1->CFG8_41) & CFG8_41_RESET_VFIFO_4; in HAL_TSP_FIFO_IsReset()
2534 REG16 CFG8_41; //reg_hw10_config1 member
2440 REG16 CFG8_41; //reg_hw10_config1 member
2561 REG16 CFG8_41; //reg_hw10_config1 member
2599 REG16 CFG8_41; //reg_hw10_config1 member