Home
last modified time | relevance | path

Searched refs:u_offset (Results 1 – 8 of 8) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkenc/common/
H A Dvepu540c_common.c104 RK_U32 u_offset = 0, v_offset = 0; in vepu540c_jpeg_set_patch_info() local
108 u_offset = mpp_frame_get_fbc_offset(task->frame); in vepu540c_jpeg_set_patch_info()
110 mpp_log("fbc case u_offset = %d", u_offset); in vepu540c_jpeg_set_patch_info()
114 u_offset = frame_size; in vepu540c_jpeg_set_patch_info()
119 u_offset = frame_size; in vepu540c_jpeg_set_patch_info()
123 u_offset = frame_size; in vepu540c_jpeg_set_patch_info()
128 u_offset = 0; in vepu540c_jpeg_set_patch_info()
134 u_offset = 0; in vepu540c_jpeg_set_patch_info()
139 u_offset = frame_size; in vepu540c_jpeg_set_patch_info()
146 if (u_offset) in vepu540c_jpeg_set_patch_info()
[all …]
/rockchip-linux_mpp/mpp/hal/rkenc/jpege/
H A Dhal_jpege_vpu720.c82 RK_U32 u_offset; member
244 fmt_cfg->u_offset = hor_stride * ver_stride; in jpege_vpu720_setup_format()
245 fmt_cfg->v_offset = fmt_cfg->u_offset + fmt_cfg->uv_stride * (ver_stride >> 1); in jpege_vpu720_setup_format()
251 fmt_cfg->u_offset = hor_stride * ver_stride; in jpege_vpu720_setup_format()
257 fmt_cfg->u_offset = hor_stride * ver_stride; in jpege_vpu720_setup_format()
264 fmt_cfg->u_offset = hor_stride * ver_stride; in jpege_vpu720_setup_format()
265 fmt_cfg->v_offset = fmt_cfg->u_offset + fmt_cfg->uv_stride * ver_stride; in jpege_vpu720_setup_format()
271 fmt_cfg->u_offset = hor_stride * ver_stride; in jpege_vpu720_setup_format()
277 fmt_cfg->u_offset = hor_stride * ver_stride; in jpege_vpu720_setup_format()
302 fmt_cfg->u_offset = hor_stride * ver_stride; in jpege_vpu720_setup_format()
[all …]
H A Dhal_jpege_vepu511.c133 RK_U32 u_offset = 0, v_offset = 0; in vepu511_jpeg_set_patch_info() local
137 u_offset = mpp_frame_get_fbc_offset(task->frame); in vepu511_jpeg_set_patch_info()
138 v_offset = u_offset; in vepu511_jpeg_set_patch_info()
142 u_offset = frame_size; in vepu511_jpeg_set_patch_info()
147 u_offset = frame_size; in vepu511_jpeg_set_patch_info()
151 u_offset = frame_size; in vepu511_jpeg_set_patch_info()
157 u_offset = 0; in vepu511_jpeg_set_patch_info()
161 u_offset = frame_size; in vepu511_jpeg_set_patch_info()
165 u_offset = frame_size; in vepu511_jpeg_set_patch_info()
171 u_offset = 0; in vepu511_jpeg_set_patch_info()
[all …]
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu540c.c615 RK_U32 u_offset = 0, v_offset = 0; in vepu540c_h265_set_patch_info() local
620 u_offset = mpp_frame_get_fbc_offset(task->frame); in vepu540c_h265_set_patch_info()
622 mpp_log("fbc case u_offset = %d", u_offset); in vepu540c_h265_set_patch_info()
626 u_offset = frame_size; in vepu540c_h265_set_patch_info()
631 u_offset = frame_size; in vepu540c_h265_set_patch_info()
635 u_offset = frame_size; in vepu540c_h265_set_patch_info()
641 u_offset = 0; in vepu540c_h265_set_patch_info()
647 u_offset = 0; in vepu540c_h265_set_patch_info()
652 u_offset = frame_size; in vepu540c_h265_set_patch_info()
659 if (u_offset) { in vepu540c_h265_set_patch_info()
[all …]
H A Dhal_h265e_vepu541.c730 RK_U32 u_offset = 0, v_offset = 0; in vepu541_h265_set_patch_info() local
734 u_offset = mpp_frame_get_fbc_offset(task->frame); in vepu541_h265_set_patch_info()
739 u_offset = frame_size; in vepu541_h265_set_patch_info()
744 u_offset = frame_size; in vepu541_h265_set_patch_info()
748 u_offset = frame_size; in vepu541_h265_set_patch_info()
753 u_offset = 0; in vepu541_h265_set_patch_info()
759 u_offset = 0; in vepu541_h265_set_patch_info()
764 u_offset = frame_size; in vepu541_h265_set_patch_info()
771 if (u_offset) { in vepu541_h265_set_patch_info()
772 mpp_dev_set_reg_offset(dev, 71, u_offset); in vepu541_h265_set_patch_info()
H A Dhal_h265e_vepu511.c606 RK_U32 u_offset = 0, v_offset = 0; in vepu511_h265_set_patch_info() local
610 u_offset = mpp_frame_get_fbc_offset(task->frame); in vepu511_h265_set_patch_info()
611 v_offset = u_offset; in vepu511_h265_set_patch_info()
615 u_offset = frame_size; in vepu511_h265_set_patch_info()
620 u_offset = frame_size; in vepu511_h265_set_patch_info()
624 u_offset = frame_size; in vepu511_h265_set_patch_info()
630 u_offset = 0; in vepu511_h265_set_patch_info()
636 u_offset = 0; in vepu511_h265_set_patch_info()
640 u_offset = hor_stride * ver_stride; in vepu511_h265_set_patch_info()
644 u_offset = hor_stride * ver_stride; in vepu511_h265_set_patch_info()
[all …]
H A Dhal_h265e_vepu510.c1211 RK_U32 u_offset = 0, v_offset = 0; in vepu510_h265_set_patch_info() local
1221 u_offset = frame_size; in vepu510_h265_set_patch_info()
1226 u_offset = frame_size; in vepu510_h265_set_patch_info()
1230 u_offset = frame_size; in vepu510_h265_set_patch_info()
1236 u_offset = 0; in vepu510_h265_set_patch_info()
1242 u_offset = 0; in vepu510_h265_set_patch_info()
1246 u_offset = hor_stride * ver_stride; in vepu510_h265_set_patch_info()
1250 u_offset = hor_stride * ver_stride; in vepu510_h265_set_patch_info()
1255 u_offset = frame_size; in vepu510_h265_set_patch_info()
1260 mpp_dev_multi_offset_update(offsets, 161, u_offset); in vepu510_h265_set_patch_info()
H A Dhal_h265e_vepu580.c1637 RK_U32 u_offset = 0, v_offset = 0; in vepu580_h265_set_patch_info() local
1644 u_offset = mpp_frame_get_fbc_offset(task->frame); in vepu580_h265_set_patch_info()
1649 u_offset = frame_size; in vepu580_h265_set_patch_info()
1654 u_offset = frame_size; in vepu580_h265_set_patch_info()
1658 u_offset = frame_size; in vepu580_h265_set_patch_info()
1664 u_offset = 0; in vepu580_h265_set_patch_info()
1668 u_offset = hor_stride * ver_stride; in vepu580_h265_set_patch_info()
1672 u_offset = hor_stride * ver_stride; in vepu580_h265_set_patch_info()
1678 u_offset = 0; in vepu580_h265_set_patch_info()
1683 u_offset = frame_size; in vepu580_h265_set_patch_info()
[all …]