Searched refs:sw50 (Results 1 – 9 of 9) sorted by relevance
172 p_regs->sw50.dec_out_tiled_e = 0; in hal_m2vd_vdpu2_init_hwcfg()174 p_regs->sw50.dec_scmd_dis = 0; in hal_m2vd_vdpu2_init_hwcfg()175 p_regs->sw50.dec_adv_pre_dis = 0; in hal_m2vd_vdpu2_init_hwcfg()178 p_regs->sw50.dec_latency = 0; in hal_m2vd_vdpu2_init_hwcfg()300 p_regs->sw50.filtering_dis = 1; in hal_m2vd_vdpu2_gen_regs()
41 } sw50; member
39 p_regs->sw50.dec_ascmd0_dis = 0; in set_defalut_parameters()41 p_regs->sw50.adv_pref_dis = 0; in set_defalut_parameters()43 p_regs->sw50.adtion_latency = 0; in set_defalut_parameters()65 p_regs->sw50.dec_tiled_lsb = 0; in set_defalut_parameters()123 p_regs->sw50.dec_fixed_quant = p_syn->pp.fixedPictureQp; in set_regs_parameters()352 p_regs->sw50.filtering_dis = p_syn->pp.loopFilterDisable; in set_regs_parameters()355 p_regs->sw50.skip_mode = p_syn->pp.skipModeFlag; in set_regs_parameters()
35 } sw50; member
243 RK_U32 sw50; member
51 p_reg->sw50.dec_tiled_msb = 0; //!< 0: raster scan 1: tiled in set_device_regs()53 p_reg->sw50.dec_ascmd0_dis = 0; //!< disable in set_device_regs()54 p_reg->sw50.adv_pref_dis = 0; //!< disable in set_device_regs()56 p_reg->sw50.adtion_latency = 0; //!< compensation for bus latency; values up to 63 in set_device_regs()75 p_reg->sw50.adtion_latency = 0; in set_device_regs()78 p_reg->sw50.dec_tiled_msb = 0; //!< 0: raster scan 1: tiled in set_device_regs()714 p_regs->sw50.dec_fixed_quant = pp->curr_layer_id; //!< VDPU_MVC_E in set_asic_regs()715 p_regs->sw50.dblk_flt_dis = 0; //!< filterDisable = 0; in set_asic_regs()
39 } sw50; member
181 } sw50; member
79 regs->sw50.base_in_cr = hw_cfg->input_cr_base; in vp8e_vpu_frame_start()