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Searched refs:sw109 (Results 1 – 4 of 4) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/vp8e/
H A Dhal_vp8e_vepu2_v2.c46 regs->sw109.val = hw_cfg->irq_disable ? (regs->sw109.val | 0x0100) : in vp8e_vpu_frame_start()
47 (regs->sw109.val & 0xfeff); in vp8e_vpu_frame_start()
64 regs->sw109.mv_write = hw_cfg->mv_output_base != 0; in vp8e_vpu_frame_start()
84 regs->sw109.val |= 0x0400; in vp8e_vpu_frame_start()
85 regs->sw109.int_slice_ready = hw_cfg->int_slice_ready; in vp8e_vpu_frame_start()
86 regs->sw109.rec_write_disable = hw_cfg->rec_write_disable; in vp8e_vpu_frame_start()
466 fb->hw_status = regs->sw109.val & HW_STATUS_MASK; in hal_vp8e_vepu2_wait_v2()
467 if (regs->sw109.val & HW_STATUS_FRAME_READY) in hal_vp8e_vepu2_wait_v2()
469 else if (regs->sw109.val & HW_STATUS_BUFFER_FULL) in hal_vp8e_vepu2_wait_v2()
H A Dhal_vp8e_vepu2_reg.h485 } sw109; member
/rockchip-linux_mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu2_reg.h418 } sw109; member
H A Dhal_h264d_vdpu2.c515 p_regs->sw109.strm_start_bit = 0; //!< sodb stream start bit in set_vlc_regs()