Home
last modified time | relevance | path

Searched refs:sli_splt_mode (Results 1 – 21 of 21) sorted by relevance

/rockchip-linux_mpp/mpp/common/
H A Dh265e_syntax_new.h128 RK_U32 sli_splt_mode : 1; member
/rockchip-linux_mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu541.c1180 regs->reg087.sli_splt_mode = 0; in setup_vepu541_split()
1191 regs->reg087.sli_splt_mode = 0; in setup_vepu541_split()
1202 regs->reg087.sli_splt_mode = 1; in setup_vepu541_split()
1226 regs->reg087.sli_splt_mode = 1; in setup_vepu540_force_slice_split()
H A Dhal_h264e_vepu541_reg.h1350 RK_U32 sli_splt_mode : 1; member
H A Dhal_h264e_vepu540c.c1112 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu540c_split()
1123 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu540c_split()
1140 regs->reg_base.sli_splt.sli_splt_mode = 1; in setup_vepu540c_split()
H A Dhal_h264e_vepu540c_reg.h508 RK_U32 sli_splt_mode : 1; member
H A Dhal_h264e_vepu580.c1679 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu580_split()
1690 regs->reg_base.sli_splt.sli_splt_mode = 0; in setup_vepu580_split()
1706 regs->reg_base.sli_splt.sli_splt_mode = 1; in setup_vepu580_split()
H A Dhal_h264e_vepu510.c1553 reg_frm->common.sli_splt.sli_splt_mode = 0; in setup_vepu510_split()
1564 reg_frm->common.sli_splt.sli_splt_mode = 0; in setup_vepu510_split()
1580 reg_frm->common.sli_splt.sli_splt_mode = 1; in setup_vepu510_split()
H A Dhal_h264e_vepu511.c1553 reg_frm->common.sli_splt.sli_splt_mode = 0; in setup_vepu511_split()
1564 reg_frm->common.sli_splt.sli_splt_mode = 0; in setup_vepu511_split()
1580 reg_frm->common.sli_splt.sli_splt_mode = 1; in setup_vepu511_split()
H A Dhal_h264e_vepu580_reg.h475 RK_U32 sli_splt_mode : 1; member
/rockchip-linux_mpp/mpp/codec/enc/h265/
H A Dh265e_syntax.c155 sp->sli_splt_mode = codec->slice_cfg.split_mode; in fill_slice_parameters()
/rockchip-linux_mpp/mpp/hal/rkenc/jpege/
H A Dhal_jpege_vepu540c_reg.h589 RK_U32 sli_splt_mode : 1; member
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu541_reg.h559 RK_U32 sli_splt_mode : 1; member
H A Dhal_h265e_vepu540c_reg.h596 RK_U32 sli_splt_mode : 1; member
H A Dhal_h265e_vepu540c.c1139 regs->reg_base.reg0216_sli_splt.sli_splt_mode = 0; in vepu540c_h265_set_split()
1150 regs->reg_base.reg0216_sli_splt.sli_splt_mode = 0; in vepu540c_h265_set_split()
1171 regs->reg_base.reg0216_sli_splt.sli_splt_mode = 1; in vepu540c_h265_set_split()
H A Dhal_h265e_vepu541.c1462 regs->sli_spl.sli_splt_mode = 0; in setup_vepu541_split()
1473 regs->sli_spl.sli_splt_mode = 0; in setup_vepu541_split()
1484 regs->sli_spl.sli_splt_mode = 1; in setup_vepu541_split()
H A Dhal_h265e_vepu510.c1824 regs->reg_frm.common.sli_splt.sli_splt_mode = 0; in setup_vepu510_split()
1835 regs->reg_frm.common.sli_splt.sli_splt_mode = 0; in setup_vepu510_split()
1856 regs->reg_frm.common.sli_splt.sli_splt_mode = 1; in setup_vepu510_split()
H A Dhal_h265e_vepu511.c952 regs->reg_frm.common.sli_splt.sli_splt_mode = 0; in vepu511_h265_set_split()
963 regs->reg_frm.common.sli_splt.sli_splt_mode = 0; in vepu511_h265_set_split()
975 regs->reg_frm.common.sli_splt.sli_splt_mode = 1; in vepu511_h265_set_split()
H A Dhal_h265e_vepu580.c2620 regs->reg_base.reg0216_sli_splt.sli_splt_mode = 0; in vepu580_setup_split()
2631 regs->reg_base.reg0216_sli_splt.sli_splt_mode = 0; in vepu580_setup_split()
2652 regs->reg_base.reg0216_sli_splt.sli_splt_mode = 1; in vepu580_setup_split()
H A Dhal_h265e_vepu580_reg.h468 RK_U32 sli_splt_mode : 1; member
/rockchip-linux_mpp/mpp/hal/rkenc/common/
H A Dvepu510_common.h662 RK_U32 sli_splt_mode : 1; member
H A Dvepu511_common.h1007 RK_U32 sli_splt_mode : 1; member