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Searched refs:sclst_offset (Results 1 – 12 of 12) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_ctx.h89 RK_U32 sclst_offset; member
H A Dhal_h265d_vdpu382.c153 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in hal_h265d_vdpu382_init()
407 RK_U8 *ptr_scaling = (RK_U8 *)mpp_buffer_get_ptr(reg_ctx->bufs) + reg_ctx->sclst_offset; in hal_h265d_v382_output_pps_packet()
423 mpp_dev_set_reg_offset(reg_ctx->dev, 180, addr + reg_ctx->sclst_offset); in hal_h265d_v382_output_pps_packet()
682 reg_ctx->sclst_offset = reg_ctx->offset_sclst[i]; in hal_h265d_vdpu382_gen_regs()
H A Dhal_h265d_vdpu384a.c142 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in hal_h265d_vdpu384a_init()
610 RK_U8 *ptr_scaling = (RK_U8 *)mpp_buffer_get_ptr(reg_ctx->bufs) + reg_ctx->sclst_offset; in hal_h265d_v345_output_pps_packet()
623 mpp_dev_set_reg_offset(reg_ctx->dev, 132, addr + reg_ctx->sclst_offset); in hal_h265d_v345_output_pps_packet()
811 reg_ctx->sclst_offset = reg_ctx->offset_sclst[i]; in hal_h265d_vdpu384a_gen_regs()
H A Dhal_h265d_vdpu34x.c155 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in hal_h265d_vdpu34x_init()
414 RK_U8 *ptr_scaling = (RK_U8 *)mpp_buffer_get_ptr(reg_ctx->bufs) + reg_ctx->sclst_offset; in hal_h265d_v345_output_pps_packet()
430 mpp_dev_set_reg_offset(reg_ctx->dev, 180, addr + reg_ctx->sclst_offset); in hal_h265d_v345_output_pps_packet()
876 reg_ctx->sclst_offset = reg_ctx->offset_sclst[i]; in hal_h265d_vdpu34x_gen_regs()
H A Dhal_h265d_vdpu383.c167 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in hal_h265d_vdpu383_init()
614 RK_U8 *ptr_scaling = (RK_U8 *)mpp_buffer_get_ptr(reg_ctx->bufs) + reg_ctx->sclst_offset; in hal_h265d_v345_output_pps_packet()
627 mpp_dev_set_reg_offset(reg_ctx->dev, 132, addr + reg_ctx->sclst_offset); in hal_h265d_v345_output_pps_packet()
892 reg_ctx->sclst_offset = reg_ctx->offset_sclst[i]; in hal_h265d_vdpu383_gen_regs()
/rockchip-linux_mpp/mpp/hal/rkdec/avs2d/
H A Dhal_avs2d_rkv.c63 RK_U32 sclst_offset; member
543 reg_ctx->sclst_offset = reg_ctx->reg_buf[0].offset_sclst; in hal_avs2d_rkv_init()
636 reg_ctx->sclst_offset = reg_ctx->reg_buf[i].offset_sclst; in hal_avs2d_rkv_gen_regs()
658 …memcpy(reg_ctx->bufs_ptr + reg_ctx->sclst_offset, reg_ctx->scalist_dat, sizeof(reg_ctx->scalist_da… in hal_avs2d_rkv_gen_regs()
668 mpp_dev_set_reg_offset(p_hal->dev, 180, reg_ctx->sclst_offset); in hal_avs2d_rkv_gen_regs()
685 … fwrite(reg_ctx->bufs_ptr + reg_ctx->sclst_offset, 1, sizeof(reg_ctx->scalist_dat), fp_scalist); in hal_avs2d_rkv_gen_regs()
H A Dhal_avs2d_vdpu383.c55 RK_U32 sclst_offset; member
567 reg_ctx->sclst_offset = reg_ctx->reg_buf[0].offset_sclst; in hal_avs2d_vdpu383_init()
661 reg_ctx->sclst_offset = reg_ctx->reg_buf[i].offset_sclst; in hal_avs2d_vdpu383_gen_regs()
683 …memcpy(reg_ctx->bufs_ptr + reg_ctx->sclst_offset, reg_ctx->scalist_dat, sizeof(reg_ctx->scalist_da… in hal_avs2d_vdpu383_gen_regs()
690 mpp_dev_set_reg_offset(p_hal->dev, 132, reg_ctx->sclst_offset); in hal_avs2d_vdpu383_gen_regs()
H A Dhal_avs2d_vdpu382.c63 RK_U32 sclst_offset; member
609 reg_ctx->sclst_offset = reg_ctx->reg_buf[0].offset_sclst; in hal_avs2d_vdpu382_init()
703 reg_ctx->sclst_offset = reg_ctx->reg_buf[i].offset_sclst; in hal_avs2d_vdpu382_gen_regs()
725 …memcpy(reg_ctx->bufs_ptr + reg_ctx->sclst_offset, reg_ctx->scalist_dat, sizeof(reg_ctx->scalist_da… in hal_avs2d_vdpu382_gen_regs()
735 mpp_dev_set_reg_offset(p_hal->dev, 180, reg_ctx->sclst_offset); in hal_avs2d_vdpu382_gen_regs()
752 … fwrite(reg_ctx->bufs_ptr + reg_ctx->sclst_offset, 1, sizeof(reg_ctx->scalist_dat), fp_scalist); in hal_avs2d_vdpu382_gen_regs()
/rockchip-linux_mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu34x.c150 RK_U32 sclst_offset; member
739 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in vdpu34x_h264d_init()
946 ctx->sclst_offset = ctx->offset_sclst[i]; in vdpu34x_h264d_gen_regs()
986 memcpy((char *)ctx->bufs_ptr + ctx->sclst_offset, (void *)ctx->sclst, sizeof(ctx->sclst)); in vdpu34x_h264d_gen_regs()
988 mpp_dev_set_reg_offset(p_hal->dev, 180, ctx->sclst_offset); in vdpu34x_h264d_gen_regs()
H A Dhal_h264d_vdpu384a.c84 RK_U32 sclst_offset; member
618 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in vdpu384a_h264d_init()
818 ctx->sclst_offset = ctx->offset_sclst[i]; in vdpu384a_h264d_gen_regs()
849 memcpy((char *)ctx->bufs_ptr + ctx->sclst_offset, (void *)ctx->sclst, sizeof(ctx->sclst)); in vdpu384a_h264d_gen_regs()
851 mpp_dev_set_reg_offset(p_hal->dev, 132, ctx->sclst_offset); in vdpu384a_h264d_gen_regs()
H A Dhal_h264d_vdpu383.c97 RK_U32 sclst_offset; member
663 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in vdpu383_h264d_init()
867 ctx->sclst_offset = ctx->offset_sclst[i]; in vdpu383_h264d_gen_regs()
903 memcpy((char *)ctx->bufs_ptr + ctx->sclst_offset, (void *)ctx->sclst, sizeof(ctx->sclst)); in vdpu383_h264d_gen_regs()
905 mpp_dev_set_reg_offset(p_hal->dev, 132, ctx->sclst_offset); in vdpu383_h264d_gen_regs()
H A Dhal_h264d_vdpu382.c154 RK_U32 sclst_offset; member
760 reg_ctx->sclst_offset = reg_ctx->offset_sclst[0]; in vdpu382_h264d_init()
975 ctx->sclst_offset = ctx->offset_sclst[i]; in vdpu382_h264d_gen_regs()
1014 memcpy((char *)ctx->bufs_ptr + ctx->sclst_offset, (void *)ctx->sclst, sizeof(ctx->sclst)); in vdpu382_h264d_gen_regs()
1016 mpp_dev_set_reg_offset(p_hal->dev, 180, ctx->sclst_offset); in vdpu382_h264d_gen_regs()