Searched refs:regs_set (Results 1 – 14 of 14) sorted by relevance
109 H265eV510RegSet *regs = frm_cfg->regs_set; in vepu510_h265e_tune_aq()156 H265eV510RegSet *regs = frm->regs_set; in vepu510_h265e_tune_qpmap_init()243 H265eV510RegSet *regs_set = frm->regs_set; in vepu510_h265e_tune_stat_update() local309 fb->st_madi = madi_th_cnt0 * regs_set->reg_rc_roi.madi_st_thd.madi_th0 + in vepu510_h265e_tune_stat_update()310 madi_th_cnt1 * (regs_set->reg_rc_roi.madi_st_thd.madi_th0 + in vepu510_h265e_tune_stat_update()311 regs_set->reg_rc_roi.madi_st_thd.madi_th1) / 2 + in vepu510_h265e_tune_stat_update()312 madi_th_cnt2 * (regs_set->reg_rc_roi.madi_st_thd.madi_th1 + in vepu510_h265e_tune_stat_update()313 regs_set->reg_rc_roi.madi_st_thd.madi_th2) / 2 + in vepu510_h265e_tune_stat_update()314 madi_th_cnt3 * regs_set->reg_rc_roi.madi_st_thd.madi_th2; in vepu510_h265e_tune_stat_update()320 fb->st_madp = madp_th_cnt0 * regs_set->reg_rc_roi.madp_st_thd0.madp_th0 + in vepu510_h265e_tune_stat_update()[all …]
135 H265eV580RegSet *regs_set[MAX_TILE_NUM]; member1415 MPP_FREE(frm->regs_set[j]); in hal_h265e_v580_deinit()1539 frm_cfg->regs_set[0] = mpp_calloc(H265eV580RegSet, 1); in hal_h265e_v580_init()1542 frm_cfg->osd_cfg.reg_base = &frm_cfg->regs_set[0]->reg_osd_cfg; in hal_h265e_v580_init()1759 H265eV580RegSet *regs = frm->regs_set[0]; in setup_intra_refresh()2290 H265eV580RegSet *regs = frm->regs_set[0]; in setup_vepu580_dual_core()2448 hevc_vepu580_base *regs = &frm->regs_set[0]->reg_base; in vepu580_h265_set_hw_address()2681 H265eV580RegSet *regs = frm_cfg->regs_set[0]; in hal_h265e_v580_gen_regs()2885 H265eV580RegSet *hw_regs = frm->regs_set[k]; in hal_h265e_v580_start()2891 frm->regs_set[k] = hw_regs; in hal_h265e_v580_start()[all …]
80 H265eV510RegSet *regs_set; member1063 MPP_FREE(frm->regs_set); in hal_h265e_v510_deinit()1121 frm_cfg->regs_set = mpp_calloc(H265eV510RegSet, 1); in hal_h265e_v510_init()1786 H265eV510RegSet *regs = frm->regs_set; in setup_vepu510_dual_core()1880 H265eV510RegSet *regs = frm_cfg->regs_set; in vepu510_h265_set_scaling_list()1939 H265eV510RegSet *regs = frm_cfg->regs_set; in hal_h265e_v510_gen_regs()2082 RK_U32 *regs = (RK_U32*)frm->regs_set; in hal_h265e_v510_start()2083 H265eV510RegSet *hw_regs = frm->regs_set; in hal_h265e_v510_start()2346 H265eV510RegSet *regs = frm->regs_set; in hal_h265e_v510_wait()
81 H265eV511RegSet *regs_set; member458 MPP_FREE(frm->regs_set); in hal_h265e_vepu511_deinit()516 frm_cfg->regs_set = mpp_calloc(H265eV511RegSet, 1); in hal_h265e_vepu511_init()2173 H265eV511RegSet *regs = frm_cfg->regs_set; in hal_h265e_vepu511_gen_regs()2243 RK_U32 *regs = (RK_U32*)frm->regs_set; in hal_h265e_vepu511_start()2244 H265eV511RegSet *hw_regs = frm->regs_set; in hal_h265e_vepu511_start()2534 H265eV511RegSet *regs = frm->regs_set; in vepu511_h265e_update_tune_stat()2638 H265eV511RegSet *regs = frm->regs_set; in hal_h265e_vepu511_wait()
236 H265eV580RegSet *regs = ctx->frm->regs_set[0]; in vepu580_h265e_tune_atf()384 H265eV580RegSet *regs = ctx->frm->regs_set[0]; in vepu580_h265e_tune_reg_patch()
81 HalVepu540cRegSet *regs_set; member137 MPP_FREE(p->regs_set); in hal_h264e_vepu540c_deinit()183 p->regs_set = mpp_calloc(HalVepu540cRegSet, 1); in hal_h264e_vepu540c_init()185 if (!p->regs_set) { in hal_h264e_vepu540c_init()1461 HalVepu540cRegSet *regs = ctx->regs_set; in hal_h264e_vepu540c_gen_regs()1498 setup_vepu540c_l2(ctx->regs_set, slice, &cfg->hw); in hal_h264e_vepu540c_gen_regs()1502 vepu540c_set_roi(&ctx->regs_set->reg_rc_roi.roi_cfg, ctx->roi_data, in hal_h264e_vepu540c_gen_regs()1524 wr_cfg.reg = &ctx->regs_set->reg_ctl; in hal_h264e_vepu540c_start()1525 wr_cfg.size = sizeof(ctx->regs_set->reg_ctl); in hal_h264e_vepu540c_start()1531 for ( i = 0; i < sizeof(ctx->regs_set->reg_ctl) / sizeof(RK_U32); i++) { in hal_h264e_vepu540c_start()[all …]
143 HalVepu510RegSet *regs_set; member583 ctx->regs_set = &ctx->regs_sets[ctx->task_idx]; in hal_h264e_vepu510_get_task()1130 HalVepu510RegSet *regs = ctx->regs_set; in setup_vepu510_rdo_pred()1602 HalVepu510RegSet *regs = ctx->regs_set; in setup_vepu510_me()1721 HalVepu510RegSet *regs = ctx->regs_set; in setup_vepu510_l2()1781 H264eVepu510Frame *reg_frm = &ctx->regs_set->reg_frm; in setup_vepu510_dual_core()1813 Vepu510RcRoi *s = &ctx->regs_set->reg_rc_roi; in setup_vepu510_aq()1849 HalVepu510RegSet *regs = ctx->regs_set; in setup_vepu510_anti_stripe()1891 HalVepu510RegSet *regs = ctx->regs_set; in setup_vepu510_anti_ringing()1952 HalVepu510RegSet *regs = ctx->regs_set; in setup_vepu510_anti_flicker()[all …]
146 HalVepu511RegSet *regs_set; member582 ctx->regs_set = &ctx->regs_sets[ctx->task_idx]; in hal_h264e_vepu511_get_task()1098 HalVepu511RegSet *regs = ctx->regs_set; in setup_vepu511_rdo_pred()1602 HalVepu511RegSet *regs = ctx->regs_set; in setup_vepu511_me()1721 HalVepu511RegSet *regs = ctx->regs_set; in setup_vepu511_l2()1775 Vepu511RcRoi *s = &ctx->regs_set->reg_rc_roi; in setup_vepu511_aq()1811 HalVepu511RegSet *regs = ctx->regs_set; in setup_vepu511_anti_stripe()1853 HalVepu511RegSet *regs = ctx->regs_set; in setup_vepu511_anti_ringing()1914 HalVepu511RegSet *regs = ctx->regs_set; in setup_vepu511_anti_flicker()1973 HalVepu511RegSet *regs = ctx->regs_set; in setup_vepu511_anti_smear()[all …]
123 HalVepu580RegSet *regs_set; member601 ctx->regs_set = &ctx->regs_sets[ctx->task_idx]; in hal_h264e_vepu580_get_task()603 ctx->osd_cfg.reg_base = &ctx->regs_set->reg_osd; in hal_h264e_vepu580_get_task()2088 Vepu580BaseCfg *reg_base = &ctx->regs_set->reg_base; in setup_vepu580_dual_core()2117 HalVepu580RegSet *regs = ctx->regs_set; in hal_h264e_vepu580_gen_regs()2192 HalVepu580RegSet *regs = ctx->regs_set; in hal_h264e_vepu580_start()2496 RK_U32 madi_th_cnt1 = ctx->regs_set->reg_st.madi_b16num1; in hal_h264e_vepu580_ret_task()2497 RK_U32 madi_th_cnt2 = ctx->regs_set->reg_st.madi_b16num2; in hal_h264e_vepu580_ret_task()2498 RK_U32 madi_th_cnt3 = ctx->regs_set->reg_st.madi_b16num3; in hal_h264e_vepu580_ret_task()2500 RK_U32 madp_th_cnt1 = ctx->regs_set->reg_st.md_sad_b16num1; in hal_h264e_vepu580_ret_task()[all …]
58 HalVepu510RegSet *regs = ctx->regs_set; in vepu510_h264e_tune_qpmap_init()
85 Vepu541H264eRegSet regs_set; member193 p->osd_cfg.reg_base = &p->regs_set; in hal_h264e_vepu541_init()1590 Vepu541H264eRegSet *regs = &ctx->regs_set; in hal_h264e_vepu541_gen_regs()1684 wr_cfg.reg = &ctx->regs_set; in hal_h264e_vepu541_start()
124 HalVepu580RegSet *regs = ctx->regs_set; in vepu580_h264e_tune_reg_patch()
77 H264eVpu2RegSet regs_set; member293 RK_U32 *reg = ctx->regs_set.val; in setup_intra_refresh()349 RK_U32 *reg = ctx->regs_set.val; in hal_h264e_vepu2_gen_regs_v2()655 RK_U32 reg_size = sizeof(ctx->regs_set); in hal_h264e_vepu2_start_v2()658 wr_cfg.reg = &ctx->regs_set; in hal_h264e_vepu2_start_v2()
77 H264eVpu1RegSet regs_set; member299 RK_U32 *reg = ctx->regs_set.val; in hal_h264e_vepu1_gen_regs_v2()590 RK_U32 reg_size = sizeof(ctx->regs_set); in hal_h264e_vepu1_start_v2()593 wr_cfg.reg = &ctx->regs_set; in hal_h264e_vepu1_start_v2()