Lines Matching refs:regs_set
81 HalVepu540cRegSet *regs_set; member
137 MPP_FREE(p->regs_set); in hal_h264e_vepu540c_deinit()
183 p->regs_set = mpp_calloc(HalVepu540cRegSet, 1); in hal_h264e_vepu540c_init()
185 if (!p->regs_set) { in hal_h264e_vepu540c_init()
1461 HalVepu540cRegSet *regs = ctx->regs_set; in hal_h264e_vepu540c_gen_regs()
1498 setup_vepu540c_l2(ctx->regs_set, slice, &cfg->hw); in hal_h264e_vepu540c_gen_regs()
1502 vepu540c_set_roi(&ctx->regs_set->reg_rc_roi.roi_cfg, ctx->roi_data, in hal_h264e_vepu540c_gen_regs()
1524 wr_cfg.reg = &ctx->regs_set->reg_ctl; in hal_h264e_vepu540c_start()
1525 wr_cfg.size = sizeof(ctx->regs_set->reg_ctl); in hal_h264e_vepu540c_start()
1531 for ( i = 0; i < sizeof(ctx->regs_set->reg_ctl) / sizeof(RK_U32); i++) { in hal_h264e_vepu540c_start()
1543 wr_cfg.reg = &ctx->regs_set->reg_base; in hal_h264e_vepu540c_start()
1544 wr_cfg.size = sizeof(ctx->regs_set->reg_base); in hal_h264e_vepu540c_start()
1552 wr_cfg.reg = &ctx->regs_set->reg_rc_roi; in hal_h264e_vepu540c_start()
1553 wr_cfg.size = sizeof(ctx->regs_set->reg_rc_roi); in hal_h264e_vepu540c_start()
1561 wr_cfg.reg = &ctx->regs_set->reg_s3; in hal_h264e_vepu540c_start()
1562 wr_cfg.size = sizeof(ctx->regs_set->reg_s3); in hal_h264e_vepu540c_start()
1570 wr_cfg.reg = &ctx->regs_set->reg_rdo; in hal_h264e_vepu540c_start()
1571 wr_cfg.size = sizeof(ctx->regs_set->reg_rdo); in hal_h264e_vepu540c_start()
1580 wr_cfg.reg = &ctx->regs_set->reg_scl; in hal_h264e_vepu540c_start()
1581 wr_cfg.size = sizeof(ctx->regs_set->reg_scl); in hal_h264e_vepu540c_start()
1590 rd_cfg.reg = &ctx->regs_set->reg_st; in hal_h264e_vepu540c_start()
1591 rd_cfg.size = sizeof(ctx->regs_set->reg_st); in hal_h264e_vepu540c_start()
1616 HalVepu540cRegSet *regs_set = ctx->regs_set; in hal_h264e_vepu540c_status_check() local
1618 if (regs_set->reg_ctl.int_sta.lkt_node_done_sta) in hal_h264e_vepu540c_status_check()
1621 if (regs_set->reg_ctl.int_sta.enc_done_sta) in hal_h264e_vepu540c_status_check()
1624 if (regs_set->reg_ctl.int_sta.vslc_done_sta) in hal_h264e_vepu540c_status_check()
1627 if (regs_set->reg_ctl.int_sta.sclr_done_sta) in hal_h264e_vepu540c_status_check()
1630 if (regs_set->reg_ctl.int_sta.vbsf_oflw_sta) in hal_h264e_vepu540c_status_check()
1633 if (regs_set->reg_ctl.int_sta.vbuf_lens_sta) in hal_h264e_vepu540c_status_check()
1636 if (regs_set->reg_ctl.int_sta.enc_err_sta) in hal_h264e_vepu540c_status_check()
1639 if (regs_set->reg_ctl.int_sta.wdg_sta) in hal_h264e_vepu540c_status_check()
1649 HalVepu540cRegSet *regs_set = ctx->regs_set; in hal_h264e_vepu540c_wait() local
1661 task->hw_length += regs_set->reg_st.bs_lgth_l32; in hal_h264e_vepu540c_wait()
1664 mpp_packet_add_segment_info(pkt, type, offset, regs_set->reg_st.bs_lgth_l32); in hal_h264e_vepu540c_wait()
1693 HalVepu540cRegSet *regs_set = (HalVepu540cRegSet *)ctx->regs_set; in hal_h264e_vepu540c_ret_task() local
1701 rc_info->quality_real = regs_set->reg_st.qp_sum / mbs; in hal_h264e_vepu540c_ret_task()
1708 rc_info->iblk4_prop = (regs_set->reg_st.st_pnum_i4.pnum_i4 + in hal_h264e_vepu540c_ret_task()
1709 regs_set->reg_st.st_pnum_i8.pnum_i8 + in hal_h264e_vepu540c_ret_task()
1710 regs_set->reg_st.st_pnum_i16.pnum_i16) * 256 / mbs; in hal_h264e_vepu540c_ret_task()
1712 rc_info->sse = ((RK_S64)regs_set->reg_st.sse_h32 << 16) + in hal_h264e_vepu540c_ret_task()
1713 (regs_set->reg_st.st_sse_bsl.sse_l16 & 0xffff); in hal_h264e_vepu540c_ret_task()
1714 rc_info->lvl16_inter_num = regs_set->reg_st.st_pnum_p16.pnum_p16; in hal_h264e_vepu540c_ret_task()
1715 rc_info->lvl8_inter_num = regs_set->reg_st.st_pnum_p8.pnum_p8; in hal_h264e_vepu540c_ret_task()
1716 rc_info->lvl16_intra_num = regs_set->reg_st.st_pnum_i16.pnum_i16; in hal_h264e_vepu540c_ret_task()
1717 rc_info->lvl8_intra_num = regs_set->reg_st.st_pnum_i8.pnum_i8; in hal_h264e_vepu540c_ret_task()
1718 rc_info->lvl4_intra_num = regs_set->reg_st.st_pnum_i4.pnum_i4; in hal_h264e_vepu540c_ret_task()