| /rockchip-linux_mpp/mpp/hal/rkdec/h264d/ |
| H A D | hal_h264d_vdpu384a.c | 381 regs->ctrl_regs.reg9.dpb_data_sel = 0; in set_registers()
382 regs->ctrl_regs.reg9.dpb_output_dis = 0; in set_registers()
383 regs->ctrl_regs.reg9.pp_m_output_mode = 0; in set_registers()
389 regs->ctrl_regs.reg9.dpb_data_sel = 1; in set_registers()
390 regs->ctrl_regs.reg9.dpb_output_dis = 1; in set_registers()
391 regs->ctrl_regs.reg9.pp_m_output_mode = 2; in set_registers()
397 regs->ctrl_regs.reg9.dpb_data_sel = 1; in set_registers()
398 regs->ctrl_regs.reg9.dpb_output_dis = 1; in set_registers()
399 regs->ctrl_regs.reg9.pp_m_output_mode = 1; in set_registers()
534 regs->ctrl_regs.reg9.scale_down_en = 0; in set_registers()
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| H A D | hal_h264d_vdpu383.c | 445 regs->ctrl_regs.reg9.fbc_e = 1; in set_registers()
449 regs->ctrl_regs.reg9.tile_e = 1; in set_registers()
453 regs->ctrl_regs.reg9.fbc_e = 0; in set_registers()
579 regs->ctrl_regs.reg9.scale_down_en = 0; in set_registers()
592 ctrl_regs->reg9.buf_empty_en = 0; in init_ctrl_regs()
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| /rockchip-linux_mpp/mpp/hal/rkdec/h265d/ |
| H A D | hal_h265d_vdpu384a.c | 906 hw_regs->ctrl_regs.reg9.dpb_data_sel = 0; in hal_h265d_vdpu384a_gen_regs()
907 hw_regs->ctrl_regs.reg9.dpb_output_dis = 0; in hal_h265d_vdpu384a_gen_regs()
908 hw_regs->ctrl_regs.reg9.pp_m_output_mode = 0; in hal_h265d_vdpu384a_gen_regs()
915 hw_regs->ctrl_regs.reg9.dpb_data_sel = 1; in hal_h265d_vdpu384a_gen_regs()
916 hw_regs->ctrl_regs.reg9.dpb_output_dis = 1; in hal_h265d_vdpu384a_gen_regs()
917 hw_regs->ctrl_regs.reg9.pp_m_output_mode = 2; in hal_h265d_vdpu384a_gen_regs()
931 hw_regs->ctrl_regs.reg9.dpb_data_sel = 1; in hal_h265d_vdpu384a_gen_regs()
932 hw_regs->ctrl_regs.reg9.dpb_output_dis = 1; in hal_h265d_vdpu384a_gen_regs()
933 hw_regs->ctrl_regs.reg9.pp_m_output_mode = 1; in hal_h265d_vdpu384a_gen_regs()
1013 hw_regs->ctrl_regs.reg9.low_latency_en = 0; in hal_h265d_vdpu384a_gen_regs()
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| H A D | hal_h265d_vdpu383.c | 994 hw_regs->ctrl_regs.reg9.fbc_e = 1; in hal_h265d_vdpu383_gen_regs()
999 hw_regs->ctrl_regs.reg9.tile_e = 1; in hal_h265d_vdpu383_gen_regs()
1011 hw_regs->ctrl_regs.reg9.fbc_e = 0; in hal_h265d_vdpu383_gen_regs()
1080 hw_regs->ctrl_regs.reg9.buf_empty_en = 0; in hal_h265d_vdpu383_gen_regs()
1225 hw_regs->ctrl_regs.reg9.scale_down_en = 0; in hal_h265d_vdpu383_gen_regs()
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| /rockchip-linux_mpp/mpp/vproc/vdpp/ |
| H A D | vdpp_common.c | 719 dmsr->reg9.sw_dmsr_edge_k_4 = adj_mapping_k[4]; in set_dmsr_to_vdpp_reg()
720 dmsr->reg9.sw_dmsr_edge_k_5 = adj_mapping_k[5]; in set_dmsr_to_vdpp_reg()
881 zme->common.reg9.yrgb_yscl_factor = yrgb_scl_info.yscl_factor; in set_zme_to_vdpp_reg()
882 zme->common.reg9.yrgb_yscl_offset = yrgb_scl_info.yscl_offset; in set_zme_to_vdpp_reg()
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| H A D | vdpp_reg.h | 87 } reg9; // 0x0024 member
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| H A D | vdpp_common.h | 113 } reg9; /* 0x00A4 */ member
308 } reg9; /* 0x0024 */ member
652 } reg9; /* 0x0224 */ member
996 } reg9; /* 0x0424 */ member
1340 } reg9; /* 0x0624 */ member
1699 } reg9; /* 0x0824 */ member
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| H A D | vdpp2_reg.h | 108 } reg9; // 0x0024 member
286 } reg9; // 0x0124 member
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| H A D | vdpp2.c | 462 dst_reg->es.reg9.lut_x7 = p_es_param->es_iDiff2conf_lut_x[7]; in set_es_to_vdpp2_reg()
463 dst_reg->es.reg9.lut_x8 = p_es_param->es_iDiff2conf_lut_x[8]; in set_es_to_vdpp2_reg()
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| /rockchip-linux_mpp/mpp/hal/rkdec/avs2d/ |
| H A D | hal_avs2d_vdpu383.c | 241 ctrl_regs->reg9.buf_empty_en = 1; in init_ctrl_regs()
386 regs->ctrl_regs.reg9.fbc_e = 1; in fill_registers()
391 regs->ctrl_regs.reg9.tile_e = 1; in fill_registers()
395 regs->ctrl_regs.reg9.fbc_e = 0; in fill_registers()
396 regs->ctrl_regs.reg9.tile_e = 0; in fill_registers()
490 regs->ctrl_regs.reg9.scale_down_en = 0; in fill_registers()
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| /rockchip-linux_mpp/mpp/hal/rkdec/ |
| H A D | vdpu383_com.c | 286 com->reg9.scale_down_en = 1; in vdpu383_setup_down_scale()
287 com->reg9.av1_fgs_en = 0; in vdpu383_setup_down_scale()
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| H A D | vdpu384a_com.c | 298 com->reg9.scale_down_en = 1; in vdpu384a_setup_down_scale()
299 com->reg9.av1_fgs_en = 0; in vdpu384a_setup_down_scale()
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| /rockchip-linux_mpp/mpp/hal/rkdec/vp9d/ |
| H A D | hal_vp9d_vdpu383.c | 861 vp9_hw_regs->ctrl_regs.reg9.fbc_e = 1; in hal_vp9d_vdpu383_gen_regs()
873 vp9_hw_regs->ctrl_regs.reg9.fbc_e = 0; in hal_vp9d_vdpu383_gen_regs()
875 vp9_hw_regs->ctrl_regs.reg9.tile_e = 1; in hal_vp9d_vdpu383_gen_regs()
879 vp9_hw_regs->ctrl_regs.reg9.tile_e = 0; in hal_vp9d_vdpu383_gen_regs()
1021 vp9_hw_regs->ctrl_regs.reg9.buf_empty_en = 0; in hal_vp9d_vdpu383_gen_regs()
1120 vp9_hw_regs->ctrl_regs.reg9.scale_down_en = 0; in hal_vp9d_vdpu383_gen_regs()
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| /rockchip-linux_mpp/mpp/hal/vpu/vp8d/ |
| H A D | hal_vp8d_vdpu1.c | 291 regs->reg9.sw_stream1_len = len; in hal_vp8d_dct_partition_cfg()
292 regs->reg9.sw_coeffs_part_am = (1 << pic_param->log2_nbr_of_dct_partitions); in hal_vp8d_dct_partition_cfg()
293 regs->reg9.sw_coeffs_part_am--; in hal_vp8d_dct_partition_cfg()
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| H A D | hal_vp8d_vdpu1_reg.h | 152 } reg9; member
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| /rockchip-linux_mpp/mpp/hal/rkdec/av1d/ |
| H A D | hal_av1d_vdpu383.c | 2233 regs->ctrl_regs.reg9.fbc_e = 0; in vdpu383_av1d_gen_regs()
2234 regs->ctrl_regs.reg9.buf_empty_en = 0; in vdpu383_av1d_gen_regs()
2344 regs->ctrl_regs.reg9.fbc_e = 1; in vdpu383_av1d_gen_regs()
2349 regs->ctrl_regs.reg9.tile_e = 1; in vdpu383_av1d_gen_regs()
2353 regs->ctrl_regs.reg9.fbc_e = 0; in vdpu383_av1d_gen_regs()
2471 regs->ctrl_regs.reg9.scale_down_en = 0; in vdpu383_av1d_gen_regs()
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| /rockchip-linux_mpp/mpp/hal/rkdec/inc/ |
| H A D | vdpu383_com.h | 74 } reg9; member
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| H A D | vdpu384a_com.h | 92 } reg9; member
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| /rockchip-linux_mpp/mpp/hal/vpu/jpegd/ |
| H A D | hal_jpegd_vdpu1_reg.h | 365 } reg9; member
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