Searched refs:reg4 (Results 1 – 12 of 12) sorted by relevance
685 dmsr->reg4.sw_dmsr_edge_low_thre_4 = p_dmsr_param->dmsr_edge_th_low_arr[4]; in set_dmsr_to_vdpp_reg()686 dmsr->reg4.sw_dmsr_edge_high_thre_4 = p_dmsr_param->dmsr_edge_th_high_arr[4]; in set_dmsr_to_vdpp_reg()847 zme->common.reg4.yrgb_xsd_en = yrgb_scl_info.xsd_en; in set_zme_to_vdpp_reg()848 zme->common.reg4.yrgb_xsu_en = yrgb_scl_info.xsu_en; in set_zme_to_vdpp_reg()849 zme->common.reg4.yrgb_scl_mode = yrgb_scl_info.xscl_mode; in set_zme_to_vdpp_reg()850 zme->common.reg4.yrgb_ysd_en = yrgb_scl_info.ysd_en; in set_zme_to_vdpp_reg()851 zme->common.reg4.yrgb_ysu_en = yrgb_scl_info.ysu_en; in set_zme_to_vdpp_reg()852 zme->common.reg4.yrgb_yscl_mode = yrgb_scl_info.yscl_mode; in set_zme_to_vdpp_reg()853 zme->common.reg4.yrgb_dering_en = yrgb_scl_info.dering_en; in set_zme_to_vdpp_reg()854 zme->common.reg4.yrgb_gt_en = yrgb_scl_info.ygt_en; in set_zme_to_vdpp_reg()[all …]
44 dst_reg->common.reg4.sw_vdpp_clk_on = 1; in vdpp_params_to_reg()45 dst_reg->common.reg4.sw_md_clk_on = 1; in vdpp_params_to_reg()46 dst_reg->common.reg4.sw_dect_clk_on = 1; in vdpp_params_to_reg()47 dst_reg->common.reg4.sw_me_clk_on = 1; in vdpp_params_to_reg()48 dst_reg->common.reg4.sw_mc_clk_on = 1; in vdpp_params_to_reg()49 dst_reg->common.reg4.sw_eedi_clk_on = 1; in vdpp_params_to_reg()50 dst_reg->common.reg4.sw_ble_clk_on = 1; in vdpp_params_to_reg()51 dst_reg->common.reg4.sw_out_clk_on = 1; in vdpp_params_to_reg()52 dst_reg->common.reg4.sw_ctrl_clk_on = 1; in vdpp_params_to_reg()53 dst_reg->common.reg4.sw_ram_clk_on = 1; in vdpp_params_to_reg()[all …]
415 dst_reg->dci.reg4.sw_dci_hist_addr = src_params->hist; in set_hist_to_vdpp2_reg()450 dst_reg->es.reg4.diff_gain0 = p_es_param->es_iK1; in set_es_to_vdpp2_reg()451 dst_reg->es.reg4.diff_limit = p_es_param->es_iDeltaLimit; in set_es_to_vdpp2_reg()824 dst_reg->sharp.reg4.sw_peaking_h00 = p_shp_param->peaking_filt_core_H0[0]; in set_shp_to_vdpp2_reg()825 dst_reg->sharp.reg4.sw_peaking_h01 = p_shp_param->peaking_filt_core_H0[1]; in set_shp_to_vdpp2_reg()826 dst_reg->sharp.reg4.sw_peaking_h02 = p_shp_param->peaking_filt_core_H0[2]; in set_shp_to_vdpp2_reg()1106 dst_reg->common.reg4.sw_vdpp_clk_on = 1; in vdpp2_params_to_reg()1107 dst_reg->common.reg4.sw_md_clk_on = 1; in vdpp2_params_to_reg()1108 dst_reg->common.reg4.sw_dect_clk_on = 1; in vdpp2_params_to_reg()1109 dst_reg->common.reg4.sw_me_clk_on = 1; in vdpp2_params_to_reg()[all …]
62 } reg4; // 0x0010 member
88 } reg4; /* 0x0090 */ member283 } reg4; /* 0x0010 */ member627 } reg4; /* 0x0210 */ member971 } reg4; /* 0x0410 */ member1315 } reg4; /* 0x0610 */ member1669 } reg4; /* 0x0810 */ member
72 } reg4; // 0x0010 member230 } reg4; // 0x00F0 member261 } reg4; // 0x0110 member437 } reg4; // 0x0210 member
570 reg->reg4.sw_hor_scale_mode = 1; in jpegd_setup_pp()571 reg->reg4.sw_scale_wratio = (outw << 16) / inw; in jpegd_setup_pp()574 reg->reg4.sw_hor_scale_mode = 2; in jpegd_setup_pp()577 reg->reg4.sw_hor_scale_mode = 0; in jpegd_setup_pp()580 reg->reg4.sw_ver_scale_mode = 1; in jpegd_setup_pp()584 reg->reg4.sw_ver_scale_mode = 2; in jpegd_setup_pp()587 reg->reg4.sw_ver_scale_mode = 0; in jpegd_setup_pp()
660 reg->reg4.sw_pic_mb_h_ext = ((((s->ver_stride) >> (4)) & 0x700) >> 8); in jpegd_gen_regs()661 reg->reg4.sw_pic_mb_w_ext = ((((s->hor_stride) >> (4)) & 0xE00) >> 9); in jpegd_gen_regs()662 reg->reg4.sw_pic_mb_width = ((s->hor_stride) >> (4)) & 0x1FF; in jpegd_gen_regs()663 reg->reg4.sw_pic_mb_height_p = ((s->ver_stride) >> (4)) & 0x0FF; in jpegd_gen_regs()
318 } reg4; member
62 } reg4; member
464 regs->reg4.sw_pic_mb_width = mb_width & 0x1FF; in hal_vp8d_vdpu1_gen_regs()465 regs->reg4.sw_pic_mb_hight_p = mb_height & 0xFF; in hal_vp8d_vdpu1_gen_regs()466 regs->reg4.sw_pic_mb_w_ext = mb_width >> 9; in hal_vp8d_vdpu1_gen_regs()467 regs->reg4.sw_pic_mb_h_ext = mb_height >> 8; in hal_vp8d_vdpu1_gen_regs()
113 } reg4; member