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Searched refs:hal_h265e_dbg_wgt (Results 1 – 5 of 5) sorted by relevance

/rockchip-linux_mpp/mpp/hal/common/h265/
H A Dhal_h265e_debug.h51 #define hal_h265e_dbg_wgt(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_WGT_REGS, fmt, ## __VA_ARGS__) macro
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu511.c2324 hal_h265e_dbg_wgt("set param reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_vepu511_start()
2341 hal_h265e_dbg_wgt("set sqi reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_vepu511_start()
2358 hal_h265e_dbg_wgt("set scl reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_vepu511_start()
2375 hal_h265e_dbg_wgt("set osd reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_vepu511_start()
H A Dhal_h265e_vepu540c.c1410 hal_h265e_dbg_wgt("set reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v540c_start()
H A Dhal_h265e_vepu510.c2163 hal_h265e_dbg_wgt("set reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v510_start()
H A Dhal_h265e_vepu580.c2240 hal_h265e_dbg_wgt("set reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v580_send_regs()