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Searched refs:hal_h265e_dbg_regs (Results 1 – 6 of 6) sorted by relevance

/rockchip-linux_mpp/mpp/hal/common/h265/
H A Dhal_h265e_debug.h48 #define hal_h265e_dbg_regs(fmt, ...) hal_h265e_dbg(HAL_H265E_DBG_REGS, fmt, ## __VA_ARGS__) macro
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu540c.c1373 hal_h265e_dbg_regs("hw add cfg reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v540c_start()
1377 hal_h265e_dbg_regs("set reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v540c_start()
H A Dhal_h265e_vepu541.c1737 hal_h265e_dbg_regs("set reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v540_start()
1838 hal_h265e_dbg_regs("set reg[%04d]: 0%08x\n", i, regs[i]); in hal_h265e_v541_start()
H A Dhal_h265e_vepu510.c2126 hal_h265e_dbg_regs("hw add cfg reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v510_start()
2130 hal_h265e_dbg_regs("set reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v510_start()
H A Dhal_h265e_vepu511.c2287 hal_h265e_dbg_regs("hw add cfg reg[%04x]: 0x%08x\n", i * 4, regs[i]); in hal_h265e_vepu511_start()
2291 hal_h265e_dbg_regs("set reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_vepu511_start()
H A Dhal_h265e_vepu580.c2201 hal_h265e_dbg_regs("hw add cfg reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v580_send_regs()
2205 hal_h265e_dbg_regs("set reg[%04x]: 0%08x\n", i * 4, regs[i]); in hal_h265e_v580_send_regs()