Searched refs:ctu_target_bits_mul_16 (Results 1 – 5 of 5) sorted by relevance
719 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd32 * mb_h32); in vepu540c_h265_set_rc_regs() local730 if (ctu_target_bits_mul_16 >= 0x100000) { in vepu540c_h265_set_rc_regs()731 ctu_target_bits_mul_16 = 0x50000; in vepu540c_h265_set_rc_regs()733 ctu_target_bits = (ctu_target_bits_mul_16 * mb_wd32) >> 4; in vepu540c_h265_set_rc_regs()747 reg_base->reg214_rc_tgt.ctu_ebit = ctu_target_bits_mul_16; in vepu540c_h265_set_rc_regs()
984 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd64 * mb_h64); in vepu541_h265_set_rc_regs() local995 if (ctu_target_bits_mul_16 >= 0x100000) { in vepu541_h265_set_rc_regs()996 ctu_target_bits_mul_16 = 0x50000; in vepu541_h265_set_rc_regs()998 ctu_target_bits = (ctu_target_bits_mul_16 * mb_wd64) >> 4; in vepu541_h265_set_rc_regs()1014 regs->rc_tgt.ctu_ebits = ctu_target_bits_mul_16; in vepu541_h265_set_rc_regs()
1310 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd32 * mb_h32); in vepu510_h265_set_rc_regs() local1320 if (ctu_target_bits_mul_16 >= 0x100000) { in vepu510_h265_set_rc_regs()1321 ctu_target_bits_mul_16 = 0x50000; in vepu510_h265_set_rc_regs()1323 ctu_target_bits = (ctu_target_bits_mul_16 * mb_wd32) >> 4; in vepu510_h265_set_rc_regs()1335 reg_frm->common.rc_tgt.ctu_ebit = ctu_target_bits_mul_16; in vepu510_h265_set_rc_regs()
1270 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd32 * mb_h32); in vepu511_h265_set_rc_regs() local1281 if (ctu_target_bits_mul_16 >= 0x100000) { in vepu511_h265_set_rc_regs()1282 ctu_target_bits_mul_16 = 0x50000; in vepu511_h265_set_rc_regs()1284 ctu_target_bits = (ctu_target_bits_mul_16 * mb_wd32) >> 4; in vepu511_h265_set_rc_regs()1296 reg_frm->common.rc_tgt.ctu_ebit = ctu_target_bits_mul_16; in vepu511_h265_set_rc_regs()
1904 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd64 * mb_h64); in vepu580_h265_set_rc_regs() local1915 if (ctu_target_bits_mul_16 >= 0x100000) { in vepu580_h265_set_rc_regs()1916 ctu_target_bits_mul_16 = 0x50000; in vepu580_h265_set_rc_regs()1918 ctu_target_bits = (ctu_target_bits_mul_16 * mb_wd64) >> 4; in vepu580_h265_set_rc_regs()1932 reg_base->reg214_rc_tgt.ctu_ebit = ctu_target_bits_mul_16; in vepu580_h265_set_rc_regs()