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Searched refs:csc_ofst_v (Results 1 – 21 of 21) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkenc/jpege/
H A Dhal_jpege_vepu511_reg.h128 RK_U32 csc_ofst_v : 8; member
H A Dhal_jpege_vepu540c_reg.h513 RK_U32 csc_ofst_v : 8; member
H A Dhal_jpege_vepu511.c280 regs->src_udfo.csc_ofst_v = 128; in vepu511_set_jpeg_reg()
/rockchip-linux_mpp/mpp/hal/rkenc/common/
H A Dvepu540c_common.c234 regs->reg0278_src_udfo.csc_ofst_v = 128; in vepu540c_set_jpeg_reg()
H A Dvepu540c_common.h620 RK_U32 csc_ofst_v : 8; member
H A Dvepu510_common.h593 RK_U32 csc_ofst_v : 8; member
H A Dvepu511_common.h922 RK_U32 csc_ofst_v : 8; member
/rockchip-linux_mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu541_reg.h544 RK_U32 csc_ofst_v : 8; member
H A Dhal_h264e_vepu540c_reg.h432 RK_U32 csc_ofst_v : 8; member
H A Dhal_h264e_vepu541.c514 regs->reg021.csc_ofst_v = cfg_coeffs->_2v.offset; in setup_vepu541_prep()
532 regs->reg021.csc_ofst_v = cfg.offset[2]; in setup_vepu541_prep()
H A Dhal_h264e_vepu540c.c506 regs->reg_base.src_udfo.csc_ofst_v = cfg_coeffs->_2v.offset; in setup_vepu540c_prep()
524 regs->reg_base.src_udfo.csc_ofst_v = cfg.offset[2]; in setup_vepu540c_prep()
H A Dhal_h264e_vepu580.c787 regs->reg_base.src_udfo.csc_ofst_v = cfg_coeffs->_2v.offset; in setup_vepu580_prep()
805 regs->reg_base.src_udfo.csc_ofst_v = cfg.offset[2]; in setup_vepu580_prep()
H A Dhal_h264e_vepu510.c803 reg_frm->common.src_udfo.csc_ofst_v = cfg_coeffs->_2v.offset; in setup_vepu510_prep()
821 reg_frm->common.src_udfo.csc_ofst_v = cfg.offset[2]; in setup_vepu510_prep()
H A Dhal_h264e_vepu511.c780 reg_frm->common.src_udfo.csc_ofst_v = cfg_coeffs->_2v.offset; in setup_vepu511_prep()
798 reg_frm->common.src_udfo.csc_ofst_v = cfg.offset[2]; in setup_vepu511_prep()
H A Dhal_h264e_vepu580_reg.h407 RK_U32 csc_ofst_v : 8; member
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu540c_reg.h520 RK_U32 csc_ofst_v : 8; member
H A Dhal_h265e_vepu580_reg.h400 RK_U32 csc_ofst_v : 8; member
H A Dhal_h265e_vepu540c.c843 reg_base->reg0202_src_udfo.csc_ofst_v = cfg_coeffs->_2v.offset; in vepu540c_h265_set_pp_regs()
H A Dhal_h265e_vepu510.c1489 reg_frm->common.src_udfo.csc_ofst_v = cfg_coeffs->_2v.offset; in vepu510_h265_set_pp_regs()
H A Dhal_h265e_vepu511.c1212 reg_frm->common.src_udfo.csc_ofst_v = 128; in vepu511_h265_set_pp_regs()
H A Dhal_h265e_vepu580.c2053 reg_base->reg0202_src_udfo.csc_ofst_v = cfg_coeffs->_2v.offset; in vepu580_h265_set_pp_regs()