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Searched refs:control (Results 1 – 25 of 91) sorted by relevance

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/rockchip-linux_mpp/mpp/hal/vpu/vp8d/
H A Dhal_vp8d_api.c84 if (!self->hal_api.control) in hal_vp8d_control()
87 return self->hal_api.control(hal, cmd_type, param); in hal_vp8d_control()
130 p_api->control = NULL; in hal_vp8d_init()
140 p_api->control = NULL; in hal_vp8d_init()
164 .control = hal_vp8d_control,
/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_api.c54 return self->hal_api.control (hal, cmd_type, param); in hal_jpegd_control()
117 p_api->control = hal_jpegd_vdpu2_control; in hal_jpegd_init()
126 p_api->control = hal_jpegd_vdpu1_control; in hal_jpegd_init()
134 p_api->control = hal_jpegd_rkv_control; in hal_jpegd_init()
174 .control = hal_jpegd_control,
/rockchip-linux_mpp/mpp/hal/rkdec/avsd/
H A Dhal_avsd_api.c66 p_api->control = hal_avsd_plus_control; in init_hard_platform()
77 p_api->control = hal_avsd_vdpu1_control; in init_hard_platform()
88 p_api->control = hal_avsd_vdpu2_control; in init_hard_platform()
294 return p_hal->hal_api.control(decoder, cmd_type, param); in hal_avsd_control()
310 .control = hal_avsd_control,
326 .control = hal_avsd_control,
/rockchip-linux_mpp/doc/
H A DRockchip_Developer_Guide_MPP_CN.md12 | 0.2 | 05/07/2018 | 增加解码器control命令说明，编码器部分说明和demo部分说明 | 陈恒明 |
283 | control | 函数指针 | MPP_RET (\*control)(MppCtx ctx, MpiCmd cmd, MppParam param) <br/>控制接口，…
294 …ppApi结构体里内的函数指针来实现，也就是上图中红框内的部分。红框内的函数调用分为编解码流程接口put/get_packet/frame和相关的control和reset接口。下文先描述编解码器…
318 另一种是按长度读取的数据，这样的数据无法判断一包MppPacket数据是否是完整的一帧，需要MPP内部进行分帧处理。MPP也可以支持这种形式的输入，但需要在mpp_init之前，通过control接…
380 ### 3.2.1 control
382 在定义于rk_mpi_cmd.h文件的MpiCmd枚举类型定义了control接口命令字，其中与解码器和解码过程相关的命令如下：
386 从MPP_DEC_CMD_BASE到MPP_DEC_CMD_END之间的命令为解码器的control接口命令，分别介绍这些命令的功能如下：
471 在这种方式下，用户不需要调用解码器control接口的MPP_DEC_SET_EXT_BUF_GROUP命令，只需要在解码器上报info change时直接调用control接口的MPP_DEC_S…
488 这种模式是mpi_dec_test demo使用的默认模式。用户需要根据get_frame返回的MppFrame的buf_size来创建MppBufferGroup，并通过control接口的MPP…
504 …inger获取显示用内存，把gralloc得到的文件句柄提交（commit）到MppBufferGroup里，再把MppBufferGroup通过control接口MPP_DEC_SET_EXT_…
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H A DRockchip_Developer_Guide_MPP_EN.md12 | 0.2 | 05/07/2018 | Add decoder control command description, encoder part description and…
270 …control | Function pointer | MPP_RET (\*control)(MppCtx ctx, MpiCmd cmd, MppParam param…
279 …re divided into codec process interface put/get_packet/frame and related control and reset interfa…
301 …need_split flag through the MPP_DEC_SET_PARSER_SPLIT_MODE command of the control interface before …
359 # 3.2 Decoder control interface
361 ## 3.2.1 control
363 The MpiCmd enumeration type defined in rk_mpi_cmd.h defines the control interface command word. The…
450 …es not need to call the MPP_DEC_SET_EXT_BUF_GROUP command of the decoder control interface, and on…
452 the control interface when the decoder reports the info change. The decoder will automatically allo…
462 2. Unable to control the memory usage of the decoder. The decoder can use the memory without restr…
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/rockchip-linux_mpp/mpp/hal/vpu/m2vd/
H A Dhal_m2vd_api.c84 p_api->control = NULL; in hal_m2vd_init()
94 p_api->control = NULL; in hal_m2vd_init()
117 .control = NULL,
/rockchip-linux_mpp/mpp/hal/vpu/mpg4d/
H A Dhal_m4vd_api.c76 p_api->control = NULL; in hal_vpu_mpg4d_init()
86 p_api->control = NULL; in hal_vpu_mpg4d_init()
165 .control = NULL,
/rockchip-linux_mpp/mpp/hal/vpu/h263d/
H A Dhal_h263d_api.c94 p_api->control = NULL; in hal_h263d_init()
105 p_api->control = NULL; in hal_h263d_init()
129 .control = NULL,
/rockchip-linux_mpp/test/
H A Dmpi_dec_mt_test.c154 ret = mpi->control(ctx, MPP_DEC_SET_FRAME_INFO, frm); in thread_output()
165 ret = mpi->control(ctx, MPP_DEC_SET_EXT_BUF_GROUP, grp); in thread_output()
172 ret = mpi->control(ctx, MPP_DEC_SET_INFO_CHANGE_READY, NULL); in thread_output()
296 ret = mpi->control(ctx, MPP_SET_OUTPUT_TIMEOUT, param); in mt_dec_decode()
306 ret = mpi->control(ctx, MPP_DEC_GET_CFG, cfg); in mt_dec_decode()
322 ret = mpi->control(ctx, MPP_DEC_SET_CFG, cfg); in mt_dec_decode()
H A Dmpi_rc2_test.c432 ret = enc_mpi->control(enc_ctx, MPP_SET_INPUT_TIMEOUT, (MppParam)&block); in mpi_rc_enc_init()
438 ret = enc_mpi->control(enc_ctx, MPP_SET_OUTPUT_TIMEOUT, (MppParam)&block); in mpi_rc_enc_init()
565 ret = enc_mpi->control(enc_ctx, MPP_ENC_SET_CFG, cfg); in mpi_rc_enc_init()
572 ret = enc_mpi->control(enc_ctx, MPP_ENC_SET_SEI_CFG, &sei_mode); in mpi_rc_enc_init()
607 ret = dec_mpi->control(dec_ctx, MPP_DEC_SET_PARSER_SPLIT_MODE, &need_split); in mpi_rc_post_dec_init()
612 ret = dec_mpi->control(dec_ctx, MPP_SET_INPUT_TIMEOUT, (MppParam)&block); in mpi_rc_post_dec_init()
619 ret = dec_mpi->control(dec_ctx, MPP_SET_OUTPUT_TIMEOUT, (MppParam)&block); in mpi_rc_post_dec_init()
669 ctx->dec_mpi_post->control(ctx->dec_ctx_post, in mpi_rc_dec_post_decode()
735 ret = dec_mpi->control(dec_ctx, MPP_DEC_SET_PARSER_SPLIT_MODE, &need_split); in mpi_rc_pre_dec_init()
741 ret = dec_mpi->control(dec_ctx, MPP_DEC_SET_PARSER_FAST_MODE, &fast_en); in mpi_rc_pre_dec_init()
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H A DREADME.md13 encode use detailed bitrate control config.
16 encode use detailed bitrate control config,and cfg param come from mpi_rc.cfg.
H A Dmpi_dec_nt_test.c137 ret = mpi->control(ctx, MPP_DEC_SET_FRAME_INFO, frm); in dec_loop()
148 ret = mpi->control(ctx, MPP_DEC_SET_EXT_BUF_GROUP, grp); in dec_loop()
160 ret = mpi->control(ctx, MPP_DEC_SET_INFO_CHANGE_READY, NULL); in dec_loop()
373 ret = mpi->control(ctx, MPP_SET_DISABLE_THREAD, NULL); in dec_nt_decode()
384 ret = mpi->control(ctx, MPP_DEC_GET_CFG, cfg); in dec_nt_decode()
400 ret = mpi->control(ctx, MPP_DEC_SET_CFG, cfg); in dec_nt_decode()
H A Dmpi_dec_test.c146 ret = mpi->control(ctx, MPP_DEC_SET_FRAME_INFO, frm); in dec_simple()
157 ret = mpi->control(ctx, MPP_DEC_SET_EXT_BUF_GROUP, grp); in dec_simple()
168 ret = mpi->control(ctx, MPP_DEC_SET_INFO_CHANGE_READY, NULL); in dec_simple()
383 MPP_RET ret = mpi->control(ctx, MPP_DEC_SET_OUTPUT_FORMAT, &cmd->format); in thread_decode()
519 ret = mpi->control(ctx, MPP_DEC_GET_CFG, cfg); in dec_decode()
535 ret = mpi->control(ctx, MPP_DEC_SET_CFG, cfg); in dec_decode()
H A Dmpi_dec_multi_test.c158 ret = mpi->control(ctx, MPP_DEC_SET_FRAME_INFO, frm); in multi_dec_simple()
169 ret = mpi->control(ctx, MPP_DEC_SET_EXT_BUF_GROUP, grp); in multi_dec_simple()
180 ret = mpi->control(ctx, MPP_DEC_SET_INFO_CHANGE_READY, NULL); in multi_dec_simple()
482 ret = mpi->control(ctx, MPP_DEC_GET_CFG, cfg); in multi_dec_decode()
498 ret = mpi->control(ctx, MPP_DEC_SET_CFG, cfg); in multi_dec_decode()
/rockchip-linux_mpp/mpp/hal/common/av1/
H A Dhal_av1d_api_v2.c178 if (p_hal && p_hal->api && p_hal->api->control) in hal_av1d_control()
179 ret = p_hal->api->control(hal, cmd_type, param); in hal_av1d_control()
196 .control = hal_av1d_control,
/rockchip-linux_mpp/mpp/hal/rkdec/vp9d/
H A Dhal_vp9d_api.c157 if (p && p->api && p->api->control) in hal_vp9d_control()
158 ret = p->api->control(ctx, cmd, param); in hal_vp9d_control()
176 .control = hal_vp9d_control,
/rockchip-linux_mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_api.c172 if (p && p->api && p->api->control) in hal_h265d_control()
173 ret = p->api->control(ctx, cmd, param); in hal_h265d_control()
191 .control = hal_h265d_control,
/rockchip-linux_mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_api.c418 if (!p_hal || !p_hal->hal_api || !p_hal->hal_api->control) in hal_h264d_control()
421 return p_hal->hal_api->control(hal, cmd_type, param); in hal_h264d_control()
464 .control = hal_h264d_control,
/rockchip-linux_mpp/mpp/legacy/
H A Dvpu_api_legacy.cpp211 ret = mpi->control(mpp_ctx, MPP_ENC_SET_CFG, enc_cfg); in vpu_api_set_enc_cfg()
395 ret = mpi->control(mpp_ctx, MPP_DEC_SET_FRAME_INFO, (MppParam)frame_info); in init_frame_info()
439 ret = mpi->control(mpp_ctx, MPP_SET_INPUT_TIMEOUT, (MppParam)&block); in init()
444 ret = mpi->control(mpp_ctx, MPP_ENC_SET_SEI_CFG, &sei_mode); in init()
493 ret = mpi->control(mpp_ctx, MPP_ENC_GET_HDR_SYNC, enc_hdr_pkt); in init()
515 ret = mpi->control(mpp_ctx, MPP_DEC_SET_ENABLE_DEINTERLACE, &flag); in init()
1573 RK_S32 VpuApiLegacy::control(VpuCodecContext *ctx, VPU_API_CMD cmd, void *param) in control() function in VpuApiLegacy
1594 return mpi->control(mpp_ctx, MPP_ENC_GET_CFG, enc_cfg);; in control()
1665 mpi->control(mpp_ctx, MPP_DEC_SET_FRAME_INFO, (MppParam)frm_info); in control()
1695 ret = mpi->control(mpp_ctx, MPP_DEC_GET_CFG, cfg); in control()
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/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp_api.c27 ops->control = vdpp2_control; in rockchip_vdpp_api_alloc_ctx()
34 ops->control = vdpp_control; in rockchip_vdpp_api_alloc_ctx()
H A Dhwpq_vdpp_proc.c381 ret |= vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_DMSR_CFG, &params); in vdpp_set_user_cfg()
386 ret |= vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_ES, &params); in vdpp_set_user_cfg()
391 ret |= vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_DCI_HIST, &params); in vdpp_set_user_cfg()
401 ret |= vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_SHARP, &params); in vdpp_set_user_cfg()
416 return ctx->ops->control(ctx->priv, cmd, &img); in vdpp_set_img()
747 ret = vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_COM2_CFG, &params); in hwpq_vdpp_common_config()
758 ret = vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_COM_CFG, &params); in hwpq_vdpp_common_config()
784 if (NULL == vdpp || NULL == vdpp->ops || NULL == vdpp->ops->control) { in hwpq_vdpp_proc()
824 ret = vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_HIST_FD, &fdhist); in hwpq_vdpp_proc()
831 ret = vdpp->ops->control(vdpp->priv, VDPP_CMD_RUN_SYNC, NULL); in hwpq_vdpp_proc()
/rockchip-linux_mpp/mpp/codec/dec/vp8/
H A Dvp8d_api.c37 .control = vp8d_parser_control,
/rockchip-linux_mpp/mpp/codec/dec/m2v/
H A Dm2vd_api.c36 .control = m2vd_parser_control,
/rockchip-linux_mpp/kmpp/
H A Dkmpp.c320 ctx->mApi->control(ctx, MPP_ENC_SET_ROI_CFG, &roi_data0); in put_frame()
331 ctx->mApi->control(ctx, MPP_ENC_SET_OSD_DATA_CFG, osd_data3); in put_frame()
483 static MPP_RET control(Kmpp *ctx, MpiCmd cmd, MppParam param) in control() function
637 .control = control,
/rockchip-linux_mpp/mpp/codec/
H A Dmpp_parser.c208 if (!p->api->control) in mpp_parser_control()
211 return p->api->control(p->ctx, cmd, para); in mpp_parser_control()

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