1 /* SPDX-License-Identifier: Apache-2.0 OR MIT */
2 /*
3 * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
4 */
5
6 #include <stdio.h>
7 #include <stdlib.h>
8 #include <string.h>
9 #include <sys/mman.h>
10 #include <unistd.h>
11 #include <sys/syscall.h>
12
13 #include "mpp_mem.h"
14 #include "mpp_env.h"
15 #include "mpp_buffer.h"
16 #include "mpp_soc.h"
17
18 #include "vdpp_api.h"
19 #include "hwpq_vdpp_proc_api.h"
20 #include "hwpq_debug.h"
21
22 RK_U32 hwpq_vdpp_debug = 0;
23
24 #define HWPQ_VDPP_MAX_FILE_NAME_LEN (256)
25 #define HWPQ_VDPP_DEBUG_CFG_PROP "vendor.vdpp.debug_cfg"
26
27 static const char hwpq_vdpp_in_path[] = "/data/vendor/rkalgo/hwpq_vdpp_in.bin";
28 static const char hwpq_vdpp_out_path[] = "/data/vendor/rkalgo/hwpq_vdpp_out.bin";
29
30 typedef struct VdppCtxImpl_e {
31 vdpp_com_ctx* vdpp;
32
33 MppBufferGroup memGroup;
34 MppBuffer histbuf;
35 } VdppCtxImpl;
36
set_dmsr_default_config(struct vdpp_api_params * p_api_params)37 static void set_dmsr_default_config(struct vdpp_api_params* p_api_params)
38 {
39 p_api_params->ptype = VDPP_PARAM_TYPE_DMSR;
40 p_api_params->param.dmsr.enable = 1;
41 p_api_params->param.dmsr.str_pri_y = 10;
42 p_api_params->param.dmsr.str_sec_y = 4;
43 p_api_params->param.dmsr.dumping_y = 6;
44 p_api_params->param.dmsr.wgt_pri_gain_even_1 = 12;
45 p_api_params->param.dmsr.wgt_pri_gain_even_2 = 12;
46 p_api_params->param.dmsr.wgt_pri_gain_odd_1 = 8;
47 p_api_params->param.dmsr.wgt_pri_gain_odd_2 = 16;
48 p_api_params->param.dmsr.wgt_sec_gain = 5;
49 p_api_params->param.dmsr.blk_flat_th = 20;
50 p_api_params->param.dmsr.contrast_to_conf_map_x0 = 1680;
51 p_api_params->param.dmsr.contrast_to_conf_map_x1 = 6720;
52 p_api_params->param.dmsr.contrast_to_conf_map_y0 = 0;
53 p_api_params->param.dmsr.contrast_to_conf_map_y1 = 65535;
54 p_api_params->param.dmsr.diff_core_th0 = 1;
55 p_api_params->param.dmsr.diff_core_th1 = 5;
56 p_api_params->param.dmsr.diff_core_wgt0 = 16;
57 p_api_params->param.dmsr.diff_core_wgt1 = 16;
58 p_api_params->param.dmsr.diff_core_wgt2 = 16;
59 p_api_params->param.dmsr.edge_th_low_arr[0] = 30;
60 p_api_params->param.dmsr.edge_th_low_arr[1] = 10;
61 p_api_params->param.dmsr.edge_th_low_arr[2] = 0;
62 p_api_params->param.dmsr.edge_th_low_arr[3] = 0;
63 p_api_params->param.dmsr.edge_th_low_arr[4] = 0;
64 p_api_params->param.dmsr.edge_th_low_arr[5] = 0;
65 p_api_params->param.dmsr.edge_th_low_arr[6] = 0;
66 p_api_params->param.dmsr.edge_th_high_arr[0] = 60;
67 p_api_params->param.dmsr.edge_th_high_arr[1] = 40;
68 p_api_params->param.dmsr.edge_th_high_arr[2] = 20;
69 p_api_params->param.dmsr.edge_th_high_arr[3] = 10;
70 p_api_params->param.dmsr.edge_th_high_arr[4] = 10;
71 p_api_params->param.dmsr.edge_th_high_arr[5] = 10;
72 p_api_params->param.dmsr.edge_th_high_arr[6] = 10;
73 }
74
set_es_default_config(struct vdpp_api_params * p_api_params)75 static void set_es_default_config(struct vdpp_api_params* p_api_params)
76 {
77 static RK_S32 diff2conf_lut_x_tmp[9] = {
78 0, 1024, 2048, 3072, 4096, 6144, 8192, 12288, 65535,
79 };
80 static RK_S32 diff2conf_lut_y_tmp[9] = {
81 0, 84, 141, 179, 204, 233, 246, 253, 255,
82 };
83
84 p_api_params->ptype = VDPP_PARAM_TYPE_ES;
85 p_api_params->param.es.es_bEnabledES = 0;
86 p_api_params->param.es.es_iAngleDelta = 17;
87 p_api_params->param.es.es_iAngleDeltaExtra = 5;
88 p_api_params->param.es.es_iGradNoDirTh = 37;
89 p_api_params->param.es.es_iGradFlatTh = 75;
90 p_api_params->param.es.es_iWgtGain = 128;
91 p_api_params->param.es.es_iWgtDecay = 128;
92 p_api_params->param.es.es_iLowConfTh = 96;
93 p_api_params->param.es.es_iLowConfRatio = 32;
94 p_api_params->param.es.es_iConfCntTh = 4;
95 p_api_params->param.es.es_iWgtLocalTh = 64;
96 p_api_params->param.es.es_iK1 = 4096;
97 p_api_params->param.es.es_iK2 = 7168;
98 p_api_params->param.es.es_iDeltaLimit = 65280;
99 memcpy(&p_api_params->param.es.es_iDiff2conf_lut_x[0], &diff2conf_lut_x_tmp[0],
100 sizeof(diff2conf_lut_x_tmp));
101 memcpy(&p_api_params->param.es.es_iDiff2conf_lut_y[0], &diff2conf_lut_y_tmp[0],
102 sizeof(diff2conf_lut_y_tmp));
103 p_api_params->param.es.es_bEndpointCheckEnable = 1;
104 }
105
set_hist_cnt_default_config(struct vdpp_api_params * p_api_params)106 static void set_hist_cnt_default_config(struct vdpp_api_params* p_api_params)
107 {
108 p_api_params->ptype = VDPP_PARAM_TYPE_HIST;
109
110 p_api_params->param.hist.hist_cnt_en = 1;
111 p_api_params->param.hist.dci_hsd_mode = 0;
112 p_api_params->param.hist.dci_vsd_mode = 0;
113 p_api_params->param.hist.dci_yrgb_gather_num = 0;
114 p_api_params->param.hist.dci_yrgb_gather_en = 0;
115 }
116
set_shp_default_config(struct vdpp_api_params * p_api_params)117 static void set_shp_default_config(struct vdpp_api_params* p_api_params)
118 {
119 static RK_S32 coring_zero_tmp[7] = {
120 5, 5, 8, 5, 8, 5, 5,
121 };
122 static RK_S32 coring_thr_tmp[7] = {
123 40, 40, 40, 24, 26, 30, 26,
124 };
125 static RK_S32 coring_ratio_tmp[7] = {
126 1479, 1188, 1024, 1422, 1024, 1024, 1024,
127 };
128 static RK_S32 gain_pos_tmp[7] = {
129 128, 256, 512, 256, 512, 256, 256,
130 };
131 static RK_S32 gain_neg_tmp[7] = {
132 128, 256, 512, 256, 512, 256, 256,
133 };
134 static RK_S32 limit_ctrl_pos0_tmp[7] = {
135 64, 64, 64, 64, 64, 64, 64,
136 };
137 static RK_S32 limit_ctrl_pos1_tmp[7] = {
138 120, 120, 120, 120, 120, 120, 120,
139 };
140 static RK_S32 limit_ctrl_neg0_tmp[7] = {
141 64, 64, 64, 64, 64, 64, 64,
142 };
143 static RK_S32 limit_ctrl_neg1_tmp[7] = {
144 120, 120, 120, 120, 120, 120, 120,
145 };
146 static RK_S32 limit_ctrl_ratio_tmp[7] = {
147 128, 128, 128, 128, 128, 128, 128,
148 };
149 static RK_S32 limit_ctrl_bnd_pos_tmp[7] = {
150 81, 131, 63, 81, 63, 63, 63,
151 };
152 static RK_S32 limit_ctrl_bnd_neg_tmp[7] = {
153 81, 131, 63, 81, 63, 63, 63,
154 };
155 static RK_S32 lum_grd_tmp[6] = {
156 0, 200, 300, 860, 960, 102,
157 };
158 static RK_S32 lum_val_tmp[6] = {
159 64, 64, 64, 64, 64, 64,
160 };
161 static RK_S32 adp_grd_tmp[6] = {
162 0, 4, 60, 180, 300, 1023,
163 };
164 static RK_S32 adp_val_tmp[6] = {
165 64, 64, 64, 64, 64, 64,
166 };
167 static RK_S32 var_grd_tmp[6] = {
168 0, 39, 102, 209, 500, 1023,
169 };
170 static RK_S32 var_val_tmp[6] = {
171 64, 64, 64, 64, 64, 64,
172 };
173 static RK_S32 diag_adj_gain_tab_tmp[8] = {
174 6, 7, 8, 9, 10, 11, 12, 13,
175 };
176 static RK_S32 roll_tab_pattern0[16] = {
177 0, 0, 0, 1, 2, 3, 4, 6, 8, 10, 11, 12, 13, 14, 15, 15,
178 };
179 static RK_S32 roll_tab_pattern1[16] = {
180 31, 31, 30, 29, 28, 27, 25, 23, 21, 19, 18, 17, 16, 16, 15, 15,
181 };
182 static RK_S32 roll_tab_pattern2[16] = {
183 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
184 };
185 static RK_S32 tex_grd_tmp[6] = {
186 0, 128, 256, 400, 600, 1023,
187 };
188 static RK_S32 tex_val_tmp[6] = {
189 40, 60, 80, 100, 127, 127,
190 };
191
192 p_api_params->ptype = VDPP_PARAM_TYPE_SHARP;
193
194 p_api_params->param.sharp.sharp_enable = 1;
195 p_api_params->param.sharp.sharp_coloradj_bypass_en = 1;
196
197 p_api_params->param.sharp.lti_h_enable = 0;
198 p_api_params->param.sharp.lti_h_radius = 1;
199 p_api_params->param.sharp.lti_h_slope = 100;
200 p_api_params->param.sharp.lti_h_thresold = 21;
201 p_api_params->param.sharp.lti_h_gain = 8;
202 p_api_params->param.sharp.lti_h_noise_thr_pos = 1023;
203 p_api_params->param.sharp.lti_h_noise_thr_neg = 1023;
204
205 p_api_params->param.sharp.lti_v_enable = 0;
206 p_api_params->param.sharp.lti_v_radius = 1;
207 p_api_params->param.sharp.lti_v_slope = 100;
208 p_api_params->param.sharp.lti_v_thresold = 21;
209 p_api_params->param.sharp.lti_v_gain = 8;
210 p_api_params->param.sharp.lti_v_noise_thr_pos = 1023;
211 p_api_params->param.sharp.lti_v_noise_thr_neg = 1023;
212
213 p_api_params->param.sharp.cti_h_enable = 0;
214 p_api_params->param.sharp.cti_h_radius = 1;
215 p_api_params->param.sharp.cti_h_slope = 100;
216 p_api_params->param.sharp.cti_h_thresold = 21;
217 p_api_params->param.sharp.cti_h_gain = 8;
218 p_api_params->param.sharp.cti_h_noise_thr_pos = 1023;
219 p_api_params->param.sharp.cti_h_noise_thr_neg = 1023;
220
221 p_api_params->param.sharp.peaking_enable = 1;
222 p_api_params->param.sharp.peaking_gain = 196;
223
224 p_api_params->param.sharp.peaking_coring_enable = 1;
225 p_api_params->param.sharp.peaking_limit_ctrl_enable = 1;
226 p_api_params->param.sharp.peaking_gain_enable = 1;
227
228 memcpy(p_api_params->param.sharp.peaking_coring_zero, coring_zero_tmp,
229 sizeof(coring_zero_tmp));
230 memcpy(p_api_params->param.sharp.peaking_coring_thr, coring_thr_tmp,
231 sizeof(coring_thr_tmp));
232 memcpy(p_api_params->param.sharp.peaking_coring_ratio, coring_ratio_tmp,
233 sizeof(coring_ratio_tmp));
234 memcpy(p_api_params->param.sharp.peaking_gain_pos, gain_pos_tmp, sizeof(gain_pos_tmp));
235 memcpy(p_api_params->param.sharp.peaking_gain_neg, gain_neg_tmp, sizeof(gain_neg_tmp));
236 memcpy(p_api_params->param.sharp.peaking_limit_ctrl_pos0, limit_ctrl_pos0_tmp,
237 sizeof(limit_ctrl_pos0_tmp));
238 memcpy(p_api_params->param.sharp.peaking_limit_ctrl_pos1, limit_ctrl_pos1_tmp,
239 sizeof(limit_ctrl_pos1_tmp));
240 memcpy(p_api_params->param.sharp.peaking_limit_ctrl_neg0, limit_ctrl_neg0_tmp,
241 sizeof(limit_ctrl_neg0_tmp));
242 memcpy(p_api_params->param.sharp.peaking_limit_ctrl_neg1, limit_ctrl_neg1_tmp,
243 sizeof(limit_ctrl_neg1_tmp));
244 memcpy(p_api_params->param.sharp.peaking_limit_ctrl_ratio, limit_ctrl_ratio_tmp,
245 sizeof(limit_ctrl_ratio_tmp));
246 memcpy(p_api_params->param.sharp.peaking_limit_ctrl_bnd_pos, limit_ctrl_bnd_pos_tmp,
247 sizeof(limit_ctrl_bnd_pos_tmp));
248 memcpy(p_api_params->param.sharp.peaking_limit_ctrl_bnd_neg, limit_ctrl_bnd_neg_tmp,
249 sizeof(limit_ctrl_bnd_neg_tmp));
250
251 p_api_params->param.sharp.peaking_edge_ctrl_enable = 1;
252 p_api_params->param.sharp.peaking_edge_ctrl_non_dir_thr = 16;
253 p_api_params->param.sharp.peaking_edge_ctrl_dir_cmp_ratio = 4;
254 p_api_params->param.sharp.peaking_edge_ctrl_non_dir_wgt_offset = 64;
255 p_api_params->param.sharp.peaking_edge_ctrl_non_dir_wgt_ratio = 16;
256 p_api_params->param.sharp.peaking_edge_ctrl_dir_cnt_thr = 2;
257 p_api_params->param.sharp.peaking_edge_ctrl_dir_cnt_avg = 3;
258 p_api_params->param.sharp.peaking_edge_ctrl_dir_cnt_offset = 2;
259 p_api_params->param.sharp.peaking_edge_ctrl_diag_dir_thr = 16;
260
261 memcpy(p_api_params->param.sharp.peaking_edge_ctrl_diag_adj_gain_tab,
262 diag_adj_gain_tab_tmp, sizeof(diag_adj_gain_tab_tmp));
263
264 p_api_params->param.sharp.peaking_estc_enable = 1;
265 p_api_params->param.sharp.peaking_estc_delta_offset_h = 4;
266 p_api_params->param.sharp.peaking_estc_alpha_over_h = 8;
267 p_api_params->param.sharp.peaking_estc_alpha_under_h = 16;
268 p_api_params->param.sharp.peaking_estc_alpha_over_unlimit_h = 64;
269 p_api_params->param.sharp.peaking_estc_alpha_under_unlimit_h = 112;
270 p_api_params->param.sharp.peaking_estc_delta_offset_v = 4;
271 p_api_params->param.sharp.peaking_estc_alpha_over_v = 8;
272 p_api_params->param.sharp.peaking_estc_alpha_under_v = 16;
273 p_api_params->param.sharp.peaking_estc_alpha_over_unlimit_v = 64;
274 p_api_params->param.sharp.peaking_estc_alpha_under_unlimit_v = 112;
275 p_api_params->param.sharp.peaking_estc_delta_offset_d0 = 4;
276 p_api_params->param.sharp.peaking_estc_alpha_over_d0 = 16;
277 p_api_params->param.sharp.peaking_estc_alpha_under_d0 = 16;
278 p_api_params->param.sharp.peaking_estc_alpha_over_unlimit_d0 = 96;
279 p_api_params->param.sharp.peaking_estc_alpha_under_unlimit_d0 = 96;
280 p_api_params->param.sharp.peaking_estc_delta_offset_d1 = 4;
281 p_api_params->param.sharp.peaking_estc_alpha_over_d1 = 16;
282 p_api_params->param.sharp.peaking_estc_alpha_under_d1 = 16;
283 p_api_params->param.sharp.peaking_estc_alpha_over_unlimit_d1 = 96;
284 p_api_params->param.sharp.peaking_estc_alpha_under_unlimit_d1 = 96;
285 p_api_params->param.sharp.peaking_estc_delta_offset_non = 4;
286 p_api_params->param.sharp.peaking_estc_alpha_over_non = 8;
287 p_api_params->param.sharp.peaking_estc_alpha_under_non = 8;
288 p_api_params->param.sharp.peaking_estc_alpha_over_unlimit_non = 112;
289 p_api_params->param.sharp.peaking_estc_alpha_under_unlimit_non = 112;
290 p_api_params->param.sharp.peaking_filter_cfg_diag_enh_coef = 6;
291
292 p_api_params->param.sharp.peaking_filt_core_H0[0] = 4;
293 p_api_params->param.sharp.peaking_filt_core_H0[1] = 16;
294 p_api_params->param.sharp.peaking_filt_core_H0[2] = 24;
295 p_api_params->param.sharp.peaking_filt_core_H1[0] = -16;
296 p_api_params->param.sharp.peaking_filt_core_H1[1] = 0;
297 p_api_params->param.sharp.peaking_filt_core_H1[2] = 32;
298 p_api_params->param.sharp.peaking_filt_core_H2[0] = 0;
299 p_api_params->param.sharp.peaking_filt_core_H2[1] = -16;
300 p_api_params->param.sharp.peaking_filt_core_H2[2] = 32;
301 p_api_params->param.sharp.peaking_filt_core_V0[0] = 1;
302 p_api_params->param.sharp.peaking_filt_core_V0[1] = 4;
303 p_api_params->param.sharp.peaking_filt_core_V0[2] = 6;
304 p_api_params->param.sharp.peaking_filt_core_V1[0] = -4;
305 p_api_params->param.sharp.peaking_filt_core_V1[1] = 0;
306 p_api_params->param.sharp.peaking_filt_core_V1[2] = 8;
307 p_api_params->param.sharp.peaking_filt_core_V2[0] = 0;
308 p_api_params->param.sharp.peaking_filt_core_V2[1] = -4;
309 p_api_params->param.sharp.peaking_filt_core_V2[2] = 8;
310 p_api_params->param.sharp.peaking_filt_core_USM[0] = 1;
311 p_api_params->param.sharp.peaking_filt_core_USM[1] = 4;
312 p_api_params->param.sharp.peaking_filt_core_USM[2] = 6;
313
314 p_api_params->param.sharp.shootctrl_enable = 1;
315 p_api_params->param.sharp.shootctrl_filter_radius = 1;
316 p_api_params->param.sharp.shootctrl_delta_offset = 16;
317 p_api_params->param.sharp.shootctrl_alpha_over = 8;
318 p_api_params->param.sharp.shootctrl_alpha_under = 8;
319 p_api_params->param.sharp.shootctrl_alpha_over_unlimit = 112;
320 p_api_params->param.sharp.shootctrl_alpha_under_unlimit = 112;
321
322 p_api_params->param.sharp.global_gain_enable = 0;
323 p_api_params->param.sharp.global_gain_lum_mode = 0;
324
325 memcpy(p_api_params->param.sharp.global_gain_lum_grd, lum_grd_tmp, sizeof(lum_grd_tmp));
326 memcpy(p_api_params->param.sharp.global_gain_lum_val, lum_val_tmp, sizeof(lum_val_tmp));
327 memcpy(p_api_params->param.sharp.global_gain_adp_grd, adp_grd_tmp, sizeof(adp_grd_tmp));
328 memcpy(p_api_params->param.sharp.global_gain_adp_val, adp_val_tmp, sizeof(adp_val_tmp));
329 memcpy(p_api_params->param.sharp.global_gain_var_grd, var_grd_tmp, sizeof(var_grd_tmp));
330 memcpy(p_api_params->param.sharp.global_gain_var_val, var_val_tmp, sizeof(var_val_tmp));
331
332 p_api_params->param.sharp.color_ctrl_enable = 0;
333
334 p_api_params->param.sharp.color_ctrl_p0_scaling_coef = 1;
335 p_api_params->param.sharp.color_ctrl_p0_point_u = 115;
336 p_api_params->param.sharp.color_ctrl_p0_point_v = 155;
337 memcpy(p_api_params->param.sharp.color_ctrl_p0_roll_tab, roll_tab_pattern0,
338 sizeof(roll_tab_pattern0));
339 p_api_params->param.sharp.color_ctrl_p1_scaling_coef = 1;
340 p_api_params->param.sharp.color_ctrl_p1_point_u = 90;
341 p_api_params->param.sharp.color_ctrl_p1_point_v = 120;
342 memcpy(p_api_params->param.sharp.color_ctrl_p1_roll_tab, roll_tab_pattern1,
343 sizeof(roll_tab_pattern1));
344 p_api_params->param.sharp.color_ctrl_p2_scaling_coef = 1;
345 p_api_params->param.sharp.color_ctrl_p2_point_u = 128;
346 p_api_params->param.sharp.color_ctrl_p2_point_v = 128;
347 memcpy(p_api_params->param.sharp.color_ctrl_p2_roll_tab, roll_tab_pattern2,
348 sizeof(roll_tab_pattern2));
349 p_api_params->param.sharp.color_ctrl_p3_scaling_coef = 1;
350 p_api_params->param.sharp.color_ctrl_p3_point_u = 128;
351 p_api_params->param.sharp.color_ctrl_p3_point_v = 128;
352 memcpy(p_api_params->param.sharp.color_ctrl_p3_roll_tab, roll_tab_pattern2,
353 sizeof(roll_tab_pattern2));
354
355 p_api_params->param.sharp.tex_adj_enable = 0;
356 p_api_params->param.sharp.tex_adj_y_mode_select = 3;
357 p_api_params->param.sharp.tex_adj_mode_select = 0;
358
359 memcpy(p_api_params->param.sharp.tex_adj_grd, tex_grd_tmp, sizeof(tex_grd_tmp));
360 memcpy(p_api_params->param.sharp.tex_adj_val, tex_val_tmp, sizeof(tex_val_tmp));
361 }
362
vdpp_set_user_cfg(vdpp_com_ctx * vdpp,vdpp_params * p_vdpp_params,RK_U32 cfg_update_flag)363 static RK_S32 vdpp_set_user_cfg(vdpp_com_ctx* vdpp, vdpp_params* p_vdpp_params,
364 RK_U32 cfg_update_flag)
365 {
366 struct vdpp_api_params params;
367 RK_S32 ret = MPP_OK;
368
369 if (cfg_update_flag == 0) {
370 hwpq_vdpp_info("vdpp config not changed\n");
371 return ret;
372 }
373
374 hwpq_vdpp_info("update vdpp config\n");
375
376 set_dmsr_default_config(¶ms);
377 params.param.dmsr.enable = p_vdpp_params->dmsr_en;
378 params.param.dmsr.str_pri_y = p_vdpp_params->str_pri_y;
379 params.param.dmsr.str_sec_y = p_vdpp_params->str_sec_y;
380 params.param.dmsr.dumping_y = p_vdpp_params->dumping_y;
381 ret |= vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_DMSR_CFG, ¶ms);
382
383 set_es_default_config(¶ms);
384 params.param.es.es_bEnabledES = p_vdpp_params->es_en;
385 params.param.es.es_iWgtGain = p_vdpp_params->es_iWgtGain;
386 ret |= vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_ES, ¶ms);
387
388 set_hist_cnt_default_config(¶ms);
389 params.param.hist.hist_cnt_en = p_vdpp_params->hist_cnt_en;
390 params.param.hist.dci_csc_range = p_vdpp_params->hist_csc_range;
391 ret |= vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_DCI_HIST, ¶ms);
392
393 set_shp_default_config(¶ms);
394 params.param.sharp.sharp_enable = p_vdpp_params->shp_en;
395 params.param.sharp.peaking_gain = p_vdpp_params->peaking_gain;
396 params.param.sharp.shootctrl_enable = p_vdpp_params->shp_shoot_ctrl_en;
397 params.param.sharp.shootctrl_alpha_over = p_vdpp_params->shp_shoot_ctrl_over;
398 params.param.sharp.shootctrl_alpha_over_unlimit = p_vdpp_params->shp_shoot_ctrl_over;
399 params.param.sharp.shootctrl_alpha_under = p_vdpp_params->shp_shoot_ctrl_under;
400 params.param.sharp.shootctrl_alpha_under_unlimit = p_vdpp_params->shp_shoot_ctrl_under;
401 ret |= vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_SHARP, ¶ms);
402
403 return ret;
404 }
405
vdpp_set_img(vdpp_com_ctx * ctx,RK_S32 fd_yrgb,RK_S32 fd_cbcr,RK_S32 cbcr_offset,VdppCmd cmd)406 static MPP_RET vdpp_set_img(vdpp_com_ctx *ctx, RK_S32 fd_yrgb, RK_S32 fd_cbcr,
407 RK_S32 cbcr_offset, VdppCmd cmd)
408 {
409 VdppImg img;
410
411 hwpq_vdpp_info("yrgb_fd=%d, cbcr_fd=%d, cbcr_offset=%d\n", fd_yrgb, fd_cbcr, cbcr_offset);
412 img.mem_addr = fd_yrgb;
413 img.uv_addr = fd_cbcr;
414 img.uv_off = cbcr_offset;
415
416 return ctx->ops->control(ctx->priv, cmd, &img);
417 }
418
vdpp_map_buffer_with_fd(int fd,size_t bufSize)419 static void* vdpp_map_buffer_with_fd(int fd, size_t bufSize)
420 {
421 void* ptr = NULL;
422
423 if (fd > 0) {
424 ptr = mmap(NULL, bufSize, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
425 if (ptr == MAP_FAILED) {
426 mpp_err_f("failed to mmap buffer, fd=%d, size=%zu\n", fd, bufSize);
427 return NULL;
428 }
429 } else {
430 mpp_err_f("failed to mmap buffer with fd! invalid fd value %d input!\n", fd);
431 }
432
433 return ptr;
434 }
435
vdpp_unmap_buffer(void * ptr,size_t bufSize)436 static inline void vdpp_unmap_buffer(void* ptr, size_t bufSize)
437 {
438 if (ptr) {
439 munmap(ptr, bufSize);
440 }
441 }
442
try_env_file(const char * env,const char * path,pid_t tid,int index)443 static FILE *try_env_file(const char *env, const char *path, pid_t tid, int index)
444 {
445 const char *fname = NULL;
446 FILE *fp = NULL;
447 char name[HWPQ_VDPP_MAX_FILE_NAME_LEN];
448
449 mpp_env_get_str(env, &fname, path);
450 if (fname == path) {
451 snprintf(name, sizeof(name) - 1, "%s_%03d-%d", path, index, tid);
452 fname = name;
453 }
454
455 fp = fopen(fname, "w+b");
456 hwpq_vdpp_info("open %s %p for dump\n", fname, fp);
457
458 return fp;
459 }
460
vdpp_dump(rk_vdpp_proc_params * p_proc_param,int index)461 static void vdpp_dump(rk_vdpp_proc_params *p_proc_param, int index)
462 {
463 FILE *fp_in = NULL;
464 FILE *fp_out = NULL;
465 pid_t tid = syscall(SYS_gettid);
466
467 if (NULL == p_proc_param) {
468 mpp_err_f("found NULL proc_param %p\n", p_proc_param);
469 return;
470 }
471
472 if (hwpq_vdpp_debug & HWPQ_VDPP_DUMP_IN) {
473 fp_in = try_env_file("hwpq_vdpp_dump_in", hwpq_vdpp_in_path, tid, index);
474 if (NULL == fp_in) {
475 mpp_err_f("failed to open file %p\n", fp_in);
476 } else {
477 int fd = p_proc_param->src_img_info.img_yrgb.fd;
478 RK_U32 src_y_buf_len = p_proc_param->src_img_info.img_yrgb.w_vir *
479 p_proc_param->src_img_info.img_yrgb.h_vir;
480 RK_U8 *ptr = (RK_U8*)vdpp_map_buffer_with_fd(fd, src_y_buf_len);
481
482 if (ptr == NULL) {
483 mpp_err_f("vdpp dump fd(%d) map error!\n", fd);
484 } else {
485 fwrite(ptr, 1, src_y_buf_len, fp_in);
486 fclose(fp_in);
487 }
488
489 vdpp_unmap_buffer(ptr, src_y_buf_len);
490 }
491 }
492
493 if (hwpq_vdpp_debug & HWPQ_VDPP_DUMP_OUT) {
494 fp_out = try_env_file("hwpq_vdpp_dump_out", hwpq_vdpp_out_path, tid, index);
495 if (NULL == fp_out) {
496 mpp_err_f("failed to open file %p\n", fp_out);
497 } else {
498 int fd = p_proc_param->src_img_info.img_yrgb.fd;
499 RK_U32 dst_y_buf_len = p_proc_param->dst_img_info.img_yrgb.w_vir *
500 p_proc_param->dst_img_info.img_yrgb.h_vir;
501 RK_U8 *ptr = (RK_U8*)vdpp_map_buffer_with_fd(fd, dst_y_buf_len);
502
503 if (ptr == NULL) {
504 mpp_err_f("vdpp dump fd(%d) map error!\n", fd);
505 } else {
506 fwrite(ptr, 1, dst_y_buf_len, fp_out);
507 fclose(fp_out);
508 }
509
510 vdpp_unmap_buffer(ptr, dst_y_buf_len);
511 }
512 }
513
514 MPP_FCLOSE(fp_in);
515 MPP_FCLOSE(fp_out);
516 }
517
img_format_convert(vdpp_frame_format img_fmt_in)518 static MppFrameFormat img_format_convert(vdpp_frame_format img_fmt_in)
519 {
520 MppFrameFormat img_fmt_out = MPP_FMT_YUV420SP;
521
522 switch (img_fmt_in) {
523 case VDPP_FMT_NV24:
524 img_fmt_out = MPP_FMT_YUV444SP;
525 break;
526 case VDPP_FMT_NV16:
527 img_fmt_out = MPP_FMT_YUV422SP;
528 break;
529 case VDPP_FMT_NV12:
530 img_fmt_out = MPP_FMT_YUV420SP;
531 break;
532 case VDPP_FMT_NV15:
533 img_fmt_out = MPP_FMT_YUV420SP_10BIT;
534 break;
535 case VDPP_FMT_NV20:
536 img_fmt_out = MPP_FMT_YUV420SP_10BIT;
537 break;
538 case VDPP_FMT_NV30:
539 img_fmt_out = MPP_FMT_YUV420SP_10BIT;
540 break;
541
542 case VDPP_FMT_RGBA:
543 img_fmt_out = MPP_FMT_RGBA8888;
544 break;
545 case VDPP_FMT_RG24:
546 img_fmt_out = MPP_FMT_RGB888;
547 break;
548 case VDPP_FMT_BG24:
549 img_fmt_out = MPP_FMT_BGR888;
550 break;
551
552 default:
553 mpp_err_f("unsupport input format(%x), set NV12!", img_fmt_in);
554 break;
555 }
556
557 return img_fmt_out;
558 }
559
get_img_format_swap(vdpp_frame_format img_fmt_in)560 static enum VDPP_YUV_SWAP get_img_format_swap(vdpp_frame_format img_fmt_in)
561 {
562 enum VDPP_YUV_SWAP img_fmt_swap = VDPP_YUV_SWAP_SP_UV;
563
564 switch (img_fmt_in) {
565 case VDPP_FMT_NV24_VU:
566 case VDPP_FMT_NV16_VU:
567 case VDPP_FMT_NV12_VU:
568 img_fmt_swap = VDPP_YUV_SWAP_SP_VU;
569 break;
570
571 default:
572 img_fmt_swap = VDPP_YUV_SWAP_SP_UV;
573 break;
574 }
575
576 return img_fmt_swap;
577 }
578
hwpq_vdpp_deinit(rk_vdpp_context ctx)579 int hwpq_vdpp_deinit(rk_vdpp_context ctx)
580 {
581 VdppCtxImpl *p = (VdppCtxImpl*)ctx;
582 vdpp_com_ctx* vdpp = NULL;
583 MPP_RET ret = MPP_NOK;
584
585 hwpq_vdpp_enter();
586
587 if (NULL == ctx) {
588 mpp_err_f("found NULL input ctx %p\n", ctx);
589 ret = MPP_ERR_NULL_PTR;
590 goto __RET;
591 }
592
593 vdpp = p->vdpp;
594 if (NULL == vdpp || NULL == vdpp->ops) {
595 mpp_err_f("found NULL vdpp\n");
596 ret = MPP_ERR_NULL_PTR;
597 goto __RET;
598 }
599
600 if (vdpp->ops->deinit) {
601 ret = vdpp->ops->deinit(vdpp->priv);
602 if (ret) {
603 mpp_err_f("vdpp deinit failed! ret %d\n", ret);
604 }
605 }
606
607 if (p->histbuf) {
608 mpp_buffer_put(p->histbuf);
609 p->histbuf = NULL;
610 }
611
612 if (p->memGroup) {
613 mpp_buffer_group_put(p->memGroup);
614 p->memGroup = NULL;
615 }
616
617 rockchip_vdpp_api_release_ctx(vdpp);
618 MPP_FREE(p);
619 hwpq_vdpp_leave();
620
621 __RET:
622 return ret;
623 }
624
hwpq_vdpp_init(rk_vdpp_context * p_ctx_ptr)625 int hwpq_vdpp_init(rk_vdpp_context *p_ctx_ptr)
626 {
627 VdppCtxImpl *p = NULL;
628 vdpp_com_ctx *vdpp = NULL;
629 MppBufferGroup memGroup = NULL;
630 MppBuffer histbuf = NULL;
631 MPP_RET ret = MPP_NOK;
632
633 hwpq_vdpp_enter();
634
635 if (NULL == p_ctx_ptr) {
636 mpp_err("found NULL vdpp ctx pointer\n");
637 ret = MPP_ERR_NULL_PTR;
638 goto __ERR;
639 }
640 /* alloc vdpp ctx impl */
641 p = mpp_malloc(VdppCtxImpl, 1);
642 if (NULL == p) {
643 mpp_err("alloc vdpp ctx failed!");
644 ret = MPP_ERR_MALLOC;
645 goto __ERR;
646 }
647 /* alloc vdpp */
648 vdpp = rockchip_vdpp_api_alloc_ctx();
649 if (NULL == vdpp || NULL == vdpp->ops) {
650 mpp_err("alloc vdpp ctx failed!");
651 ret = MPP_ERR_MALLOC;
652 goto __ERR;
653 }
654 /* alloc buffer group */
655 ret = mpp_buffer_group_get_internal(&memGroup, MPP_BUFFER_TYPE_DRM);
656 if (ret) {
657 mpp_err("memGroup mpp_buffer_group_get failed\n");
658 ret = MPP_NOK;
659 goto __ERR;
660 }
661
662 mpp_buffer_get(memGroup, &histbuf, VDPP_HIST_LENGTH);
663 if (ret) {
664 mpp_err("alloc histbuf failed\n");
665 ret = MPP_NOK;
666 goto __ERR;
667 }
668
669 /* setup env prop */
670 mpp_env_get_u32(HWPQ_VDPP_DEBUG_CFG_PROP, &hwpq_vdpp_debug, 0);
671
672 if (vdpp->ops->init) {
673 ret = vdpp->ops->init(&vdpp->priv);
674 if (ret) {
675 mpp_err_f("vdpp init failed! ret %d\n", ret);
676 goto __ERR;
677 }
678 }
679
680 p->vdpp = vdpp;
681 p->memGroup = memGroup;
682 p->histbuf = histbuf;
683 *p_ctx_ptr = (rk_vdpp_context)p;
684
685 hwpq_vdpp_leave();
686 return ret;
687
688 __ERR:
689 if (histbuf) {
690 mpp_buffer_put(histbuf);
691 histbuf = NULL;
692 }
693
694 if (memGroup) {
695 mpp_buffer_group_put(memGroup);
696 memGroup = NULL;
697 }
698
699 rockchip_vdpp_api_release_ctx(vdpp);
700 MPP_FREE(p);
701
702 return ret;
703 }
704
hwpq_vdpp_common_config(vdpp_com_ctx * vdpp,rk_vdpp_proc_params * p_proc_param)705 static MPP_RET hwpq_vdpp_common_config(vdpp_com_ctx *vdpp, rk_vdpp_proc_params *p_proc_param)
706 {
707 struct vdpp_api_params params;
708 RK_U32 is_vdpp2 = (mpp_get_soc_type() == ROCKCHIP_SOC_RK3576);
709 RK_U32 yuv_out_diff;
710 MPP_RET ret = MPP_NOK;
711
712 yuv_out_diff = (p_proc_param->yuv_diff_flag && is_vdpp2);
713 hwpq_vdpp_info("is_vdpp2: %d, yuv_diff: %d\n", is_vdpp2, yuv_out_diff);
714
715 if (is_vdpp2) {
716 RK_U32 hist_mode_en = p_proc_param->hist_mode_en;
717
718 params.ptype = VDPP_PARAM_TYPE_COM2;
719 memset(¶ms.param, 0, sizeof(union vdpp_api_content));
720 params.param.com2.sfmt = img_format_convert(p_proc_param->src_img_info.img_fmt);
721 params.param.com2.src_width = p_proc_param->src_img_info.img_yrgb.w_vld;
722 params.param.com2.src_height = p_proc_param->src_img_info.img_yrgb.h_vld;
723 params.param.com2.src_width_vir = p_proc_param->src_img_info.img_yrgb.w_vir;
724 params.param.com2.src_height_vir = p_proc_param->src_img_info.img_yrgb.h_vir;
725 params.param.com2.sswap = get_img_format_swap(p_proc_param->src_img_info.img_fmt);
726 params.param.com2.dfmt = VDPP_FMT_YUV444; // TODO
727 params.param.com2.dst_width = p_proc_param->dst_img_info.img_yrgb.w_vld;
728 params.param.com2.dst_height = p_proc_param->dst_img_info.img_yrgb.h_vld;
729 params.param.com2.dst_width_vir = p_proc_param->dst_img_info.img_yrgb.w_vir;
730 params.param.com2.dst_height_vir = p_proc_param->dst_img_info.img_yrgb.h_vir;
731 if (yuv_out_diff) {
732 params.param.com2.yuv_out_diff = yuv_out_diff;
733 params.param.com2.dst_c_width = p_proc_param->dst_img_info.img_cbcr.w_vld;
734 params.param.com2.dst_c_height = p_proc_param->dst_img_info.img_cbcr.h_vld;
735 params.param.com2.dst_c_width_vir = p_proc_param->dst_img_info.img_cbcr.w_vir;
736 params.param.com2.dst_c_height_vir = p_proc_param->dst_img_info.img_cbcr.h_vir;
737 }
738 params.param.com2.dswap = get_img_format_swap(p_proc_param->dst_img_info.img_fmt);
739 params.param.com2.hist_mode_en = hist_mode_en;
740 hwpq_vdpp_info("hist_mode: %d\n", params.param.com2.hist_mode_en);
741 hwpq_vdpp_info("src-fmt: %d\n", p_proc_param->src_img_info.img_fmt);
742 hwpq_vdpp_info("dst-fmt: %d\n", p_proc_param->dst_img_info.img_fmt);
743 hwpq_vdpp_info("src-res: %d-%d %d-%d\n", params.param.com2.src_width, params.param.com2.src_height,
744 params.param.com2.src_width_vir, params.param.com2.src_height_vir);
745 hwpq_vdpp_info("dst-res: %d-%d %d-%d\n", params.param.com2.dst_width, params.param.com2.dst_height,
746 params.param.com2.dst_width_vir, params.param.com2.dst_height_vir);
747 ret = vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_COM2_CFG, ¶ms);
748 } else {
749 params.ptype = VDPP_PARAM_TYPE_COM;
750 memset(¶ms.param, 0, sizeof(union vdpp_api_content));
751 params.param.com.src_width = p_proc_param->src_img_info.img_yrgb.w_vld;
752 params.param.com.src_height = p_proc_param->src_img_info.img_yrgb.h_vld;
753 params.param.com.sswap = get_img_format_swap(p_proc_param->src_img_info.img_fmt);
754 params.param.com.dfmt = VDPP_FMT_YUV444; // TODO
755 params.param.com.dst_width = p_proc_param->dst_img_info.img_yrgb.w_vld;
756 params.param.com.dst_height = p_proc_param->dst_img_info.img_yrgb.h_vld;
757 params.param.com.dswap = get_img_format_swap(p_proc_param->dst_img_info.img_fmt);
758 ret = vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_COM_CFG, ¶ms);
759 }
760
761 return ret;
762 }
763
hwpq_vdpp_proc(rk_vdpp_context ctx,rk_vdpp_proc_params * p_proc_param)764 int hwpq_vdpp_proc(rk_vdpp_context ctx, rk_vdpp_proc_params *p_proc_param)
765 {
766 VdppCtxImpl *p = (VdppCtxImpl*)ctx;
767 vdpp_com_ctx* vdpp = NULL;
768 RK_U32 is_vdpp2 = (mpp_get_soc_type() == ROCKCHIP_SOC_RK3576);
769 MppBuffer histbuf = NULL;
770 MppBufferGroup memGroup = NULL;
771 RK_S32 ret = MPP_OK;
772 void* phist;
773 RK_S32 fdhist;
774 static int frame_idx = 0;
775
776 hwpq_vdpp_enter();
777
778 if (NULL == ctx || NULL == p_proc_param) {
779 mpp_err_f("found NULL input ctx %p proc_param %p\n", ctx, p_proc_param);
780 return MPP_ERR_NULL_PTR;
781 }
782
783 vdpp = p->vdpp;
784 if (NULL == vdpp || NULL == vdpp->ops || NULL == vdpp->ops->control) {
785 mpp_err_f("found NULL vdpp or vdpp ops\n");
786 return MPP_ERR_NULL_PTR;
787 }
788
789 memGroup = p->memGroup;
790 histbuf = p->histbuf;
791 if (NULL == memGroup || NULL == histbuf) {
792 mpp_err_f("found NULL memGroup %p or histbuf %p\n", memGroup, histbuf);
793 return MPP_ERR_NULL_PTR;
794 }
795
796 mpp_env_get_u32(HWPQ_VDPP_DEBUG_CFG_PROP, &hwpq_vdpp_debug, 0);
797
798 hwpq_vdpp_info("proc frame_idx %d\n", p_proc_param->frame_idx);
799
800 hwpq_vdpp_info("begin set image info\n");
801 hwpq_vdpp_info("set src img_info\n");
802 ret |= vdpp_set_img(vdpp, p_proc_param->src_img_info.img_yrgb.fd, p_proc_param->src_img_info.img_cbcr.fd,
803 p_proc_param->src_img_info.img_cbcr.offset, VDPP_CMD_SET_SRC);
804 hwpq_vdpp_info("set dst img_info\n");
805 ret |= vdpp_set_img(vdpp, p_proc_param->dst_img_info.img_yrgb.fd, p_proc_param->dst_img_info.img_cbcr.fd,
806 p_proc_param->dst_img_info.img_cbcr.offset, VDPP_CMD_SET_DST);
807 ret |= vdpp_set_img(vdpp, p_proc_param->dst_img_info.img_yrgb.fd, p_proc_param->dst_img_info.img_cbcr.fd,
808 p_proc_param->dst_img_info.img_cbcr.offset, VDPP_CMD_SET_DST_C);
809
810 ret |= hwpq_vdpp_common_config(vdpp, p_proc_param);
811 if (ret) {
812 mpp_err("vdpp common config failed\n");
813 return MPP_NOK;
814 }
815
816 /* set params */
817 if (vdpp_set_user_cfg(vdpp, &p_proc_param->vdpp_config, p_proc_param->vdpp_config_update_flag))
818 mpp_err_f("warning: set user cfg failed");
819
820 phist = mpp_buffer_get_ptr(histbuf);
821 fdhist = mpp_buffer_get_fd(histbuf);
822
823 if (is_vdpp2) {
824 ret = vdpp->ops->control(vdpp->priv, VDPP_CMD_SET_HIST_FD, &fdhist);
825 if (ret) {
826 mpp_err("set hist fd failed\n");
827 return MPP_NOK;
828 }
829 }
830
831 ret = vdpp->ops->control(vdpp->priv, VDPP_CMD_RUN_SYNC, NULL);
832 if (ret) {
833 mpp_err("run vdpp failed\n");
834 return MPP_NOK;
835 }
836
837 vdpp_dump(p_proc_param, frame_idx);
838
839 frame_idx++;
840
841 if (is_vdpp2) {
842 memcpy(p_proc_param->p_hist_buf, phist, VDPP_HIST_LENGTH);
843 }
844
845 p_proc_param->dci_vdpp_info.p_hist_addr = p_proc_param->p_hist_buf;
846 p_proc_param->dci_vdpp_info.hist_length = VDPP_HIST_LENGTH;
847 p_proc_param->dci_vdpp_info.vdpp_img_w_in = p_proc_param->src_img_info.img_yrgb.w_vld;
848 p_proc_param->dci_vdpp_info.vdpp_img_h_in = p_proc_param->src_img_info.img_yrgb.h_vld;
849 p_proc_param->dci_vdpp_info.vdpp_img_w_out = p_proc_param->dst_img_info.img_yrgb.w_vld;
850 p_proc_param->dci_vdpp_info.vdpp_img_h_out = p_proc_param->dst_img_info.img_yrgb.h_vld;
851
852 p_proc_param->dci_vdpp_info.vdpp_blk_size_h = p_proc_param->src_img_info.img_yrgb.w_vld / 16;
853 p_proc_param->dci_vdpp_info.vdpp_blk_size_v = p_proc_param->src_img_info.img_yrgb.h_vld / 16;
854
855 hwpq_vdpp_leave();
856
857 return MPP_OK;
858 }
859
hwpq_vdpp_check_work_mode(rk_vdpp_context ctx,rk_vdpp_proc_params * p_proc_param)860 int hwpq_vdpp_check_work_mode(rk_vdpp_context ctx, rk_vdpp_proc_params *p_proc_param)
861 {
862 RK_S32 cap_mode = VDPP_CAP_UNSUPPORTED;
863 VdppCtxImpl *p = (VdppCtxImpl*)ctx;
864 vdpp_com_ctx* vdpp = NULL;
865 int run_mode = VDPP_RUN_MODE_UNSUPPORTED;
866 MPP_RET ret = MPP_NOK;
867
868 if (NULL == ctx || NULL == p_proc_param) {
869 mpp_err_f("found NULL vdpp %p proc_param %p", ctx, p_proc_param);
870 return VDPP_RUN_MODE_UNSUPPORTED;
871 }
872
873 vdpp = p->vdpp;
874 if (NULL == vdpp || NULL == vdpp->ops) {
875 mpp_err_f("found NULL vdpp or ops");
876 return VDPP_RUN_MODE_UNSUPPORTED;
877 }
878
879 ret = hwpq_vdpp_common_config(vdpp, p_proc_param);
880 if (ret) {
881 mpp_err("vdpp common config failed\n");
882 return VDPP_RUN_MODE_UNSUPPORTED;
883 }
884
885 if (vdpp->ops->check_cap)
886 cap_mode = vdpp->ops->check_cap(vdpp->priv);
887
888 hwpq_vdpp_info("vdpp cap_mode %d", cap_mode);
889 /* vep first */
890 if (VDPP_CAP_VEP & cap_mode)
891 run_mode = VDPP_RUN_MODE_VEP;
892 else if (VDPP_CAP_HIST & cap_mode)
893 run_mode = VDPP_RUN_MODE_HIST;
894
895 return run_mode;
896 }
897