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Searched refs:vdd (Results 1 – 25 of 77) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dsoc.c355 int vdd; in get_core_volt_from_fuse() local
370 vdd = -EINVAL; in get_core_volt_from_fuse()
374 vdd = 900; in get_core_volt_from_fuse()
377 vdd = 1000; in get_core_volt_from_fuse()
380 vdd = -EINVAL; in get_core_volt_from_fuse()
384 debug("%s: The required minimum volt of CORE is %dmV\n", __func__, vdd); in get_core_volt_from_fuse()
386 return vdd; in get_core_volt_from_fuse()
389 __weak int board_switch_core_volt(u32 vdd) in board_switch_core_volt() argument
394 static int setup_core_volt(u32 vdd) in setup_core_volt() argument
396 return board_setup_core_volt(vdd); in setup_core_volt()
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/rk3399_rockchip-uboot/board/freescale/common/
H A Dvid.c184 static int wait_for_new_voltage(int vdd, int i2caddress) in wait_for_new_voltage() argument
199 abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) && in wait_for_new_voltage()
216 int timeout, vdd_current, vdd; in wait_for_voltage_stable() local
218 vdd = read_voltage(i2caddress); in wait_for_voltage_stable()
227 abs(vdd - vdd_current) > ADC_MIN_ACCURACY && in wait_for_voltage_stable()
229 vdd = vdd_current; in wait_for_voltage_stable()
240 static int set_voltage_to_IR(int i2caddress, int vdd) in set_voltage_to_IR() argument
249 vdd += board_vdd_drop_compensation(); in set_voltage_to_IR()
251 vid = DIV_ROUND_UP(vdd - 265, 5); in set_voltage_to_IR()
253 vid = DIV_ROUND_UP(vdd - 245, 5); in set_voltage_to_IR()
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/rk3399_rockchip-uboot/doc/device-tree-bindings/adc/
H A Dadc.txt10 - vdd-polarity-negative: positive reference Voltage has a negative polarity
16 - vdd-supply: phandle to Vdd regulator's node
20 - vdd-microvolts: positive reference Voltage value [uV]
28 vdd-microvolts = <1800000>;
57 vdd-supply = <&buck2>;
/rk3399_rockchip-uboot/doc/device-tree-bindings/video/
H A Dtegra20-dc.txt36 - nvidia,backlight-vdd-gpios: backlight power GPIO
37 - nvidia,panel-vdd-gpios: panel power GPIO
82 nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
83 nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dsun6i-a31s-primo81.dts185 regulator-name = "vdd-cpus"; /* This is an educated guess */
198 regulator-name = "vdd-gpu";
205 regulator-name = "vdd-cpu";
212 regulator-name = "vdd-sys-dll";
237 regulator-name = "vdd-mipi-bridge";
242 vdd-mipi-bridge-supply = <&reg_eldo3>;
H A Dstm32mp157a-dk1-u-boot.dtsi38 vdd-supply = <&vdd>;
39 vdda-supply = <&vdd>;
H A Dsun6i-a31s-sina31s-core.dtsi99 regulator-name = "vdd-cpus";
112 regulator-name = "vdd-gpu";
119 regulator-name = "vdd-cpu";
126 regulator-name = "vdd-sys-dll";
H A Dsun6i-reference-design-tablet.dtsi124 regulator-name = "vdd-cpus"; /* This is an educated guess */
137 regulator-name = "vdd-gpu";
144 regulator-name = "vdd-cpu";
151 regulator-name = "vdd-sys-dll";
H A Dsun6i-a31s-yones-toptech-bs1078-v2.dts143 regulator-name = "vdd-cpus";
156 regulator-name = "vdd-gpu";
163 regulator-name = "vdd-cpu";
170 regulator-name = "vdd-sys-dll";
H A Dstm32mp157a-dk1.dts126 vdd: buck3 { label
127 regulator-name = "vdd";
237 pwr-supply = <&vdd>;
292 vdda-supply = <&vdd>;
H A Dsunxi-itead-core-common.dtsi97 regulator-name = "vdd-cpu";
104 regulator-name = "vdd-int-dll";
108 regulator-name = "vdd-rtc";
H A Dsun8i-a33-olinuxino.dts142 regulator-name = "vdd-dll";
160 regulator-name = "vdd-cpus";
174 regulator-name = "vdd-sys";
181 regulator-name = "vdd-cpu";
H A Dsun8i-a33-sinlinx-sina33.dts161 regulator-name = "vdd-dll";
175 regulator-name = "vdd-cpus";
189 regulator-name = "vdd-sys";
196 regulator-name = "vdd-cpu";
H A Dsun9i-a80-cx-a99.dts122 reg_vdd_cpub: regulator-vdd-cpub {
128 regulator-name = "vdd-cpub";
275 regulator-name = "vdd-cpus";
322 regulator-name = "vdd-cpua";
335 regulator-name = "vdd-gpu";
342 regulator-name = "vdd-sys";
H A Dsun8i-reference-design-tablet.dtsi154 regulator-name = "vdd-dll";
172 regulator-name = "vdd-cpus";
186 regulator-name = "vdd-sys";
193 regulator-name = "vdd-cpu";
H A Dsun6i-a31-m9.dts169 regulator-name = "vdd-cpus"; /* This is an educated guess */
182 regulator-name = "vdd-gpu";
189 regulator-name = "vdd-cpu";
196 regulator-name = "vdd-sys-dll";
H A Dsun6i-a31-hummingbird.dts206 regulator-name = "vdd-cpus";
219 regulator-name = "vdd-gpu";
226 regulator-name = "vdd-cpu";
233 regulator-name = "vdd-sys-dll";
H A Dsun6i-a31-mele-a1000g-quad.dts169 regulator-name = "vdd-cpus"; /* This is an educated guess */
182 regulator-name = "vdd-gpu";
189 regulator-name = "vdd-cpu";
196 regulator-name = "vdd-sys-dll";
H A Dsun7i-a20-icnova-swac.dts130 regulator-name = "vdd-cpu";
137 regulator-name = "vdd-int-dll";
141 regulator-name = "vdd-rtc";
H A Dsun5i-q8-common.dtsi136 regulator-name = "vdd-cpu";
143 regulator-name = "vdd-int-pll";
147 regulator-name = "vdd-rtc";
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A Dfsl_mpc83xx_serdes.h21 extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
/rk3399_rockchip-uboot/board/freescale/ls1046ardb/
H A Dls1046ardb.c100 int board_setup_core_volt(u32 vdd) in board_setup_core_volt() argument
104 en_0v9 = (vdd == 900) ? true : false; in board_setup_core_volt()
/rk3399_rockchip-uboot/board/freescale/t4qds/
H A Dt4240qds.c217 static const uint16_t vdd[32] = { in adjust_vdd() local
265 vdd_target = vdd[vid]; in adjust_vdd()
723 int vdd, rcwsrc; in board_detail() local
733 vdd = read_voltage(); in board_detail()
734 if (vdd > 0) in board_detail()
735 printf("Core voltage= %d mV\n", vdd); in board_detail()
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc83xx/
H A Dserdes.c46 void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd) in fsl_setup_serdes() argument
52 if (vdd) { in fsl_setup_serdes()
/rk3399_rockchip-uboot/board/freescale/ls1088a/
H A Dls1088a.c438 int board_adjust_vdd(int vdd) in board_adjust_vdd() argument
442 debug("%s: vdd = %d\n", __func__, vdd); in board_adjust_vdd()
445 if (vdd == 900) { in board_adjust_vdd()
446 ret = setup_serdes_volt(vdd); in board_adjust_vdd()

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