| /rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/ |
| H A D | xor.c | 30 u32 reg, ui, base, cs_count; in mv_sys_xor_init() local 33 for (ui = 0; ui < MAX_CS; ui++) in mv_sys_xor_init() 34 ui_xor_regs_base_backup[ui] = in mv_sys_xor_init() 35 reg_read(XOR_BASE_ADDR_REG(0, ui)); in mv_sys_xor_init() 36 for (ui = 0; ui < MAX_CS; ui++) in mv_sys_xor_init() 37 ui_xor_regs_mask_backup[ui] = in mv_sys_xor_init() 38 reg_read(XOR_SIZE_MASK_REG(0, ui)); in mv_sys_xor_init() 41 for (ui = 0; ui < (num_of_cs); ui++) { in mv_sys_xor_init() 43 reg |= (0x1 << (ui)); in mv_sys_xor_init() 45 reg |= (0x3 << ((ui * 2) + 16)); in mv_sys_xor_init() [all …]
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| H A D | ddr3_init.c | 182 u32 ui; in ddr3_restore_and_set_final_windows() local 188 for (ui = 0; ui < num_of_win_regs; ui++) in ddr3_restore_and_set_final_windows() 189 reg_write((win_ctrl_reg + 0x4 * ui), win[ui]); in ddr3_restore_and_set_final_windows() 214 u32 reg, tmp_count, cs, ui; in ddr3_save_and_set_training_windows() local 239 for (ui = 0; ui < num_of_win_regs; ui++) in ddr3_save_and_set_training_windows() 240 win[ui] = reg_read(win_ctrl_reg + 0x4 * ui); in ddr3_save_and_set_training_windows()
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| H A D | ddr3_debug.c | 1424 u32 ui, uj; in print_topology() local 1430 for (ui = 0; ui < MAX_INTERFACE_NUM; ui++) { in print_topology() 1431 VALIDATE_ACTIVE(topology_db->if_act_mask, ui); in print_topology() 1432 printf("\n\tInterface ID: %d\n", ui); in print_topology() 1435 interface_params[ui].memory_freq)); in print_topology() 1437 topology_db->interface_params[ui].speed_bin_index); in print_topology() 1439 (4 << topology_db->interface_params[ui].bus_width)); in print_topology() 1442 interface_params[ui].memory_size)); in print_topology() 1444 topology_db->interface_params[ui].cas_wl); in print_topology() 1446 topology_db->interface_params[ui].cas_l); in print_topology() [all …]
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| /rk3399_rockchip-uboot/drivers/ddr/marvell/axp/ |
| H A D | xor.c | 26 u32 reg, ui, base, cs_count; in mv_sys_xor_init() local 29 for (ui = 0; ui < MAX_CS; ui++) in mv_sys_xor_init() 30 xor_regs_base_backup[ui] = reg_read(XOR_BASE_ADDR_REG(0, ui)); in mv_sys_xor_init() 31 for (ui = 0; ui < MAX_CS; ui++) in mv_sys_xor_init() 32 xor_regs_mask_backup[ui] = reg_read(XOR_SIZE_MASK_REG(0, ui)); in mv_sys_xor_init() 35 for (ui = 0; ui < (dram_info->num_cs + 1); ui++) { in mv_sys_xor_init() 37 reg |= (0x1 << (ui)); in mv_sys_xor_init() 39 reg |= (0x3 << ((ui * 2) + 16)); in mv_sys_xor_init() 51 for (ui = 0; ui < MAX_CS; ui++) { in mv_sys_xor_init() 52 if (dram_info->cs_ena & (1 << ui)) { in mv_sys_xor_init() [all …]
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| H A D | ddr3_sdram.c | 292 u32 ui, dq, pup; in ddr3_sdram_pbs_compare() local 337 for (ui = 0; ui < LEN_PBS_PATTERN; ui++) { in ddr3_sdram_pbs_compare() 338 if ((sdram_data[ui]) != (pattern_ptr[ui])) { in ddr3_sdram_pbs_compare() 343 var1 = ((sdram_data[ui] >> val) & in ddr3_sdram_pbs_compare() 345 var2 = ((pattern_ptr[ui] >> val) & in ddr3_sdram_pbs_compare() 351 (ui % pup_groups)); in ddr3_sdram_pbs_compare() 585 u32 ui; in ddr3_dram_sram_read() local 591 for (ui = 0; ui < len; ui++) { in ddr3_dram_sram_read()
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| H A D | ddr3_init.c | 141 u32 ui, reg, cs; in ddr3_restore_and_set_final_windows() local 159 for (ui = 0; ui < num_of_win_regs; ui++) in ddr3_restore_and_set_final_windows() 160 reg_write((win_ctrl_reg + 0x4 * ui), win_backup[ui]); in ddr3_restore_and_set_final_windows() 200 u32 reg, tmp_count, cs, ui; in ddr3_save_and_set_training_windows() local 226 for (ui = 0; ui < num_of_win_regs; ui++) in ddr3_save_and_set_training_windows() 227 win_backup[ui] = reg_read(win_ctrl_reg + 0x4 * ui); in ddr3_save_and_set_training_windows()
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| /rk3399_rockchip-uboot/fs/ubifs/ |
| H A D | super.c | 208 const struct ubifs_inode *ui = ubifs_inode(inode); in validate_inode() local 216 if (ui->compr_type >= UBIFS_COMPR_TYPES_CNT) { in validate_inode() 217 ubifs_err(c, "unknown compression type %d", ui->compr_type); in validate_inode() 221 if (ui->xattr_names + ui->xattr_cnt > XATTR_LIST_MAX) in validate_inode() 224 if (ui->data_len < 0 || ui->data_len > UBIFS_MAX_INO_DATA) in validate_inode() 227 if (ui->xattr && !S_ISREG(inode->i_mode)) in validate_inode() 230 if (!ubifs_compr_present(ui->compr_type)) { in validate_inode() 232 inode->i_ino, ubifs_compr_name(ui->compr_type)); in validate_inode() 246 struct ubifs_inode *ui; in ubifs_iget() local 281 ui = ubifs_inode(inode); in ubifs_iget() [all …]
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| H A D | debug.c | 236 const struct ubifs_inode *ui = ubifs_inode(inode); in ubifs_dump_inode() local 258 pr_err("\tcreat_sqnum %llu\n", ui->creat_sqnum); in ubifs_dump_inode() 259 pr_err("\txattr_size %u\n", ui->xattr_size); in ubifs_dump_inode() 260 pr_err("\txattr_cnt %u\n", ui->xattr_cnt); in ubifs_dump_inode() 261 pr_err("\txattr_names %u\n", ui->xattr_names); in ubifs_dump_inode() 262 pr_err("\tdirty %u\n", ui->dirty); in ubifs_dump_inode() 263 pr_err("\txattr %u\n", ui->xattr); in ubifs_dump_inode() 264 pr_err("\tbulk_read %u\n", ui->xattr); in ubifs_dump_inode() 266 (unsigned long long)ui->synced_i_size); in ubifs_dump_inode() 268 (unsigned long long)ui->ui_size); in ubifs_dump_inode() [all …]
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| H A D | ubifs.c | 506 struct ubifs_inode *ui; in ubifs_findfile() local 523 ui = ubifs_inode(inode); in ubifs_findfile() 533 memcpy(link_name, ui->data, ui->data_len); in ubifs_findfile() 534 link_name[ui->data_len] = '\0'; in ubifs_findfile()
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| H A D | budget.c | 603 struct ubifs_inode *ui) in ubifs_release_dirty_inode_budget() argument 609 req.dd_growth = c->bi.inode_budget + ALIGN(ui->data_len, 8); in ubifs_release_dirty_inode_budget()
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| H A D | recovery.c | 1516 struct ubifs_inode *ui; in ubifs_recover_size() local 1524 ui = ubifs_inode(inode); in ubifs_recover_size() 1530 ui->ui_size = e->d_size; in ubifs_recover_size() 1531 ui->synced_i_size = e->d_size; in ubifs_recover_size()
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| H A D | ubifs.h | 2163 struct ubifs_inode *ui);
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| /rk3399_rockchip-uboot/board/gateworks/gw_ventana/ |
| H A D | gsc.c | 66 uint ui; in read_hwmon() local 73 ui = buf[0] | (buf[1]<<8) | (buf[2]<<16); in read_hwmon() 74 if (reg == GSC_HWMON_TEMP && ui > 0x8000) in read_hwmon() 75 ui -= 0xffff; in read_hwmon() 76 if (ui == 0xffffff) in read_hwmon() 79 printf("%d\n", ui); in read_hwmon() 102 int ui = buf[0] | buf[1]<<8; in gsc_info() local 103 if (ui > 0x8000) in gsc_info() 104 ui -= 0xffff; in gsc_info() 105 printf(" board temp at %dC", ui / 10); in gsc_info()
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| /rk3399_rockchip-uboot/drivers/video/drm/ |
| H A D | dw_mipi_dsi2.c | 928 unsigned long long ui; in mipi_dphy_get_default_config() local 933 ui = ALIGN(PSEC_PER_SEC, hs_clk_rate); in mipi_dphy_get_default_config() 934 do_div(ui, hs_clk_rate); in mipi_dphy_get_default_config() 937 cfg->clk_post = 60000 + 52 * ui; in mipi_dphy_get_default_config() 947 cfg->hs_prepare = 40000 + 4 * ui; in mipi_dphy_get_default_config() 948 cfg->hs_zero = 105000 + 6 * ui; in mipi_dphy_get_default_config() 949 cfg->hs_settle = 85000 + 6 * ui; in mipi_dphy_get_default_config() 963 cfg->hs_trail = max(4 * 8 * ui, 60000 + 4 * 4 * ui); in mipi_dphy_get_default_config() 1063 unsigned long long tmp, ui; in dw_mipi_dsi2_lp2hs_or_hs2lp_cfg() local 1068 ui = ALIGN(PSEC_PER_SEC, hstx_clk); in dw_mipi_dsi2_lp2hs_or_hs2lp_cfg() [all …]
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| H A D | inno_video_combo_phy.c | 458 u32 t_txbyteclkhs, t_txclkesc, ui; in inno_mipi_dphy_timing_init() local 471 ui = div_u64(PSEC_PER_SEC, inno->pll.rate); in inno_mipi_dphy_timing_init() 474 mipi_dphy_timing_get_default(&gotp, ui); in inno_mipi_dphy_timing_init()
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| /rk3399_rockchip-uboot/lib/ |
| H A D | display_options.c | 143 uint32_t ui[MAX_LINE_LENGTH_BYTES/sizeof(uint32_t) + 1]; in print_buffer() member 170 x = lb.ui[i] = *(volatile uint32_t *)data; in print_buffer()
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.distro | 96 ui menu.c32
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