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Searched refs:timer (Results 1 – 25 of 252) sorted by relevance

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/rk3399_rockchip-uboot/drivers/timer/
H A DKconfig4 bool "Enable driver model for timer drivers"
7 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
9 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
13 bool "Enable driver model for timer drivers in SPL"
16 Enable support for timer drivers in SPL. These can be used to get
17 a timer value when in SPL, or perhaps for implementing a delay
18 function. This enables the drivers in drivers/timer as part of an
22 bool "Enable driver model for timer drivers in TPL"
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H A Drockchip_timer.c26 struct rk_timer *timer; member
29 static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer) in rockchip_timer_get_curr_value() argument
34 timebase_l = readl(&timer->timer_curr_value0); in rockchip_timer_get_curr_value()
35 timebase_h = readl(&timer->timer_curr_value1); in rockchip_timer_get_curr_value()
53 rate = timer_get_rate(gd->timer); in timer_get_boot_us()
54 timer_get_count(gd->timer, &ticks); in timer_get_boot_us()
59 struct rk_timer *timer = NULL; in timer_get_boot_us() local
71 timer = (struct rk_timer *)ofnode_get_addr(node); in timer_get_boot_us()
74 ticks = ~0uLL - rockchip_timer_get_curr_value(timer); in timer_get_boot_us()
92 uint64_t cntr = rockchip_timer_get_curr_value(priv->timer); in rockchip_timer_get_count()
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H A DMakefile7 obj-y += timer-uclass.o
11 obj-$(CONFIG_OMAP_TIMER) += omap-timer.o
13 obj-$(CONFIG_STI_TIMER) += sti-timer.o
H A Dsti-timer.c26 u64 timer; in sti_timer_get_count() local
37 timer = high; in sti_timer_get_count()
38 *count = (u64)((timer << 32) | low); in sti_timer_get_count()
H A Dast_timer.c24 static struct ast_timer_counter *ast_get_timer_counter(struct ast_timer *timer, in ast_get_timer_counter() argument
28 return &timer->timers2[n - 4]; in ast_get_timer_counter()
30 return &timer->timers1[n - 1]; in ast_get_timer_counter()
H A Dtimer-uclass.c92 if (gd->timer) in dm_timer_init()
128 gd->timer = dev; in dm_timer_init()
135 UCLASS_DRIVER(timer) = {
/rk3399_rockchip-uboot/arch/arm/cpu/arm920t/ep93xx/
H A Dtimer.c31 } timer; variable
46 if (now >= timer.last_read) in read_timer()
47 timer.ticks += now - timer.last_read; in read_timer()
50 timer.ticks += TIMER_MAX_VAL - timer.last_read + now; in read_timer()
52 timer.last_read = now; in read_timer()
64 sys_ticks = timer.ticks * CONFIG_SYS_HZ; in get_ticks()
86 target = timer.ticks + usecs_to_ticks(usec); in __udelay()
88 while (timer.ticks < target) in __udelay()
108 timer.ticks = 0; in timer_init()
/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/lpc32xx/
H A Dtimer.c25 static void lpc32xx_timer_reset(struct timer_regs *timer, u32 freq) in lpc32xx_timer_reset() argument
27 writel(TIMER_TCR_COUNTER_RESET, &timer->tcr); in lpc32xx_timer_reset()
28 writel(TIMER_TCR_COUNTER_DISABLE, &timer->tcr); in lpc32xx_timer_reset()
29 writel(0, &timer->tc); in lpc32xx_timer_reset()
30 writel(0, &timer->pr); in lpc32xx_timer_reset()
33 writel(TIMER_CTCR_MODE_TIMER, &timer->ctcr); in lpc32xx_timer_reset()
36 writel((get_periph_clk_rate() / freq) - 1, &timer->pr); in lpc32xx_timer_reset()
39 static void lpc32xx_timer_count(struct timer_regs *timer, int enable) in lpc32xx_timer_count() argument
42 writel(TIMER_TCR_COUNTER_ENABLE, &timer->tcr); in lpc32xx_timer_count()
44 writel(TIMER_TCR_COUNTER_DISABLE, &timer->tcr); in lpc32xx_timer_count()
/rk3399_rockchip-uboot/arch/arm/mach-rmobile/
H A Dtimer.c21 u64 timer; in get_cpu_global_timer() local
33 timer = high; in get_cpu_global_timer()
34 return (u64)((timer << 32) | low); in get_cpu_global_timer()
39 u64 timer = get_cpu_global_timer(); in get_time_us() local
41 timer = ((timer << 2) + (CLK2MHZ(CONFIG_SYS_CPU_CLK) >> 1)); in get_time_us()
42 do_div(timer, CLK2MHZ(CONFIG_SYS_CPU_CLK)); in get_time_us()
43 return timer; in get_time_us()
/rk3399_rockchip-uboot/doc/device-tree-bindings/timer/
H A Darc_timer.txt5 - compatible : should be "snps,arc-timer".
6 - reg : Specifies timer ID, could be either 0 or 1.
11 timer@0 {
12 compatible = "snps,arc-timer";
17 timer@1 {
18 compatible = "snps,arc-timer";
24 as each timer is driven by the same core clock.
H A Daltera_timer.txt5 - compatible : should be "altr,timer-1.0"
8 - interrupts : Should contain the timer interrupt number
13 timer {
14 compatible = "altr,timer-1.0";
H A Dsandbox_timer.txt1 Sandbox timer
3 The sandbox timer device is an emulated device which gets time from
7 compatible: "sandbox,timer"
/rk3399_rockchip-uboot/arch/sh/lib/
H A Dtime.c34 static void tmu_timer_start(unsigned int timer) in tmu_timer_start() argument
36 if (timer > 2) in tmu_timer_start()
38 writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr); in tmu_timer_start()
41 static void tmu_timer_stop(unsigned int timer) in tmu_timer_stop() argument
43 if (timer > 2) in tmu_timer_stop()
45 writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr); in tmu_timer_stop()
/rk3399_rockchip-uboot/arch/arm/mach-davinci/
H A Dtimer.c31 static struct davinci_timer * const timer = variable
41 writel(0x0, &timer->tcr); in timer_init()
42 writel(0x0, &timer->tgcr); in timer_init()
43 writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr); in timer_init()
44 writel(0x0, &timer->tim34); in timer_init()
45 writel(TIMER_LOAD_VAL, &timer->prd34); in timer_init()
46 writel(2 << 22, &timer->tcr); in timer_init()
58 unsigned long now = readl(&timer->tim34); in get_ticks()
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/sunxi/
H A Dtimer.c36 struct sunxi_timer *timer = &timers->timer[TIMER_NUM]; in read_timer() local
42 return ~readl(&timer->val); in read_timer()
50 struct sunxi_timer *timer = &timers->timer[TIMER_NUM]; in timer_init() local
51 writel(TIMER_LOAD_VAL, &timer->inter); in timer_init()
53 &timer->ctl); in timer_init()
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/s5p-common/
H A Dtimer.c40 struct s5p_timer *const timer = s5p_get_base_timer(); in timer_get_us_down() local
42 return readl(&timer->tcnto4); in timer_get_us_down()
89 struct s5p_timer *const timer = in timer_get_us() local
91 unsigned long now_downward_us = readl(&timer->tcnto4); in timer_get_us()
112 struct s5p_timer *const timer = s5p_get_base_timer(); in reset_timer_masked() local
115 gd->arch.lastinc = readl(&timer->tcnto4); in reset_timer_masked()
/rk3399_rockchip-uboot/drivers/watchdog/
H A DKconfig38 bool "Enable driver model for watchdog timer drivers"
41 Enable driver model for watchdog timer. At the moment the API
44 What exactly happens when the timer expires is up to a particular
56 bool "Aspeed ast2400/ast2500 watchdog timer support"
60 Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices.
61 The watchdog timer is stopped when initialized. It performs reset, either
67 bool "BCM6345 watchdog timer support"
70 Select this to enable watchdog timer for BCM6345 SoCs.
71 The watchdog timer is stopped when initialized.
75 bool "Orion watchdog timer support"
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/rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training_def.h386 #define CTCR_ARM_TIMER_EN_OFFS(timer) (timer * 2) argument
387 #define CTCR_ARM_TIMER_EN_MASK(timer) (1 << CTCR_ARM_TIMER_EN_OFFS(timer)) argument
388 #define CTCR_ARM_TIMER_EN(timer) (1 << CTCR_ARM_TIMER_EN_OFFS(timer)) argument
390 #define CTCR_ARM_TIMER_AUTO_OFFS(timer) (1 + (timer * 2)) argument
391 #define CTCR_ARM_TIMER_AUTO_MASK(timer) (1 << CTCR_ARM_TIMER_EN_OFFS(timer)) argument
392 #define CTCR_ARM_TIMER_AUTO_EN(timer) (1 << CTCR_ARM_TIMER_AUTO_OFFS(timer)) argument
/rk3399_rockchip-uboot/doc/device-tree-bindings/
H A Dchosen.txt25 tick-timer property
27 In a system there are multiple timers, specify which timer to be used
28 as the tick-timer. Earlier it was hardcoded in the timer driver now
29 since device tree has all the timer nodes. Specify which timer to be
30 used as tick timer.
36 tick-timer = "/timer2@f00";
40 compatible = "vendor,some-timer";
/rk3399_rockchip-uboot/arch/arm/dts/
H A Domap3.dtsi602 timer1: timer@48318000 {
603 compatible = "ti,omap3430-timer";
607 ti,timer-alwon;
610 timer2: timer@49032000 {
611 compatible = "ti,omap3430-timer";
617 timer3: timer@49034000 {
618 compatible = "ti,omap3430-timer";
624 timer4: timer@49036000 {
625 compatible = "ti,omap3430-timer";
631 timer5: timer@49038000 {
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H A Dam4372.dtsi220 timer1: timer@44e31000 {
221 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
224 ti,timer-alwon;
228 timer2: timer@48040000 {
229 compatible = "ti,am4372-timer","ti,am335x-timer";
235 timer3: timer@48042000 {
236 compatible = "ti,am4372-timer","ti,am335x-timer";
243 timer4: timer@48044000 {
244 compatible = "ti,am4372-timer","ti,am335x-timer";
247 ti,timer-pwm;
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H A Ddm816x.dtsi321 timer1: timer@4802e000 {
322 compatible = "ti,dm816-timer";
326 ti,timer-alwon;
329 timer2: timer@48040000 {
330 compatible = "ti,dm816-timer";
336 timer3: timer@48042000 {
337 compatible = "ti,dm816-timer";
343 timer4: timer@48044000 {
344 compatible = "ti,dm816-timer";
348 ti,timer-pwm;
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H A Drk3188-radxarock-u-boot.dtsi21 compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
/rk3399_rockchip-uboot/arch/x86/dts/
H A Dtsc_timer.dtsi2 tsc-timer {
3 compatible = "x86,tsc-timer";
/rk3399_rockchip-uboot/lib/
H A Dtime.c63 if (!gd->timer) { in get_tbclk()
75 return timer_get_rate(gd->timer); in get_tbclk()
83 if (!gd->timer) { in get_ticks()
95 ret = timer_get_count(gd->timer, &count); in get_ticks()

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