UPSTREAM: rockchip: timer: update for 32/64bit-aware OF_PLATDATA

With dtoc emitting fdt64_t for addresses (and region sizes), the array
indices for accessing the reg[] array needs to be adjusted. T

UPSTREAM: rockchip: timer: update for 32/64bit-aware OF_PLATDATA

With dtoc emitting fdt64_t for addresses (and region sizes), the array
indices for accessing the reg[] array needs to be adjusted. This
adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA
given this new structure layout.

Change-Id: If5a5fec05c00a0d4c71e1b7550c399880d50908d
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 8158a848fa4d506d46a5193daf13367f3839022a)

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UPSTREAM: rockchip: timer: Convert to livetree

Update the Rockchip timer driver to support a live device tree.

Change-Id: Ia7d704245e17907954428bd2bc1c5d895114797f
Signed-off-by: Philipp Tomsich <p

UPSTREAM: rockchip: timer: Convert to livetree

Update the Rockchip timer driver to support a live device tree.

Change-Id: Ia7d704245e17907954428bd2bc1c5d895114797f
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 6675c952f20b7b3cfedd57c9c49305289a89403c)

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UPSTREAM: rockchip: timer: implement timer_get_boot_us

To make the Rockchip DM timer driver useful for the timing of
bootstages, we need a few enhancements:
- This implements timer_get_boot_us.
-

UPSTREAM: rockchip: timer: implement timer_get_boot_us

To make the Rockchip DM timer driver useful for the timing of
bootstages, we need a few enhancements:
- This implements timer_get_boot_us.
- This avoids reinitialising the timer, if it has already been
set up (e.g. by our TPL and SPL stages). Now, we have a single
timebase ticking from TPL through the full U-Boot.
- This adds support for reading the timer even before the
device-model is ready: we find the timer via /chosen/tick-timer,
then read its address and clock-frequency, and finally read the
timeval directly).

Change-Id: I5f7d06f77c143482b28db7471600fdc5f39b824c
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit cc7ce94e02799c5caa6d9c89350152f00ba3eb90)

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Merge git://git.denx.de/u-boot-rockchip

rockchip: timer: fix U_BOOT_DRIVER name

When I originally added this driver, I did some careless (and in
retrospect: mindless) copy & paste for the U_BOOT_DRIVER structure
skeletion... unfortunately

rockchip: timer: fix U_BOOT_DRIVER name

When I originally added this driver, I did some careless (and in
retrospect: mindless) copy & paste for the U_BOOT_DRIVER structure
skeletion... unfortunately, the 'arc_timer' string was committed
and slipped through all reviews.

This fixes the U_BOOT_DRIVER name to read 'rockchip_rk3368_timer'
(as originally intended).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Artturi Alm <artturi.alm@gmail.com>

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Merge branch 'master' of git://git.denx.de/u-boot-rockchip

rockchip: timer: add device-model timer driver for RK3368 (and similar)

This adds a device-model driver for the timer block in the RK3368 (and
similar devices that share the same timer block, such a

rockchip: timer: add device-model timer driver for RK3368 (and similar)

This adds a device-model driver for the timer block in the RK3368 (and
similar devices that share the same timer block, such as the RK3288) for
the down-counting (i.e. non-secure) timers.

This allows us to configure U-Boot for the RK3368 in such a way that
we can run with the secure timer inaccessible or uninitialised (note
that the ARMv8 generic timer does not count, if the secure timer is
not enabled).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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