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Searched refs:t2 (Results 1 – 22 of 22) sorted by relevance

/rk3399_rockchip-uboot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S88 li t2, 0xfffff7ff
89 and t1, t1, t2
96 li t2, 0x20
98 beqz t2, 1b
100 addi t2, t2, -1
150 li t2, 0xc07fffff
151 and t1, t1, t2
152 li t2, 0x800000
153 or t1, t1, t2
191 li t2, 0x80000000
[all …]
/rk3399_rockchip-uboot/board/imgtec/malta/
H A Dlowlevel_init.S112 li t2, MSC01_PBC_CS0CFG_DTYP_MSK
113 and t1, t2
122 li t2, -CONFIG_SYS_MEM_SIZE
124 sw t2, MSC01_BIU_MCMSK1L_OFS(t0)
126 sw t2, MSC01_BIU_MCMSK2L_OFS(t0)
130 li t2, -MALTA_MSC01_IP1_SIZE
132 sw t2, MSC01_BIU_IP1MSK1L_OFS(t0)
134 sw t2, MSC01_BIU_IP1MSK2L_OFS(t0)
138 li t2, -MALTA_MSC01_IP2_SIZE1
140 sw t2, MSC01_BIU_IP2MSK1L_OFS(t0)
[all …]
/rk3399_rockchip-uboot/arch/powerpc/lib/
H A D_ashrdi3.S39 sraw r7,r3,r7 # t2 = MSW >> (count-32)
41 slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
43 or r4,r4,r7 # LSW |= t2
H A D_ashldi3.S38 slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
41 or r3,r3,r7 # MSW |= t2
H A D_lshrdi3.S38 srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
41 or r4,r4,r7 # LSW |= t2
/rk3399_rockchip-uboot/arch/mips/mach-ath79/qca953x/
H A Dlowlevel_init.S104 li t2, 0x08000000
105 or t1, t1, t2
109 li t2, 0xf7ffffff
110 and t1, t1, t2
154 li t2, ~QCA953X_PLL_CONFIG_PWD
155 and t1, t1, t2
160 li t2, ~QCA953X_PLL_CONFIG_PWD
161 and t1, t1, t2
166 li t2, ~PLL_CLK_CTRL_PLL_BYPASS
167 and t1, t1, t2
/rk3399_rockchip-uboot/board/pb1x00/
H A Dlowlevel_init.S41 lw t2, 0(t1)
42 or t2, t2, 0x00000300
43 sw t2, 0(t1)
47 lw t2, 0(t1)
48 and t2, t2, 0x00000100
49 bne t2, zero, big_endian
58 mfc0 t2, CP0_CONFIG
59 mtc0 t2, CP0_CONFIG
/rk3399_rockchip-uboot/arch/mips/lib/
H A Dcache_init.S159 li t2, 2
160 sllv R_L2_LINE, t2, R_L2_LINE
162 ext t2, t1, GCR_L2_CONFIG_ASSOC_SHIFT, GCR_L2_CONFIG_ASSOC_BITS
163 addiu t2, t2, 1
164 mul R_L2_SIZE, R_L2_LINE, t2
166 ext t2, t1, GCR_L2_CONFIG_SETSZ_SHIFT, GCR_L2_CONFIG_SETSZ_BITS
167 sllv R_L2_SIZE, R_L2_SIZE, t2
168 li t2, 64
169 mul R_L2_SIZE, R_L2_SIZE, t2
412 li t2, GCR_REV_CM3
[all …]
/rk3399_rockchip-uboot/board/dbau1x00/
H A Dlowlevel_init.S63 mfc0 t2, CP0_CONFIG
64 mtc0 t2, CP0_CONFIG
129 li t2, 0x80000000
130 addu t3, t0, t2
132 cache 0, 0(t2)
133 cache 1, 0(t2)
134 addu t2, t1
135 bne t2, t3, cacheloop
159 li t2, 32 # 32 entries
184 bne t0, t2, tlbloop
[all …]
/rk3399_rockchip-uboot/arch/mips/cpu/
H A Dcm_init.S36 PTR_LI t2, CKSEG1
37 PTR_ADDU t0, t0, t2
H A Dstart.S64 li t2, CONFIG_VAL(SYS_MALLOC_F_LEN)
66 sp, sp, t2 # reserve space for early malloc
/rk3399_rockchip-uboot/arch/mips/include/asm/
H A Dregdef.h30 #define t2 $10 macro
81 #define t2 $14 macro
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-omap3/
H A Dmmc_host_def.h33 typedef struct t2 { struct
/rk3399_rockchip-uboot/lib/avb/libavb/
H A Davb_sha512.c90 t2 = SHA512_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]); \
92 wv[h] = t1 + t2; \
174 uint64_t t1, t2; in SHA512_transform() local
318 t2 = SHA512_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]); in SHA512_transform()
326 wv[0] = t1 + t2; in SHA512_transform()
H A Davb_sha256.c105 t2 = SHA256_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]); \
107 wv[h] = t1 + t2; \
159 uint32_t t1, t2; in SHA256_transform() local
186 t2 = SHA256_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]); in SHA256_transform()
194 wv[0] = t1 + t2; in SHA256_transform()
/rk3399_rockchip-uboot/arch/nds32/cpu/n1213/
H A Dstart.S360 addi $t2, $p1, 6 ! $t2= bit width of ISET
364 add $t3, $t2, $t1 ! SHIFT
395 addi $t2, $p1, 6 ! $t2= bit width of DSET
399 add $t3, $t2, $t1 ! SHIFT
/rk3399_rockchip-uboot/include/optee_include/
H A Dtee_api_defines.h419 #define TEE_PARAM_TYPES(t0, t1, t2, t3) \ argument
420 ((t0) | ((t1) << 4) | ((t2) << 8) | ((t3) << 12))
/rk3399_rockchip-uboot/scripts/kconfig/
H A Dexpr.c997 static int expr_compare_type(enum expr_type t1, enum expr_type t2) in expr_compare_type() argument
999 if (t1 == t2) in expr_compare_type()
1006 if (t2 == E_EQUAL || t2 == E_UNEQUAL) in expr_compare_type()
1010 if (t2 == E_NOT) in expr_compare_type()
1013 if (t2 == E_AND) in expr_compare_type()
1016 if (t2 == E_OR) in expr_compare_type()
1019 if (t2 == E_LIST) in expr_compare_type()
1022 if (t2 == 0) in expr_compare_type()
1027 printf("[%dgt%d?]", t1, t2); in expr_compare_type()
/rk3399_rockchip-uboot/drivers/video/drm/
H A Ddw-dp.c1325 u32 t1 = 0, t2 = 0, t3 = 0; in dw_dp_video_enable() local
1369 t2 = (link->rate / 4) * 1000 / (mode->clock / 2); in dw_dp_video_enable()
1371 t2 = (link->rate / 4) * 1000 / mode->clock; in dw_dp_video_enable()
1377 init_threshold = t1 * t2 * t3 / (1000 * 1000); in dw_dp_video_enable()
/rk3399_rockchip-uboot/include/
H A Dedid.h77 u8 t2; member
/rk3399_rockchip-uboot/common/
H A Dlrz.c1310 int t1=0,t2=0; in do_crc_check() local
1337 while(t2<3) { in do_crc_check()
H A Dedid.c4906 (edid->established_timings.t2 << 8) | in add_established_modes()